diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index f0f8a8756146..221dbc6db918 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -115,6 +115,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb imx8qxp-mek-dsp.dtb imx8qxp-mek-ov5640 imx8qxp-mek-dpu-lcdif.dtb \ imx8qxp-mek-dpu-lcdif-rpmsg.dtb \ imx8qxp-mek-ov5640-rpmsg.dtb \ + imx8qxp-mek-pcie-ep.dtb \ imx8dx-mek.dtb imx8dx-mek-dsp.dtb imx8dx-mek-rpmsg.dtb \ imx8dx-mek-enet2-tja1100.dtb \ imx8dx-mek-ov5640.dtb \ diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi index 916b18bb925f..c6629e048777 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi @@ -131,4 +131,34 @@ hsio_subsys: bus@5f000000 { local-addr = <0x80000000>; status = "disabled"; }; + + pcieb_ep: pcie_ep@0x5f010000 { + compatible = "fsl,imx8qxp-pcie-ep"; + reg = <0x5f010000 0x00010000>, + <0x5f080000 0xf0000>, /* lpcg, csr, msic, gpio */ + <0x70000000 0x10000000>; + reg-names = "regs", "hsio", "addr_space"; + num-lanes = <1>; + interrupts = ; /* eDMA */ + interrupt-names = "dma"; + clocks = <&pcieb_lpcg 0>, + <&pcieb_lpcg 1>, + <&pcieb_lpcg 2>, + <&phyx1_lpcg 0>, + <&phyx1_crr1_lpcg 0>, + <&pcieb_crr3_lpcg 0>, + <&misc_crr5_lpcg 0>; + clock-names = "pcie", "pcie_bus", "pcie_inbound_axi", + "pcie_phy", "phy_per", "pcie_per", "misc_per"; + power-domains = <&pd IMX_SC_R_PCIE_B>, + <&pd IMX_SC_R_SERDES_1>, + <&pd IMX_SC_R_HSIO_GPIO>; + power-domain-names = "pcie", "pcie_phy", "hsio_gpio"; + fsl,max-link-speed = <3>; + hsio-cfg = ; + local-addr = <0x80000000>; + num-ib-windows = <6>; + num-ob-windows = <6>; + status = "disabled"; + }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek-pcie-ep.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek-pcie-ep.dts new file mode 100644 index 000000000000..6ba20843619b --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek-pcie-ep.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020 NXP + */ + +/dts-v1/; + +#include "imx8qxp-mek.dts" + +&pcieb{ + status = "disabled"; +}; + +&pcieb_ep{ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcieb>; + ext_osc = <1>; + status = "okay"; +};