ARM i.MX: dmav1: kill SoC ifdefs
since we now can include all soc specific headers at once we do not need the ifdeffery anymore. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -475,7 +475,6 @@ void imx_dma_enable(int channel)
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imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN |
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CCR_ACRPT, DMA_CCR(channel));
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#ifdef CONFIG_ARCH_MX2
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if ((cpu_is_mx21() || cpu_is_mx27()) &&
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imxdma->sg && imx_dma_hw_chain(imxdma)) {
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imxdma->sg = sg_next(imxdma->sg);
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@ -487,7 +486,6 @@ void imx_dma_enable(int channel)
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DMA_CCR(channel));
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}
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}
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#endif
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imxdma->in_use = 1;
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local_irq_restore(flags);
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@ -518,7 +516,6 @@ void imx_dma_disable(int channel)
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}
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EXPORT_SYMBOL(imx_dma_disable);
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#ifdef CONFIG_ARCH_MX2
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static void imx_dma_watchdog(unsigned long chno)
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{
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struct imx_dma_channel *imxdma = &imx_dma_channels[chno];
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@ -530,7 +527,6 @@ static void imx_dma_watchdog(unsigned long chno)
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if (imxdma->err_handler)
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imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT);
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}
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#endif
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static irqreturn_t dma_err_handler(int irq, void *dev_id)
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{
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@ -654,10 +650,8 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
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{
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int i, disr;
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#ifdef CONFIG_ARCH_MX2
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if (cpu_is_mx21() || cpu_is_mx27())
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dma_err_handler(irq, dev_id);
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#endif
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disr = imx_dmav1_readl(DMA_DISR);
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@ -703,7 +697,6 @@ int imx_dma_request(int channel, const char *name)
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imxdma->name = name;
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local_irq_restore(flags); /* request_irq() can block */
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#ifdef CONFIG_ARCH_MX2
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if (cpu_is_mx21() || cpu_is_mx27()) {
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ret = request_irq(MX2x_INT_DMACH0 + channel,
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dma_irq_handler, 0, "DMA", NULL);
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@ -717,7 +710,6 @@ int imx_dma_request(int channel, const char *name)
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imxdma->watchdog.function = &imx_dma_watchdog;
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imxdma->watchdog.data = channel;
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}
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#endif
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return ret;
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}
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@ -744,10 +736,8 @@ void imx_dma_free(int channel)
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imx_dma_disable(channel);
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imxdma->name = NULL;
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#ifdef CONFIG_ARCH_MX2
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if (cpu_is_mx21() || cpu_is_mx27())
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free_irq(MX2x_INT_DMACH0 + channel, NULL);
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#endif
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local_irq_restore(flags);
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}
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@ -803,21 +793,13 @@ static int __init imx_dma_init(void)
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int ret = 0;
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int i;
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#ifdef CONFIG_ARCH_MX1
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if (cpu_is_mx1())
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imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR);
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else
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#endif
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#ifdef CONFIG_MACH_MX21
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if (cpu_is_mx21())
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else if (cpu_is_mx21())
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imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR);
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else
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#endif
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#ifdef CONFIG_MACH_MX27
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if (cpu_is_mx27())
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else if (cpu_is_mx27())
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imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR);
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else
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#endif
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return 0;
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dma_clk = clk_get(NULL, "dma");
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@ -828,7 +810,6 @@ static int __init imx_dma_init(void)
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/* reset DMA module */
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imx_dmav1_writel(DCR_DRST, DMA_DCR);
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#ifdef CONFIG_ARCH_MX1
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if (cpu_is_mx1()) {
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ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL);
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if (ret) {
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@ -843,7 +824,7 @@ static int __init imx_dma_init(void)
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return ret;
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}
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}
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#endif
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/* enable DMA module */
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imx_dmav1_writel(DCR_DEN, DMA_DCR);
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