gpio/nomadik: cache [rf]w?imsc
Cache two more registers in the GPIO controller. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Reviewed-by: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -58,6 +58,8 @@ struct nmk_gpio_chip {
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u32 real_wake;
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u32 rwimsc;
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u32 fwimsc;
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u32 rimsc;
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u32 fimsc;
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u32 pull_up;
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};
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@ -149,8 +151,8 @@ static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip,
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unsigned offset, int gpio_mode,
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bool glitch)
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{
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u32 rwimsc = readl(nmk_chip->addr + NMK_GPIO_RWIMSC);
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u32 fwimsc = readl(nmk_chip->addr + NMK_GPIO_FWIMSC);
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u32 rwimsc = nmk_chip->rwimsc;
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u32 fwimsc = nmk_chip->fwimsc;
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if (glitch && nmk_chip->set_ioforce) {
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u32 bit = BIT(offset);
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@ -555,27 +557,38 @@ static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
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int gpio, enum nmk_gpio_irq_type which,
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bool enable)
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{
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u32 rimsc = which == WAKE ? NMK_GPIO_RWIMSC : NMK_GPIO_RIMSC;
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u32 fimsc = which == WAKE ? NMK_GPIO_FWIMSC : NMK_GPIO_FIMSC;
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u32 bitmask = nmk_gpio_get_bitmask(gpio);
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u32 reg;
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u32 *rimscval;
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u32 *fimscval;
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u32 rimscreg;
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u32 fimscreg;
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if (which == NORMAL) {
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rimscreg = NMK_GPIO_RIMSC;
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fimscreg = NMK_GPIO_FIMSC;
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rimscval = &nmk_chip->rimsc;
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fimscval = &nmk_chip->fimsc;
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} else {
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rimscreg = NMK_GPIO_RWIMSC;
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fimscreg = NMK_GPIO_FWIMSC;
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rimscval = &nmk_chip->rwimsc;
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fimscval = &nmk_chip->fwimsc;
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}
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/* we must individually set/clear the two edges */
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if (nmk_chip->edge_rising & bitmask) {
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reg = readl(nmk_chip->addr + rimsc);
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if (enable)
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reg |= bitmask;
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*rimscval |= bitmask;
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else
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reg &= ~bitmask;
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writel(reg, nmk_chip->addr + rimsc);
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*rimscval &= ~bitmask;
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writel(*rimscval, nmk_chip->addr + rimscreg);
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}
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if (nmk_chip->edge_falling & bitmask) {
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reg = readl(nmk_chip->addr + fimsc);
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if (enable)
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reg |= bitmask;
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*fimscval |= bitmask;
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else
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reg &= ~bitmask;
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writel(reg, nmk_chip->addr + fimsc);
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*fimscval &= ~bitmask;
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writel(*fimscval, nmk_chip->addr + fimscreg);
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}
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}
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@ -1011,9 +1024,6 @@ void nmk_gpio_wakeups_suspend(void)
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clk_enable(chip->clk);
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chip->rwimsc = readl(chip->addr + NMK_GPIO_RWIMSC);
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chip->fwimsc = readl(chip->addr + NMK_GPIO_FWIMSC);
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writel(chip->rwimsc & chip->real_wake,
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chip->addr + NMK_GPIO_RWIMSC);
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writel(chip->fwimsc & chip->real_wake,
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