ASoC: WM8804: Power down the PLL correctly
The PLL is disabled when the corresponding bit is set not the other way around. This commit depends on my other commit with Subject "ASoC: WM8804: Refactor set_pll code to avoid GCC warnings". Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -395,7 +395,7 @@ static int wm8804_set_pll(struct snd_soc_dai *dai, int pll_id,
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codec = dai->codec;
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if (!freq_in || !freq_out) {
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/* disable the PLL */
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snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0);
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snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1);
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return 0;
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} else {
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int ret;
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@ -406,7 +406,7 @@ static int wm8804_set_pll(struct snd_soc_dai *dai, int pll_id,
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return ret;
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/* power down the PLL before reprogramming it */
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snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0);
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snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1);
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if (!freq_in || !freq_out)
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return 0;
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@ -423,7 +423,7 @@ static int wm8804_set_pll(struct snd_soc_dai *dai, int pll_id,
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snd_soc_write(codec, WM8804_PLL3, pll_div.k >> 16);
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/* power up the PLL */
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snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1);
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snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0);
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}
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return 0;
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