[SCSI] ufs: rework link start-up process
Link start-up requires long time with multiphase handshakes between UFS host and device. This affects driver's probe time. This patch let link start-up run asynchronously. Link start-up will be executed at the end of prove separately. Along with this change, the following is worked. Defined completion time of uic command to avoid a permanent wait. Added mutex to guarantee of uic command at a time. Adapted some sequence of controller initialization after link statup according to HCI standard. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org> Tested-by: Maya Erez <merez@codeaurora.org> Signed-off-by: Santosh Y <santoshsy@gmail.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>hifive-unleashed-5.1
Seungwon Jeon
James Bottomley
parent
261ea45203
commit
6ccf44fe4c
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@ -33,11 +33,15 @@
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* this program.
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*/
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#include <linux/async.h>
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#include "ufshcd.h"
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#define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
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UTP_TASK_REQ_COMPL |\
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UFSHCD_ERROR_MASK)
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/* UIC command timeout, unit: ms */
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#define UIC_CMD_TIMEOUT 500
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enum {
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UFSHCD_MAX_CHANNEL = 0,
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@ -349,23 +353,121 @@ static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
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}
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/**
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* ufshcd_send_uic_command - Send UIC commands to unipro layers
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* ufshcd_ready_for_uic_cmd - Check if controller is ready
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* to accept UIC commands
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* @hba: per adapter instance
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* @uic_command: UIC command
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* Return true on success, else false
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*/
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static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
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{
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if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
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return true;
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else
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return false;
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}
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/**
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* ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
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* @hba: per adapter instance
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* @uic_cmd: UIC command
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*
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* Mutex must be held.
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*/
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static inline void
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ufshcd_send_uic_command(struct ufs_hba *hba, struct uic_command *uic_cmnd)
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ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
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{
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WARN_ON(hba->active_uic_cmd);
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hba->active_uic_cmd = uic_cmd;
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/* Write Args */
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ufshcd_writel(hba, uic_cmnd->argument1, REG_UIC_COMMAND_ARG_1);
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ufshcd_writel(hba, uic_cmnd->argument2, REG_UIC_COMMAND_ARG_2);
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ufshcd_writel(hba, uic_cmnd->argument3, REG_UIC_COMMAND_ARG_3);
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ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
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ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
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ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
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/* Write UIC Cmd */
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ufshcd_writel(hba, uic_cmnd->command & COMMAND_OPCODE_MASK,
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ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
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REG_UIC_COMMAND);
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}
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/**
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* ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
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* @hba: per adapter instance
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* @uic_command: UIC command
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*
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* Must be called with mutex held.
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* Returns 0 only if success.
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*/
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static int
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ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
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{
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int ret;
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unsigned long flags;
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if (wait_for_completion_timeout(&uic_cmd->done,
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msecs_to_jiffies(UIC_CMD_TIMEOUT)))
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ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
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else
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ret = -ETIMEDOUT;
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spin_lock_irqsave(hba->host->host_lock, flags);
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hba->active_uic_cmd = NULL;
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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return ret;
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}
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/**
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* __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
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* @hba: per adapter instance
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* @uic_cmd: UIC command
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*
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* Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
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* with mutex held.
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* Returns 0 only if success.
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*/
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static int
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__ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
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{
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int ret;
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unsigned long flags;
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if (!ufshcd_ready_for_uic_cmd(hba)) {
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dev_err(hba->dev,
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"Controller not ready to accept UIC commands\n");
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return -EIO;
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}
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init_completion(&uic_cmd->done);
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spin_lock_irqsave(hba->host->host_lock, flags);
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ufshcd_dispatch_uic_cmd(hba, uic_cmd);
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
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return ret;
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}
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/**
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* ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
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* @hba: per adapter instance
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* @uic_cmd: UIC command
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*
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* Returns 0 only if success.
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*/
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static int
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ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
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{
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int ret;
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mutex_lock(&hba->uic_cmd_mutex);
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ret = __ufshcd_send_uic_cmd(hba, uic_cmd);
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mutex_unlock(&hba->uic_cmd_mutex);
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return ret;
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}
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/**
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* ufshcd_map_sg - Map scatter-gather list to prdt
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* @lrbp - pointer to local reference block
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@ -725,34 +827,16 @@ static void ufshcd_host_memory_configure(struct ufs_hba *hba)
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*/
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static int ufshcd_dme_link_startup(struct ufs_hba *hba)
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{
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struct uic_command *uic_cmd;
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unsigned long flags;
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struct uic_command uic_cmd = {0};
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int ret;
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/* check if controller is ready to accept UIC commands */
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if ((ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
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UIC_COMMAND_READY) == 0x0) {
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uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
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ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
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if (ret)
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dev_err(hba->dev,
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"Controller not ready"
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" to accept UIC commands\n");
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return -EIO;
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}
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spin_lock_irqsave(hba->host->host_lock, flags);
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/* form UIC command */
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uic_cmd = &hba->active_uic_cmd;
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uic_cmd->command = UIC_CMD_DME_LINK_STARTUP;
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uic_cmd->argument1 = 0;
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uic_cmd->argument2 = 0;
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uic_cmd->argument3 = 0;
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/* enable UIC related interrupts */
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ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
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/* sending UIC commands to controller */
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ufshcd_send_uic_command(hba, uic_cmd);
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spin_unlock_irqrestore(hba->host->host_lock, flags);
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return 0;
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"dme-link-startup: error code %d\n", ret);
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return ret;
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}
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/**
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@ -761,9 +845,10 @@ static int ufshcd_dme_link_startup(struct ufs_hba *hba)
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*
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* To bring UFS host controller to operational state,
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* 1. Check if device is present
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* 2. Configure run-stop-registers
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* 3. Enable required interrupts
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* 4. Configure interrupt aggregation
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* 2. Enable required interrupts
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* 3. Configure interrupt aggregation
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* 4. Program UTRL and UTMRL base addres
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* 5. Configure run-stop-registers
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*
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* Returns 0 on success, non-zero value on failure
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*/
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@ -780,6 +865,22 @@ static int ufshcd_make_hba_operational(struct ufs_hba *hba)
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goto out;
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}
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/* Enable required interrupts */
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ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
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/* Configure interrupt aggregation */
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ufshcd_config_int_aggr(hba, INT_AGGR_CONFIG);
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/* Configure UTRL and UTMRL base address registers */
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ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
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REG_UTP_TRANSFER_REQ_LIST_BASE_L);
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ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
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REG_UTP_TRANSFER_REQ_LIST_BASE_H);
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ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
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REG_UTP_TASK_REQ_LIST_BASE_L);
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ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
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REG_UTP_TASK_REQ_LIST_BASE_H);
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/*
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* UCRDY, UTMRLDY and UTRLRDY bits must be 1
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* DEI, HEI bits must be 0
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@ -793,17 +894,11 @@ static int ufshcd_make_hba_operational(struct ufs_hba *hba)
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goto out;
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}
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/* Enable required interrupts */
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ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
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/* Configure interrupt aggregation */
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ufshcd_config_int_aggr(hba, INT_AGGR_CONFIG);
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if (hba->ufshcd_state == UFSHCD_STATE_RESET)
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scsi_unblock_requests(hba->host);
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hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
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scsi_scan_host(hba->host);
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out:
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return err;
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}
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@ -872,34 +967,28 @@ static int ufshcd_hba_enable(struct ufs_hba *hba)
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}
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/**
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* ufshcd_initialize_hba - start the initialization process
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* ufshcd_link_startup - Initialize unipro link startup
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* @hba: per adapter instance
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*
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* 1. Enable the controller via ufshcd_hba_enable.
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* 2. Program the Transfer Request List Address with the starting address of
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* UTRDL.
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* 3. Program the Task Management Request List Address with starting address
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* of UTMRDL.
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*
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* Returns 0 on success, non-zero value on failure.
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* Returns 0 for success, non-zero in case of failure
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*/
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static int ufshcd_initialize_hba(struct ufs_hba *hba)
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static int ufshcd_link_startup(struct ufs_hba *hba)
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{
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if (ufshcd_hba_enable(hba))
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return -EIO;
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int ret;
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/* Configure UTRL and UTMRL base address registers */
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ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
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REG_UTP_TRANSFER_REQ_LIST_BASE_L);
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ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
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REG_UTP_TRANSFER_REQ_LIST_BASE_H);
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ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
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REG_UTP_TASK_REQ_LIST_BASE_L);
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ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
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REG_UTP_TASK_REQ_LIST_BASE_H);
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/* enable UIC related interrupts */
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ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
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/* Initialize unipro link startup procedure */
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return ufshcd_dme_link_startup(hba);
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ret = ufshcd_dme_link_startup(hba);
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if (ret)
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goto out;
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ret = ufshcd_make_hba_operational(hba);
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out:
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if (ret)
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dev_err(hba->dev, "link startup failed %d\n", ret);
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return ret;
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}
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/**
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@ -939,12 +1028,19 @@ static int ufshcd_do_reset(struct ufs_hba *hba)
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hba->outstanding_reqs = 0;
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hba->outstanding_tasks = 0;
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/* start the initialization process */
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if (ufshcd_initialize_hba(hba)) {
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/* Host controller enable */
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if (ufshcd_hba_enable(hba)) {
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dev_err(hba->dev,
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"Reset: Controller initialization failed\n");
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return FAILED;
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}
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if (ufshcd_link_startup(hba)) {
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dev_err(hba->dev,
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"Reset: Link start-up failed\n");
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return FAILED;
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}
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return SUCCESS;
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}
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@ -1175,6 +1271,19 @@ ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
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return result;
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}
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/**
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* ufshcd_uic_cmd_compl - handle completion of uic command
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* @hba: per adapter instance
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*/
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static void ufshcd_uic_cmd_compl(struct ufs_hba *hba)
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{
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if (hba->active_uic_cmd) {
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hba->active_uic_cmd->argument2 |=
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ufshcd_get_uic_cmd_result(hba);
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complete(&hba->active_uic_cmd->done);
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}
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}
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/**
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* ufshcd_transfer_req_compl - handle SCSI and query command completion
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* @hba: per adapter instance
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@ -1214,28 +1323,6 @@ static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
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ufshcd_config_int_aggr(hba, INT_AGGR_RESET);
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}
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/**
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* ufshcd_uic_cc_handler - handle UIC command completion
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* @work: pointer to a work queue structure
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*
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* Returns 0 on success, non-zero value on failure
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*/
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static void ufshcd_uic_cc_handler (struct work_struct *work)
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{
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struct ufs_hba *hba;
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hba = container_of(work, struct ufs_hba, uic_workq);
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if ((hba->active_uic_cmd.command == UIC_CMD_DME_LINK_STARTUP) &&
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!(ufshcd_get_uic_cmd_result(hba))) {
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if (ufshcd_make_hba_operational(hba))
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dev_err(hba->dev,
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"cc: hba not operational state\n");
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return;
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}
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}
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/**
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* ufshcd_fatal_err_handler - handle fatal errors
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* @hba: per adapter instance
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@ -1297,7 +1384,7 @@ static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
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ufshcd_err_handler(hba);
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if (intr_status & UIC_COMMAND_COMPL)
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schedule_work(&hba->uic_workq);
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ufshcd_uic_cmd_compl(hba);
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if (intr_status & UTP_TASK_REQ_COMPL)
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ufshcd_tmc_handler(hba);
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@ -1520,6 +1607,21 @@ out:
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return err;
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}
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/**
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* ufshcd_async_scan - asynchronous execution for link startup
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* @data: data pointer to pass to this function
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* @cookie: cookie data
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*/
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static void ufshcd_async_scan(void *data, async_cookie_t cookie)
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{
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struct ufs_hba *hba = (struct ufs_hba *)data;
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int ret;
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ret = ufshcd_link_startup(hba);
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if (!ret)
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scsi_scan_host(hba->host);
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}
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static struct scsi_host_template ufshcd_driver_template = {
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.module = THIS_MODULE,
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.name = UFSHCD,
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@ -1681,9 +1783,11 @@ int ufshcd_init(struct device *dev, struct ufs_hba **hba_handle,
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init_waitqueue_head(&hba->ufshcd_tm_wait_queue);
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/* Initialize work queues */
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INIT_WORK(&hba->uic_workq, ufshcd_uic_cc_handler);
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INIT_WORK(&hba->feh_workq, ufshcd_fatal_err_handler);
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/* Initialize UIC command mutex */
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mutex_init(&hba->uic_cmd_mutex);
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/* IRQ registration */
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err = request_irq(irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
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if (err) {
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@ -1704,14 +1808,17 @@ int ufshcd_init(struct device *dev, struct ufs_hba **hba_handle,
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goto out_free_irq;
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}
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/* Initialization routine */
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err = ufshcd_initialize_hba(hba);
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/* Host controller enable */
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err = ufshcd_hba_enable(hba);
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if (err) {
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dev_err(hba->dev, "Initialization failed\n");
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dev_err(hba->dev, "Host controller enable failed\n");
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goto out_remove_scsi_host;
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}
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*hba_handle = hba;
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||||
async_schedule(ufshcd_async_scan, hba);
|
||||
|
||||
return 0;
|
||||
|
||||
out_remove_scsi_host:
|
||||
|
|
|
|||
|
|
@ -51,6 +51,7 @@
|
|||
#include <linux/bitops.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/completion.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/byteorder.h>
|
||||
|
|
@ -75,6 +76,7 @@
|
|||
* @argument3: UIC command argument 3
|
||||
* @cmd_active: Indicate if UIC command is outstanding
|
||||
* @result: UIC command result
|
||||
* @done: UIC command completion
|
||||
*/
|
||||
struct uic_command {
|
||||
u32 command;
|
||||
|
|
@ -83,6 +85,7 @@ struct uic_command {
|
|||
u32 argument3;
|
||||
int cmd_active;
|
||||
int result;
|
||||
struct completion done;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -136,11 +139,11 @@ struct ufshcd_lrb {
|
|||
* @ufs_version: UFS Version to which controller complies
|
||||
* @irq: Irq number of the controller
|
||||
* @active_uic_cmd: handle of active UIC command
|
||||
* @uic_cmd_mutex: mutex for uic command
|
||||
* @ufshcd_tm_wait_queue: wait queue for task management
|
||||
* @tm_condition: condition variable for task management
|
||||
* @ufshcd_state: UFSHCD states
|
||||
* @intr_mask: Interrupt Mask Bits
|
||||
* @uic_workq: Work queue for UIC completion handling
|
||||
* @feh_workq: Work queue for fatal controller error handling
|
||||
* @errors: HBA errors
|
||||
*/
|
||||
|
|
@ -171,7 +174,9 @@ struct ufs_hba {
|
|||
u32 ufs_version;
|
||||
unsigned int irq;
|
||||
|
||||
struct uic_command active_uic_cmd;
|
||||
struct uic_command *active_uic_cmd;
|
||||
struct mutex uic_cmd_mutex;
|
||||
|
||||
wait_queue_head_t ufshcd_tm_wait_queue;
|
||||
unsigned long tm_condition;
|
||||
|
||||
|
|
@ -179,7 +184,6 @@ struct ufs_hba {
|
|||
u32 intr_mask;
|
||||
|
||||
/* Work Queues */
|
||||
struct work_struct uic_workq;
|
||||
struct work_struct feh_workq;
|
||||
|
||||
/* HBA Errors */
|
||||
|
|
|
|||
Loading…
Reference in New Issue