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ARM: dts: meson8b: add the DDR clock controller

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Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main
(HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the
inputs for the audio clock muxes.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit is contained in:
Martin Blumenstingl 2019-12-08 19:05:25 +01:00 committed by Kevin Hilman
parent c4ac5c37a4
commit 6d549ff55c
1 changed files with 11 additions and 2 deletions
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13
arch/arm/boot/dts/meson8b.dtsi
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@ -4,6 +4,7 @@
* Author: Carlo Caione <carlo@endlessm.com>
*/
#include <dt-bindings/clock/meson8-ddr-clkc.h>
#include <dt-bindings/clock/meson8b-clkc.h>
#include <dt-bindings/gpio/meson8b-gpio.h>
#include <dt-bindings/reset/amlogic,meson8b-reset.h>
@ -172,6 +173,14 @@
#size-cells = <1>;
ranges = <0x0 0xc8000000 0x8000>;
ddr_clkc: clock-controller@400 {
compatible = "amlogic,meson8b-ddr-clkc";
reg = <0x400 0x20>;
clocks = <&xtal>;
clock-names = "xtal";
#clock-cells = <1>;
};
dmcbus: bus@6000 {
compatible = "simple-bus";
reg = <0x6000 0x400>;
@ -434,8 +443,8 @@
&hhi {
clkc: clock-controller {
compatible = "amlogic,meson8-clkc";
clocks = <&xtal>;
clock-names = "xtal";
clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>;
clock-names = "xtal", "ddr_pll";
#clock-cells = <1>;
#reset-cells = <1>;
};