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ARM: dts: sun4i: Add A10 SRAM and SRAM controller

The A10 has a few SRAM that can be mapped either to a device or to the CPU,
with the mapping being controlled by a SRAM controller.

Since most of the time these SRAM won't be accessible by the CPU,
we can't use the mmio-sram driver and compatible.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
hifive-unleashed-5.1
Hans de Goede 2015-03-26 15:53:42 +01:00 committed by Maxime Ripard
parent dd2fd84ffd
commit 6d92b80f35
1 changed files with 34 additions and 0 deletions

View File

@ -450,12 +450,46 @@
};
};
/*
* Note we use the address where the mmio registers start, not where
* the SRAM blocks start, this cannot be changed because that would be
* a devicetree ABI change.
*/
soc@01c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram@00000000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00000000 0x4000>;
allwinner,sram-name = "A1";
};
sram@00004000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00004000 0x4000>;
allwinner,sram-name = "A2";
};
sram@00008000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00008000 0x4000>;
allwinner,sram-name = "A3-A4";
};
sram@00010000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00010000 0x1000>;
allwinner,sram-name = "D";
};
sram-controller@01c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
};
dma: dma-controller@01c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;