Merge branch 'ep93xx' into for-2.6.36
Trivial add/add fixup required in the clock table. Conflicts: arch/arm/mach-ep93xx/clock.c
This commit is contained in:
commit
6e03a61544
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@ -43,7 +43,8 @@ static unsigned long get_uart_rate(struct clk *clk);
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static int set_keytchclk_rate(struct clk *clk, unsigned long rate);
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static int set_keytchclk_rate(struct clk *clk, unsigned long rate);
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static int set_div_rate(struct clk *clk, unsigned long rate);
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static int set_div_rate(struct clk *clk, unsigned long rate);
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static int set_i2s_sclk_rate(struct clk *clk, unsigned long rate);
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static int set_i2s_lrclk_rate(struct clk *clk, unsigned long rate);
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static struct clk clk_xtali = {
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static struct clk clk_xtali = {
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.rate = EP93XX_EXT_CLK_RATE,
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.rate = EP93XX_EXT_CLK_RATE,
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@ -112,6 +113,29 @@ static struct clk clk_video = {
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.set_rate = set_div_rate,
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.set_rate = set_div_rate,
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};
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};
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static struct clk clk_i2s_mclk = {
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.sw_locked = 1,
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.enable_reg = EP93XX_SYSCON_I2SCLKDIV,
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.enable_mask = EP93XX_SYSCON_CLKDIV_ENABLE,
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.set_rate = set_div_rate,
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};
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static struct clk clk_i2s_sclk = {
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.sw_locked = 1,
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.parent = &clk_i2s_mclk,
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.enable_reg = EP93XX_SYSCON_I2SCLKDIV,
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.enable_mask = EP93XX_SYSCON_I2SCLKDIV_SENA,
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.set_rate = set_i2s_sclk_rate,
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};
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static struct clk clk_i2s_lrclk = {
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.sw_locked = 1,
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.parent = &clk_i2s_sclk,
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.enable_reg = EP93XX_SYSCON_I2SCLKDIV,
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.enable_mask = EP93XX_SYSCON_I2SCLKDIV_SENA,
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.set_rate = set_i2s_lrclk_rate,
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};
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/* DMA Clocks */
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/* DMA Clocks */
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static struct clk clk_m2p0 = {
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static struct clk clk_m2p0 = {
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.parent = &clk_h,
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.parent = &clk_h,
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@ -191,6 +215,9 @@ static struct clk_lookup clocks[] = {
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INIT_CK("ep93xx-keypad", NULL, &clk_keypad),
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INIT_CK("ep93xx-keypad", NULL, &clk_keypad),
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INIT_CK("ep93xx-fb", NULL, &clk_video),
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INIT_CK("ep93xx-fb", NULL, &clk_video),
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INIT_CK("ep93xx-spi.0", NULL, &clk_spi),
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INIT_CK("ep93xx-spi.0", NULL, &clk_spi),
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INIT_CK("ep93xx-i2s", "mclk", &clk_i2s_mclk),
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INIT_CK("ep93xx-i2s", "sclk", &clk_i2s_sclk),
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INIT_CK("ep93xx-i2s", "lrclk", &clk_i2s_lrclk),
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INIT_CK(NULL, "pwm_clk", &clk_pwm),
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INIT_CK(NULL, "pwm_clk", &clk_pwm),
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INIT_CK(NULL, "m2p0", &clk_m2p0),
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INIT_CK(NULL, "m2p0", &clk_m2p0),
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INIT_CK(NULL, "m2p1", &clk_m2p1),
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INIT_CK(NULL, "m2p1", &clk_m2p1),
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@ -401,6 +428,44 @@ static int set_div_rate(struct clk *clk, unsigned long rate)
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return 0;
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return 0;
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}
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}
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static int set_i2s_sclk_rate(struct clk *clk, unsigned long rate)
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{
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unsigned val = __raw_readl(clk->enable_reg);
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if (rate == clk_i2s_mclk.rate / 2)
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ep93xx_syscon_swlocked_write(val & ~EP93XX_I2SCLKDIV_SDIV,
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clk->enable_reg);
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else if (rate == clk_i2s_mclk.rate / 4)
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ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_SDIV,
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clk->enable_reg);
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else
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return -EINVAL;
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clk_i2s_sclk.rate = rate;
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return 0;
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}
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static int set_i2s_lrclk_rate(struct clk *clk, unsigned long rate)
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{
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unsigned val = __raw_readl(clk->enable_reg) &
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~EP93XX_I2SCLKDIV_LRDIV_MASK;
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if (rate == clk_i2s_sclk.rate / 32)
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ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_LRDIV32,
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clk->enable_reg);
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else if (rate == clk_i2s_sclk.rate / 64)
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ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_LRDIV64,
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clk->enable_reg);
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else if (rate == clk_i2s_sclk.rate / 128)
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ep93xx_syscon_swlocked_write(val | EP93XX_I2SCLKDIV_LRDIV128,
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clk->enable_reg);
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else
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return -EINVAL;
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clk_i2s_lrclk.rate = rate;
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return 0;
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}
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int clk_set_rate(struct clk *clk, unsigned long rate)
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int clk_set_rate(struct clk *clk, unsigned long rate)
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{
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{
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if (clk->set_rate)
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if (clk->set_rate)
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@ -714,6 +714,73 @@ void ep93xx_keypad_release_gpio(struct platform_device *pdev)
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}
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}
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EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
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EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
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/*************************************************************************
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* EP93xx I2S audio peripheral handling
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*************************************************************************/
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static struct resource ep93xx_i2s_resource[] = {
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{
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.start = EP93XX_I2S_PHYS_BASE,
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.end = EP93XX_I2S_PHYS_BASE + 0x100 - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device ep93xx_i2s_device = {
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.name = "ep93xx-i2s",
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.id = -1,
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.num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
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.resource = ep93xx_i2s_resource,
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};
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void __init ep93xx_register_i2s(void)
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{
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platform_device_register(&ep93xx_i2s_device);
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}
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#define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
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EP93XX_SYSCON_DEVCFG_I2SONAC97)
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#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
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EP93XX_SYSCON_I2SCLKDIV_SPOL)
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int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config)
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{
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unsigned val;
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/* Sanity check */
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if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK)
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return -EINVAL;
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if (i2s_config & ~EP93XX_I2SCLKDIV_MASK)
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return -EINVAL;
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/* Must have only one of I2SONSSP/I2SONAC97 set */
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if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) ==
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(i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97))
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return -EINVAL;
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ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
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ep93xx_devcfg_set_bits(i2s_pins);
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/*
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* This is potentially racy with the clock api for i2s_mclk, sclk and
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* lrclk. Since the i2s driver is the only user of those clocks we
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* rely on it to prevent parallel use of this function and the
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* clock api for the i2s clocks.
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*/
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val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
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val &= ~EP93XX_I2SCLKDIV_MASK;
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val |= i2s_config;
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ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
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return 0;
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}
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EXPORT_SYMBOL(ep93xx_i2s_acquire);
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void ep93xx_i2s_release(void)
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{
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ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
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}
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EXPORT_SYMBOL(ep93xx_i2s_release);
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extern void ep93xx_gpio_init(void);
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extern void ep93xx_gpio_init(void);
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@ -93,6 +93,7 @@
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/* APB peripherals */
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/* APB peripherals */
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#define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000)
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#define EP93XX_TIMER_BASE EP93XX_APB_IOMEM(0x00010000)
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#define EP93XX_I2S_PHYS_BASE EP93XX_APB_PHYS(0x00020000)
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#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000)
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#define EP93XX_I2S_BASE EP93XX_APB_IOMEM(0x00020000)
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#define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000)
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#define EP93XX_SECURITY_BASE EP93XX_APB_IOMEM(0x00030000)
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@ -194,6 +195,15 @@
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#define EP93XX_SYSCON_CLKDIV_ESEL (1<<14)
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#define EP93XX_SYSCON_CLKDIV_ESEL (1<<14)
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#define EP93XX_SYSCON_CLKDIV_PSEL (1<<13)
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#define EP93XX_SYSCON_CLKDIV_PSEL (1<<13)
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#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8
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#define EP93XX_SYSCON_CLKDIV_PDIV_SHIFT 8
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#define EP93XX_SYSCON_I2SCLKDIV EP93XX_SYSCON_REG(0x8c)
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#define EP93XX_SYSCON_I2SCLKDIV_SENA (1<<31)
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#define EP93XX_SYSCON_I2SCLKDIV_ORIDE (1<<29)
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#define EP93XX_SYSCON_I2SCLKDIV_SPOL (1<<19)
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#define EP93XX_I2SCLKDIV_SDIV (1 << 16)
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#define EP93XX_I2SCLKDIV_LRDIV32 (0 << 17)
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#define EP93XX_I2SCLKDIV_LRDIV64 (1 << 17)
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#define EP93XX_I2SCLKDIV_LRDIV128 (2 << 17)
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#define EP93XX_I2SCLKDIV_LRDIV_MASK (3 << 17)
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#define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90)
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#define EP93XX_SYSCON_KEYTCHCLKDIV EP93XX_SYSCON_REG(0x90)
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#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31)
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#define EP93XX_SYSCON_KEYTCHCLKDIV_TSEN (1<<31)
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#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
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#define EP93XX_SYSCON_KEYTCHCLKDIV_ADIV (1<<16)
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@ -55,6 +55,9 @@ void ep93xx_pwm_release_gpio(struct platform_device *pdev);
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void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data);
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void ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data);
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int ep93xx_keypad_acquire_gpio(struct platform_device *pdev);
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int ep93xx_keypad_acquire_gpio(struct platform_device *pdev);
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void ep93xx_keypad_release_gpio(struct platform_device *pdev);
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void ep93xx_keypad_release_gpio(struct platform_device *pdev);
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void ep93xx_register_i2s(void);
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int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config);
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void ep93xx_i2s_release(void);
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void ep93xx_init_devices(void);
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void ep93xx_init_devices(void);
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extern struct sys_timer ep93xx_timer;
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extern struct sys_timer ep93xx_timer;
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