sh2(A) exception handler update
This patch is By sh2 - Remove duplicate code - Reduce stack usage - Cleanup and little optimize By sh2a - Add missing handler(256 to 511) - Use sh2a instructions handler Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Yoshinori Sato
Paul Mundt
parent
cafd63b007
commit
6e80f5e8c4
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@ -3,7 +3,7 @@
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*
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* The SH-2 exception entry
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*
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* Copyright (C) 2005,2006 Yoshinori Sato
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* Copyright (C) 2005-2008 Yoshinori Sato
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* Copyright (C) 2005 AXE,Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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@ -36,43 +36,41 @@ OFF_TRA = (16*4+6*4)
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#include <asm/entry-macros.S>
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ENTRY(exception_handler)
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! already saved r0/r1
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! stack
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! r0 <- point sp
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! r1
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! pc
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! sr
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! r0 = temporary
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! r1 = vector (pseudo EXPEVT / INTEVT / TRA)
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mov.l r2,@-sp
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mov.l r3,@-sp
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mov r0,r1
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cli
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mov.l $cpu_mode,r2
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mov.l @r2,r0
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mov.l @(5*4,r15),r3 ! previous SR
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shll2 r3 ! set "S" flag
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rotl r0 ! T <- "S" flag
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rotl r0 ! "S" flag is LSB
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rotcr r3 ! T -> r3:b30
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shlr r3
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shlr r0
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bt/s 1f
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mov.l r3,@(5*4,r15) ! copy cpu mode to SR
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or r0,r3 ! set MD
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tst r0,r0
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bf/s 1f ! previous mode check
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mov.l r3,@(5*4,r15) ! update SR
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! switch to kernel mode
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mov #1,r0
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rotr r0
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rotr r0
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mov.l __md_bit,r0
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mov.l r0,@r2 ! enter kernel mode
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mov.l $current_thread_info,r2
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mov.l @r2,r2
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mov #0x20,r0
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mov #(THREAD_SIZE >> 8),r0
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shll8 r0
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add r2,r0
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mov r15,r2 ! r2 = user stack top
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mov r0,r15 ! switch kernel stack
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add #-4,r15 ! dummy
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mov.l r1,@-r15 ! TRA
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sts.l macl, @-r15
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sts.l mach, @-r15
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stc.l gbr, @-r15
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mov.l @(4*4,r2),r0
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mov.l @(5*4,r2),r1
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mov.l r1,@-r15 ! original SR
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mov.l @(5*4,r2),r0
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mov.l r0,@-r15 ! original SR
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sts.l pr,@-r15
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mov.l @(4*4,r2),r0
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mov.l r0,@-r15 ! original PC
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mov r2,r3
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add #(4+2)*4,r3 ! rewind r0 - r3 + exception frame
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@ -88,14 +86,15 @@ ENTRY(exception_handler)
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mov.l r6,@-r15
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mov.l r5,@-r15
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mov.l r4,@-r15
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mov r1,r9 ! save TRA
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mov r2,r8 ! copy user -> kernel stack
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mov.l @r8+,r3
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mov.l @(0,r8),r3
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mov.l r3,@-r15
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mov.l @r8+,r2
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mov.l @(4,r8),r2
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mov.l r2,@-r15
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mov.l @r8+,r1
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mov.l @(12,r8),r1
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mov.l r1,@-r15
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mov.l @r8+,r0
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mov.l @(8,r8),r0
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bra 2f
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mov.l r0,@-r15
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1:
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@ -107,10 +106,11 @@ ENTRY(exception_handler)
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mov.l r0,@-r15
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mov.l @r2+,r0 ! old R2
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mov.l r0,@-r15
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mov.l @r2+,r0 ! old R1
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mov.l r0,@-r15
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mov.l @r2+,r0 ! old R0
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mov.l @(4,r2),r0 ! old R1
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mov.l r0,@-r15
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mov.l @r2,r0 ! old R0
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mov.l r0,@-r15
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add #8,r2
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mov.l @r2+,r3 ! old PC
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mov.l @r2+,r0 ! old SR
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add #-4,r2 ! exception frame stub (sr)
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@ -135,14 +135,12 @@ ENTRY(exception_handler)
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mov.l r6,@-r2
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mov.l r5,@-r2
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mov.l r4,@-r2
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mov r1,r9
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mov.l @(OFF_R0,r15),r0
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mov.l @(OFF_R1,r15),r1
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mov.l @(OFF_R2,r15),r2
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mov.l @(OFF_R3,r15),r3
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2:
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mov #OFF_TRA,r8
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add r15,r8
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mov.l @r8,r9
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mov #64,r8
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cmp/hs r8,r9
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bt interrupt_entry ! vec >= 64 is interrupt
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@ -150,26 +148,14 @@ ENTRY(exception_handler)
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cmp/hs r8,r9
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bt trap_entry ! 64 > vec >= 32 is trap
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#if defined(CONFIG_SH_FPU)
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mov #13,r8
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cmp/eq r8,r9
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bt 10f ! fpu
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nop
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#endif
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mov.l 4f,r8
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mov r9,r4
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shll2 r9
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add r9,r8
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mov.l @r8,r8
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mov #0,r9
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cmp/eq r9,r8
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mov.l @r8,r8 ! exception handler address
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tst r8,r8
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bf 3f
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mov.l 8f,r8 ! unhandled exception
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#if defined(CONFIG_SH_FPU)
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10:
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mov.l 9f, r8 ! unhandled exception
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#endif
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3:
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mov.l 5f,r10
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jmp @r8
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@ -188,10 +174,7 @@ interrupt_entry:
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5: .long ret_from_exception
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6: .long ret_from_irq
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7: .long do_IRQ
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8: .long do_exception_error
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#ifdef CONFIG_SH_FPU
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9: .long fpu_error_trap_handler
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#endif
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8: .long exception_error
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trap_entry:
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mov #0x30,r8
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@ -200,24 +183,9 @@ trap_entry:
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add #-0x10,r9 ! convert SH2 to SH3/4 ABI
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1:
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shll2 r9 ! TRA
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mov #OFF_TRA,r8
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add r15,r8
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mov.l r9,@r8
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mov r9,r8
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#ifdef CONFIG_TRACE_IRQFLAGS
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mov.l 2f, r9
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jsr @r9
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nop
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#endif
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sti
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bra system_call
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nop
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bra system_call ! jump common systemcall entry
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mov r9,r8
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.align 2
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#ifdef CONFIG_TRACE_IRQFLAGS
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2: .long trace_hardirqs_on
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#endif
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#if defined(CONFIG_SH_STANDARD_BIOS)
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/* Unwind the stack and jmp to the debug entry */
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ENTRY(sh_bios_handler)
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@ -240,7 +208,7 @@ ENTRY(sh_bios_handler)
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mov.l @r2,r2
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stc sr,r3
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mov.l r2,@r0
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mov.l r3,@r0
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mov.l r3,@(4,r0)
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mov.l r1,@(8,r0)
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mov.l @r15+, r0
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mov.l @r15+, r1
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@ -272,22 +240,30 @@ ENTRY(address_error_trap_handler)
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mov.l 1f,r0
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jmp @r0
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mov #0,r5 ! writeaccess is unknown
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.align 2
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.align 2
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1: .long do_address_error
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restore_all:
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cli
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#ifdef CONFIG_TRACE_IRQFLAGS
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mov.l 1f, r0
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jsr @r0
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nop
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#endif
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stc sr,r0
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or #0xf0,r0
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ldc r0,sr ! all interrupt block (same BL = 1)
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! restore special register
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! overlap exception frame
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mov r15,r0
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add #17*4,r0
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lds.l @r0+,pr
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add #4,r0
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ldc.l @r0+,gbr
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lds.l @r0+,mach
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lds.l @r0+,macl
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mov r15,r0
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mov.l $cpu_mode,r2
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mov #OFF_SR,r3
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mov.l @(r0,r3),r1
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mov.l r1,@r2
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mov.l __md_bit,r3
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and r1,r3 ! copy MD bit
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mov.l r3,@r2
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shll2 r1 ! clear MD bit
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shlr2 r1
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mov.l @(OFF_SP,r0),r2
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@ -297,12 +273,6 @@ restore_all:
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mov #OFF_PC,r3
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mov.l @(r0,r3),r1
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mov.l r1,@r2 ! set pc
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add #4*16+4,r0
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lds.l @r0+,pr
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add #4,r0 ! skip sr
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ldc.l @r0+,gbr
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lds.l @r0+,mach
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lds.l @r0+,macl
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get_current_thread_info r0, r1
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mov.l $current_thread_info,r1
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mov.l r0,@r1
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@ -326,9 +296,8 @@ restore_all:
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nop
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.align 2
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#ifdef CONFIG_TRACE_IRQFLAGS
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1: .long trace_hardirqs_off
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#endif
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__md_bit:
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.long 0x40000000
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$current_thread_info:
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.long __current_thread_info
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$cpu_mode:
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@ -18,16 +18,17 @@
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exception_entry:
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no = 0
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.rept 256
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mov.l r0,@-sp
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mov #no,r0
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mov.l r1,@-sp
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bra exception_trampoline
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and #0xff,r0
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mov #no,r1
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no = no + 1
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.endr
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exception_trampoline:
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mov.l r1,@-sp
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mov.l $exception_handler,r1
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jmp @r1
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mov.l r0,@-sp
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mov.l $exception_handler,r0
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extu.b r1,r1
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jmp @r0
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extu.w r1,r1
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.align 2
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$exception_entry:
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@ -41,6 +42,6 @@ $exception_handler:
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ENTRY(vbr_base)
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vector = 0
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.rept 256
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.long exception_entry + vector * 8
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.long exception_entry + vector * 6
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vector = vector + 1
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.endr
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@ -4,7 +4,7 @@
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obj-y := common.o probe.o opcode_helper.o
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common-y += $(addprefix ../sh2/, ex.o entry.o)
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common-y += ex.o entry.o
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obj-$(CONFIG_SH_FPU) += fpu.o
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249
arch/sh/kernel/cpu/sh2a/entry.S
Normal file
249
arch/sh/kernel/cpu/sh2a/entry.S
Normal file
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@ -0,0 +1,249 @@
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/*
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* arch/sh/kernel/cpu/sh2a/entry.S
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*
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* The SH-2A exception entry
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*
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* Copyright (C) 2008 Yoshinori Sato
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* Based on arch/sh/kernel/cpu/sh2/entry.S
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/linkage.h>
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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#include <asm/cpu/mmu_context.h>
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#include <asm/unistd.h>
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#include <asm/errno.h>
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#include <asm/page.h>
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/* Offsets to the stack */
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OFF_R0 = 0 /* Return value. New ABI also arg4 */
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OFF_R1 = 4 /* New ABI: arg5 */
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OFF_R2 = 8 /* New ABI: arg6 */
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OFF_R3 = 12 /* New ABI: syscall_nr */
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OFF_R4 = 16 /* New ABI: arg0 */
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OFF_R5 = 20 /* New ABI: arg1 */
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OFF_R6 = 24 /* New ABI: arg2 */
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OFF_R7 = 28 /* New ABI: arg3 */
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OFF_SP = (15*4)
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OFF_PC = (16*4)
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OFF_SR = (16*4+2*4)
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OFF_TRA = (16*4+6*4)
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#include <asm/entry-macros.S>
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ENTRY(exception_handler)
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! stack
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! r0 <- point sp
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! r1
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! pc
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! sr
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! r0 = temporary
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! r1 = vector (pseudo EXPEVT / INTEVT / TRA)
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mov.l r2,@-sp
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cli
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mov.l $cpu_mode,r2
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bld.b #6,@(0,r2) !previus SR.MD
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bst.b #6,@(4*4,r15) !set cpu mode to SR.MD
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bt 1f
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! switch to kernel mode
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bset.b #6,@(0,r2) !set SR.MD
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mov.l $current_thread_info,r2
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mov.l @r2,r2
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mov #(THREAD_SIZE >> 8),r0
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shll8 r0
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add r2,r0 ! r0 = kernel stack tail
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mov r15,r2 ! r2 = user stack top
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mov r0,r15 ! switch kernel stack
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mov.l r1,@-r15 ! TRA
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sts.l macl, @-r15
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sts.l mach, @-r15
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stc.l gbr, @-r15
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mov.l @(4*4,r2),r0
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mov.l r0,@-r15 ! original SR
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sts.l pr,@-r15
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mov.l @(3*4,r2),r0
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mov.l r0,@-r15 ! original PC
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mov r2,r0
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add #(3+2)*4,r0 ! rewind r0 - r3 + exception frame
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lds r0,pr ! pr = original SP
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movmu.l r3,@-r15 ! save regs
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mov r2,r8 ! r8 = previus stack top
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mov r1,r9 ! r9 = interrupt vector
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! restore previous stack
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mov.l @r8+,r2
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mov.l @r8+,r0
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mov.l @r8+,r1
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bra 2f
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movml.l r2,@-r15
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1:
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! in kernel exception
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mov r15,r2
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add #-((OFF_TRA + 4) - OFF_PC) + 5*4,r15
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movmu.l r3,@-r15
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mov r2,r8 ! r8 = previous stack top
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mov r1,r9 ! r9 = interrupt vector
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! restore exception frame & regs
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mov.l @r8+,r2 ! old R2
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mov.l @r8+,r0 ! old R0
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mov.l @r8+,r1 ! old R1
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mov.l @r8+,r10 ! old PC
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mov.l @r8+,r11 ! old SR
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movml.l r2,@-r15
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mov.l r10,@(OFF_PC,r15)
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mov.l r11,@(OFF_SR,r15)
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mov.l r8,@(OFF_SP,r15) ! save old sp
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mov r15,r8
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add #OFF_TRA + 4,r8
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mov.l r9,@-r8
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sts.l macl,@-r8
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sts.l mach,@-r8
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stc.l gbr,@-r8
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add #-4,r8
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sts.l pr,@-r8
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2:
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! dispatch exception / interrupt
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mov #64,r8
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cmp/hs r8,r9
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bt interrupt_entry ! vec >= 64 is interrupt
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mov #32,r8
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cmp/hs r8,r9
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bt trap_entry ! 64 > vec >= 32 is trap
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mov.l 4f,r8
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mov r9,r4
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shll2 r9
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add r9,r8
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mov.l @r8,r8 ! exception handler address
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tst r8,r8
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bf 3f
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mov.l 8f,r8 ! unhandled exception
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3:
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mov.l 5f,r10
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jmp @r8
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lds r10,pr
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interrupt_entry:
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mov r9,r4
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mov r15,r5
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mov.l 7f,r8
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mov.l 6f,r9
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jmp @r8
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lds r9,pr
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.align 2
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4: .long exception_handling_table
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5: .long ret_from_exception
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6: .long ret_from_irq
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7: .long do_IRQ
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8: .long exception_error
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trap_entry:
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mov #0x30,r8
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cmp/ge r8,r9 ! vector 0x20-0x2f is systemcall
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bt 1f
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||||
add #-0x10,r9 ! convert SH2 to SH3/4 ABI
|
||||
1:
|
||||
shll2 r9 ! TRA
|
||||
bra system_call ! jump common systemcall entry
|
||||
mov r9,r8
|
||||
|
||||
#if defined(CONFIG_SH_STANDARD_BIOS)
|
||||
/* Unwind the stack and jmp to the debug entry */
|
||||
ENTRY(sh_bios_handler)
|
||||
mov r15,r0
|
||||
add #(22-4)*4-4,r0
|
||||
ldc.l @r0+,gbr
|
||||
lds.l @r0+,mach
|
||||
lds.l @r0+,macl
|
||||
mov r15,r0
|
||||
mov.l @(OFF_SP,r0),r1
|
||||
mov.l @(OFF_SR,r2),r3
|
||||
mov.l r3,@-r1
|
||||
mov.l @(OFF_SP,r2),r3
|
||||
mov.l r3,@-r1
|
||||
mov r15,r0
|
||||
add #(22-4)*4-8,r0
|
||||
mov.l 1f,r2
|
||||
mov.l @r2,r2
|
||||
stc sr,r3
|
||||
mov.l r2,@r0
|
||||
mov.l r3,@(4,r0)
|
||||
mov.l r1,@(8,r0)
|
||||
movml.l @r15+,r14
|
||||
add #8,r15
|
||||
lds.l @r15+, pr
|
||||
rte
|
||||
mov.l @r15+,r15
|
||||
.align 2
|
||||
1: .long gdb_vbr_vector
|
||||
#endif /* CONFIG_SH_STANDARD_BIOS */
|
||||
|
||||
ENTRY(address_error_trap_handler)
|
||||
mov r15,r4 ! regs
|
||||
mov.l @(OFF_PC,r15),r6 ! pc
|
||||
mov.l 1f,r0
|
||||
jmp @r0
|
||||
mov #0,r5 ! writeaccess is unknown
|
||||
|
||||
.align 2
|
||||
1: .long do_address_error
|
||||
|
||||
restore_all:
|
||||
stc sr,r0
|
||||
or #0xf0,r0
|
||||
ldc r0,sr ! all interrupt block (same BL = 1)
|
||||
! restore special register
|
||||
! overlap exception frame
|
||||
mov r15,r0
|
||||
add #17*4,r0
|
||||
lds.l @r0+,pr
|
||||
add #4,r0
|
||||
ldc.l @r0+,gbr
|
||||
lds.l @r0+,mach
|
||||
lds.l @r0+,macl
|
||||
mov r15,r0
|
||||
mov.l $cpu_mode,r2
|
||||
bld.b #6,@(OFF_SR,r15)
|
||||
bst.b #6,@(0,r2) ! save CPU mode
|
||||
mov.l @(OFF_SR,r0),r1
|
||||
shll2 r1
|
||||
shlr2 r1 ! clear MD bit
|
||||
mov.l @(OFF_SP,r0),r2
|
||||
add #-8,r2
|
||||
mov.l r2,@(OFF_SP,r0) ! point exception frame top
|
||||
mov.l r1,@(4,r2) ! set sr
|
||||
mov.l @(OFF_PC,r0),r1
|
||||
mov.l r1,@r2 ! set pc
|
||||
get_current_thread_info r0, r1
|
||||
mov.l $current_thread_info,r1
|
||||
mov.l r0,@r1
|
||||
movml.l @r15+,r14
|
||||
mov.l @r15,r15
|
||||
rte
|
||||
nop
|
||||
|
||||
.align 2
|
||||
$current_thread_info:
|
||||
.long __current_thread_info
|
||||
$cpu_mode:
|
||||
.long __cpu_mode
|
||||
|
||||
! common exception handler
|
||||
#include "../../entry-common.S"
|
||||
|
||||
.data
|
||||
! cpu operation mode
|
||||
! bit30 = MD (compatible SH3/4)
|
||||
__cpu_mode:
|
||||
.long 0x40000000
|
||||
|
||||
.section .bss
|
||||
__current_thread_info:
|
||||
.long 0
|
||||
|
||||
ENTRY(exception_handling_table)
|
||||
.space 4*32
|
||||
72
arch/sh/kernel/cpu/sh2a/ex.S
Normal file
72
arch/sh/kernel/cpu/sh2a/ex.S
Normal file
|
|
@ -0,0 +1,72 @@
|
|||
/*
|
||||
* arch/sh/kernel/cpu/sh2a/ex.S
|
||||
*
|
||||
* The SH-2A exception vector table
|
||||
*
|
||||
* Copyright (C) 2008 Yoshinori Sato
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
|
||||
!
|
||||
! convert Exception Vector to Exception Number
|
||||
!
|
||||
|
||||
! exception no 0 to 255
|
||||
exception_entry0:
|
||||
no = 0
|
||||
.rept 256
|
||||
mov.l r1,@-sp
|
||||
bra exception_trampoline0
|
||||
mov #no,r1
|
||||
no = no + 1
|
||||
.endr
|
||||
exception_trampoline0:
|
||||
mov.l r0,@-sp
|
||||
mov.l 1f,r0
|
||||
extu.b r1,r1
|
||||
jmp @r0
|
||||
extu.w r1,r1
|
||||
|
||||
.align 2
|
||||
1: .long exception_handler
|
||||
|
||||
! exception no 256 to 511
|
||||
exception_entry1:
|
||||
no = 0
|
||||
.rept 256
|
||||
mov.l r1,@-sp
|
||||
bra exception_trampoline1
|
||||
mov #no,r1
|
||||
no = no + 1
|
||||
.endr
|
||||
exception_trampoline1:
|
||||
mov.l r0,@-sp
|
||||
extu.b r1,r1
|
||||
movi20 #0x100,r0
|
||||
add r0,r1
|
||||
mov.l 1f,r0
|
||||
jmp @r0
|
||||
extu.w r1,r1
|
||||
|
||||
.align 2
|
||||
1: .long exception_handler
|
||||
|
||||
!
|
||||
! Exception Vector Base
|
||||
!
|
||||
.align 2
|
||||
ENTRY(vbr_base)
|
||||
vector = 0
|
||||
.rept 256
|
||||
.long exception_entry0 + vector * 6
|
||||
vector = vector + 1
|
||||
.endr
|
||||
.rept 256
|
||||
.long exception_entry1 + vector * 6
|
||||
vector = vector + 1
|
||||
.endr
|
||||
|
|
@ -43,6 +43,7 @@
|
|||
# define TRAP_ILLEGAL_SLOT_INST 6
|
||||
# define TRAP_ADDRESS_ERROR 9
|
||||
# ifdef CONFIG_CPU_SH2A
|
||||
# define TRAP_FPU_ERROR 13
|
||||
# define TRAP_DIVZERO_ERROR 17
|
||||
# define TRAP_DIVOVF_ERROR 18
|
||||
# endif
|
||||
|
|
@ -851,6 +852,9 @@ void __init trap_init(void)
|
|||
#ifdef CONFIG_CPU_SH2A
|
||||
set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error);
|
||||
set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error);
|
||||
#ifdef CONFIG_SH_FPU
|
||||
set_exception_table_vec(TRAP_FPU_ERROR, fpu_error_trap_handler);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* Setup VBR for boot cpu */
|
||||
|
|
|
|||
Loading…
Reference in a new issue