RDMA/cxgb3: ctrl-qp init/clear shouldn't set the gen bit
Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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@ -144,7 +144,7 @@ static int cxio_hal_clear_qp_ctx(struct cxio_rdev *rdev_p, u32 qpid)
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}
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wqe = (struct t3_modify_qp_wr *) skb_put(skb, sizeof(*wqe));
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memset(wqe, 0, sizeof(*wqe));
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build_fw_riwrh((struct fw_riwrh *) wqe, T3_WR_QP_MOD, 3, 1, qpid, 7);
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build_fw_riwrh((struct fw_riwrh *) wqe, T3_WR_QP_MOD, 3, 0, qpid, 7);
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wqe->flags = cpu_to_be32(MODQP_WRITE_EC);
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sge_cmd = qpid << 8 | 3;
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wqe->sge_cmd = cpu_to_be64(sge_cmd);
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@ -548,7 +548,7 @@ static int cxio_hal_init_ctrl_qp(struct cxio_rdev *rdev_p)
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V_EC_UP_TOKEN(T3_CTL_QP_TID) | F_EC_VALID)) << 32;
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wqe = (struct t3_modify_qp_wr *) skb_put(skb, sizeof(*wqe));
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memset(wqe, 0, sizeof(*wqe));
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build_fw_riwrh((struct fw_riwrh *) wqe, T3_WR_QP_MOD, 0, 1,
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build_fw_riwrh((struct fw_riwrh *) wqe, T3_WR_QP_MOD, 0, 0,
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T3_CTL_QP_TID, 7);
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wqe->flags = cpu_to_be32(MODQP_WRITE_EC);
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sge_cmd = (3ULL << 56) | FW_RI_SGEEC_START << 8 | 3;
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