KVM: arm64: Introduce handling of AArch32 TTBCR2 traps
commit ca4e514774
upstream.
ARMv8.2 introduced TTBCR2, which shares TCR_EL1 with TTBCR.
Gracefully handle traps to this register when HCR_EL2.TVM is set.
Cc: stable@vger.kernel.org
Reported-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
5.4-rM2-2.2.x-imx-squashed
parent
8635f0fe06
commit
6ee6e4e5a4
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@ -182,6 +182,7 @@ enum vcpu_sysreg {
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#define c2_TTBR1 (TTBR1_EL1 * 2) /* Translation Table Base Register 1 */
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#define c2_TTBR1_high (c2_TTBR1 + 1) /* TTBR1 top 32 bits */
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#define c2_TTBCR (TCR_EL1 * 2) /* Translation Table Base Control R. */
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#define c2_TTBCR2 (c2_TTBCR + 1) /* Translation Table Base Control R. 2 */
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#define c3_DACR (DACR32_EL2 * 2)/* Domain Access Control Register */
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#define c5_DFSR (ESR_EL1 * 2) /* Data Fault Status Register */
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#define c5_IFSR (IFSR32_EL2 * 2)/* Instruction Fault Status Register */
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@ -1837,6 +1837,7 @@ static const struct sys_reg_desc cp15_regs[] = {
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{ Op1( 0), CRn( 2), CRm( 0), Op2( 0), access_vm_reg, NULL, c2_TTBR0 },
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{ Op1( 0), CRn( 2), CRm( 0), Op2( 1), access_vm_reg, NULL, c2_TTBR1 },
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{ Op1( 0), CRn( 2), CRm( 0), Op2( 2), access_vm_reg, NULL, c2_TTBCR },
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{ Op1( 0), CRn( 2), CRm( 0), Op2( 3), access_vm_reg, NULL, c2_TTBCR2 },
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{ Op1( 0), CRn( 3), CRm( 0), Op2( 0), access_vm_reg, NULL, c3_DACR },
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{ Op1( 0), CRn( 5), CRm( 0), Op2( 0), access_vm_reg, NULL, c5_DFSR },
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{ Op1( 0), CRn( 5), CRm( 0), Op2( 1), access_vm_reg, NULL, c5_IFSR },
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