Merge branch '3.15/dss-dt-dts' into 3.15/fbdev
OMAP DSS related .dts changeshifive-unleashed-5.1
Tomi Valkeinen
commit
703cc5df19
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@ -0,0 +1,22 @@
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OMAP Dynamic Memory Manager (DMM) bindings
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The dynamic memory manager (DMM) is a module located immediately in front of the
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SDRAM controllers (called EMIFs on OMAP). DMM manages various aspects of memory
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accesses such as priority generation amongst initiators, configuration of SDRAM
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interleaving, optimizing transfer of 2D block objects, and provide MMU-like page
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translation for initiators which need contiguous dma bus addresses.
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Required properties:
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- compatible: Should contain "ti,omap4-dmm" for OMAP4 family
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Should contain "ti,omap5-dmm" for OMAP5 and DRA7x family
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- reg: Contains DMM register address range (base address and length)
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- interrupts: Should contain an interrupt-specifier for DMM_IRQ.
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- ti,hwmods: Name of the hwmod associated to DMM, which is typically "dmm"
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Example:
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dmm@4e000000 {
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compatible = "ti,omap4-dmm";
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reg = <0x4e000000 0x800>;
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ti,hwmods = "dmm";
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};
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@ -99,6 +99,9 @@ Boards:
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- OMAP4 PandaBoard : Low cost community board
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compatible = "ti,omap4-panda", "ti,omap4430"
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- OMAP4 DuoVero with Parlor : Commercial expansion board with daughter board
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compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4";
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- OMAP3 EVM : Software Development Board for OMAP35x, AM/DM37x
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compatible = "ti,omap3-evm", "ti,omap3"
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@ -114,5 +117,8 @@ Boards:
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- AM43x EPOS EVM
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compatible = "ti,am43x-epos-evm", "ti,am4372", "ti,am43"
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- AM437x GP EVM
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compatible = "ti,am437x-gp-evm", "ti,am4372", "ti,am43"
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- DRA7 EVM: Software Developement Board for DRA7XX
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compatible = "ti,dra7-evm", "ti,dra7"
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@ -21,7 +21,7 @@ Documentation/devicetree/bindings/mfd/omap-usb-host.txt
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Example for OMAP4:
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usbhsehci: ehci@4a064c00 {
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compatible = "ti,ehci-omap", "usb-ehci";
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compatible = "ti,ehci-omap";
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reg = <0x4a064c00 0x400>;
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interrupts = <0 77 0x4>;
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};
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@ -9,7 +9,7 @@ Required properties:
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Example for OMAP4:
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usbhsohci: ohci@4a064800 {
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compatible = "ti,ohci-omap3", "usb-ohci";
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compatible = "ti,ohci-omap3";
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reg = <0x4a064800 0x400>;
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interrupts = <0 76 0x4>;
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};
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@ -199,6 +199,10 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
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omap2420-n810-wimax.dtb \
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omap3430-sdp.dtb \
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omap3-beagle.dtb \
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omap3-cm-t3517.dtb \
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omap3-sbc-t3517.dtb \
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omap3-cm-t3530.dtb \
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omap3-sbc-t3530.dtb \
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omap3-cm-t3730.dtb \
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omap3-sbc-t3730.dtb \
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omap3-devkit8000.dtb \
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@ -214,7 +218,9 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
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omap3-gta04.dtb \
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omap3-igep0020.dtb \
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omap3-igep0030.dtb \
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omap3-lilly-dbb056.dtb \
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omap3-zoom3.dtb \
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omap4-duovero-parlor.dtb \
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omap4-panda.dtb \
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omap4-panda-a4.dtb \
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omap4-panda-es.dtb \
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@ -228,9 +234,11 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
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am335x-boneblack.dtb \
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am335x-nano.dtb \
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am335x-base0033.dtb \
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am3517-craneboard.dtb \
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am3517-evm.dtb \
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am3517_mt_ventoux.dtb \
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am43x-epos-evm.dtb \
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am437x-gp-evm.dtb \
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dra7-evm.dtb
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dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
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dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
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@ -260,6 +260,12 @@
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
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>;
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};
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lcd_pins_s0: lcd_pins_s0 {
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pinctrl-single,pins = <
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0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */
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@ -434,9 +440,9 @@
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ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
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nand@0,0 {
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reg = <0 0 0>; /* CS0, offset 0 */
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nand-bus-width = <8>;
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ti,nand-ecc-opt = "bch8";
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gpmc,device-nand = "true";
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ti,elm-id = <&elm>;
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nand-bus-width = <8>;
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gpmc,device-width = <1>;
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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@ -460,50 +466,51 @@
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gpmc,wait-monitoring-ns = <0>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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/* MTD partition table */
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/* All SPL-* partitions are sized to minimal length
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* which can be independently programmable. For
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* NAND flash this is equal to size of erase-block */
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#address-cells = <1>;
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#size-cells = <1>;
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elm_id = <&elm>;
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/* MTD partition table */
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partition@0 {
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label = "SPL1";
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label = "NAND.SPL";
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reg = <0x00000000 0x000020000>;
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};
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partition@1 {
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label = "SPL2";
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label = "NAND.SPL.backup1";
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reg = <0x00020000 0x00020000>;
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};
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partition@2 {
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label = "SPL3";
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label = "NAND.SPL.backup2";
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reg = <0x00040000 0x00020000>;
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};
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partition@3 {
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label = "SPL4";
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label = "NAND.SPL.backup3";
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reg = <0x00060000 0x00020000>;
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};
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partition@4 {
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label = "U-boot";
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reg = <0x00080000 0x001e0000>;
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label = "NAND.u-boot-spl";
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reg = <0x00080000 0x00040000>;
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};
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partition@5 {
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label = "environment";
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reg = <0x00260000 0x00020000>;
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label = "NAND.u-boot";
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reg = <0x000C0000 0x00100000>;
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};
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partition@6 {
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label = "Kernel";
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reg = <0x00280000 0x00500000>;
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label = "NAND.u-boot-env";
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reg = <0x001C0000 0x00020000>;
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};
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partition@7 {
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label = "File-System";
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reg = <0x00780000 0x0F880000>;
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label = "NAND.u-boot-env.backup1";
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reg = <0x001E0000 0x00020000>;
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};
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partition@8 {
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label = "NAND.kernel";
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reg = <0x00200000 0x00800000>;
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};
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partition@9 {
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label = "NAND.file-system";
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reg = <0x00A00000 0x0F600000>;
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};
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};
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};
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@ -643,6 +650,9 @@
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status = "okay";
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vmmc-supply = <&vmmc_reg>;
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
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};
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&sham {
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@ -45,6 +45,18 @@
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regulator-boot-on;
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};
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wl12xx_vmmc: fixedregulator@2 {
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pinctrl-names = "default";
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pinctrl-0 = <&wl12xx_gpio>;
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compatible = "regulator-fixed";
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regulator-name = "vwl1271";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&gpio1 29 0>;
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startup-delay-us = <70000>;
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enable-active-high;
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};
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leds {
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pinctrl-names = "default";
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pinctrl-0 = <&user_leds_s0>;
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@ -270,6 +282,24 @@
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0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
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>;
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};
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mmc2_pins: pinmux_mmc2_pins {
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pinctrl-single,pins = <
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0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
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0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
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0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
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0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
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0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
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0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
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0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
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>;
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};
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wl12xx_gpio: pinmux_wl12xx_gpio {
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pinctrl-single,pins = <
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0x7c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
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>;
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};
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};
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&uart0 {
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@ -342,9 +372,22 @@
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status = "okay";
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};
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usb-phy@47401b00 {
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status = "okay";
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};
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usb@47401000 {
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status = "okay";
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};
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usb@47401800 {
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status = "okay";
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dr_mode = "host";
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};
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dma-controller@07402000 {
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status = "okay";
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};
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};
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&epwmss2 {
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@ -440,6 +483,7 @@
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&cpsw_default>;
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pinctrl-1 = <&cpsw_sleep>;
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dual_emac = <1>;
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};
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&davinci_mdio {
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@ -451,11 +495,13 @@
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&cpsw_emac0 {
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phy_id = <&davinci_mdio>, <0>;
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phy-mode = "rgmii-txid";
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dual_emac_res_vlan = <1>;
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <1>;
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phy-mode = "rgmii-txid";
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dual_emac_res_vlan = <2>;
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};
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&mmc1 {
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@ -479,6 +525,16 @@
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ti,no-reset-on-init;
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};
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&mmc2 {
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status = "okay";
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vmmc-supply = <&wl12xx_vmmc>;
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ti,non-removable;
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bus-width = <4>;
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cap-power-off-card;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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};
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&mcasp1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcasp1_pins>;
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|
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@ -58,6 +58,10 @@
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275000 1125000
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>;
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voltage-tolerance = <2>; /* 2 percentage */
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clocks = <&dpll_mpu_ck>;
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clock-names = "cpu";
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clock-latency = <300000>; /* From omap-cpufreq driver */
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};
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};
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@ -318,6 +322,7 @@
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compatible = "ti,omap4-hwspinlock";
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reg = <0x480ca000 0x1000>;
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ti,hwmods = "spinlock";
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#hwlock-cells = <1>;
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};
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wdt2: wdt@44e35000 {
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@ -399,7 +404,7 @@
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ti,timer-pwm;
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};
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rtc@44e3e000 {
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rtc: rtc@44e3e000 {
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compatible = "ti,da830-rtc";
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reg = <0x44e3e000 0x1000>;
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interrupts = <75
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@ -582,6 +587,8 @@
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compatible = "ti,am33xx-ecap";
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#pwm-cells = <3>;
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reg = <0x48300100 0x80>;
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interrupts = <31>;
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interrupt-names = "ecap0";
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ti,hwmods = "ecap0";
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status = "disabled";
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};
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@ -610,6 +617,8 @@
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compatible = "ti,am33xx-ecap";
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#pwm-cells = <3>;
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reg = <0x48302100 0x80>;
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interrupts = <47>;
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interrupt-names = "ecap1";
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ti,hwmods = "ecap1";
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status = "disabled";
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};
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@ -638,6 +647,8 @@
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compatible = "ti,am33xx-ecap";
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#pwm-cells = <3>;
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reg = <0x48304100 0x80>;
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interrupts = <61>;
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interrupt-names = "ecap2";
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ti,hwmods = "ecap2";
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status = "disabled";
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};
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|
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@ -0,0 +1,174 @@
|
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/*
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* See craneboard.org for more details
|
||||
*
|
||||
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
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*/
|
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/dts-v1/;
|
||||
|
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#include "am3517.dtsi"
|
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|
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/ {
|
||||
model = "TI AM3517 CraneBoard (TMDSEVM3517)";
|
||||
compatible = "ti,am3517-craneboard", "ti,am3517", "ti,omap3";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
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reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
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vbat: fixedregulator@0 {
|
||||
compatible = "regulator-fixed";
|
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regulator-name = "vbat";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
&davinci_emac {
|
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status = "okay";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <2600000>;
|
||||
|
||||
tps: tps@2d {
|
||||
reg = <0x2d>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
/* goes to expansion connector */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
/* goes to expansion connector */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
vmmc-supply = <&vdd2_reg>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
/* goes to expansion connector */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
/* goes to expansion connector */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
#include "tps65910.dtsi"
|
||||
|
||||
&omap3_pmx_core {
|
||||
tps_pins: pinmux_tps_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq.sys_nirq */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&tps {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tps_pins>;
|
||||
|
||||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
ti,en-ck32k-xtal;
|
||||
|
||||
vcc1-supply = <&vbat>;
|
||||
vcc2-supply = <&vbat>;
|
||||
vcc3-supply = <&vbat>;
|
||||
vcc4-supply = <&vbat>;
|
||||
vcc5-supply = <&vbat>;
|
||||
vcc6-supply = <&vbat>;
|
||||
vcc7-supply = <&vbat>;
|
||||
vccio-supply = <&vbat>;
|
||||
|
||||
regulators {
|
||||
vrtc_reg: regulator@0 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vio_reg: regulator@1 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/*
|
||||
* Unused:
|
||||
* VDIG1=2.7V,300mA max
|
||||
* VDIG2=1.8V,300mA max
|
||||
*/
|
||||
|
||||
vpll_reg: regulator@7 {
|
||||
/* VDDS_DPLL_1V8 */
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux1_reg: regulator@9 {
|
||||
/* VDDS_SRAM_1V8 */
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vaux2_reg: regulator@10 {
|
||||
/* VDDA1P8V_USBPHY */
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VAUX33 unused */
|
||||
|
||||
vdac_reg: regulator@8 {
|
||||
/* VDDA_DAC_1V8 */
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vmmc_reg: regulator@12 {
|
||||
/* VDDA3P3V_USBPHY */
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd1_reg: regulator@2 {
|
||||
/* VDD_CORE */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd2_reg: regulator@3 {
|
||||
/* VDDSHV_3V3 */
|
||||
regulator-name = "vdd_shv";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
/* VDD3 unused */
|
||||
};
|
||||
};
|
||||
|
|
@ -8,6 +8,7 @@
|
|||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
|
|
@ -33,6 +34,11 @@
|
|||
compatible = "arm,cortex-a9";
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
|
||||
clocks = <&dpll_mpu_ck>;
|
||||
clock-names = "cpu";
|
||||
|
||||
clock-latency = <300000>; /* From omap-cpufreq driver */
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -351,6 +357,13 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
hwspinlock: spinlock@480ca000 {
|
||||
compatible = "ti,omap4-hwspinlock";
|
||||
reg = <0x480ca000 0x1000>;
|
||||
ti,hwmods = "spinlock";
|
||||
#hwlock-cells = <1>;
|
||||
};
|
||||
|
||||
i2c0: i2c@44e0b000 {
|
||||
compatible = "ti,am4372-i2c","ti,omap4-i2c";
|
||||
reg = <0x44e0b000 0x1000>;
|
||||
|
|
@ -521,6 +534,7 @@
|
|||
|
||||
ecap0: ecap@48300100 {
|
||||
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48300100 0x80>;
|
||||
ti,hwmods = "ecap0";
|
||||
status = "disabled";
|
||||
|
|
@ -528,6 +542,7 @@
|
|||
|
||||
ehrpwm0: ehrpwm@48300200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48300200 0x80>;
|
||||
ti,hwmods = "ehrpwm0";
|
||||
status = "disabled";
|
||||
|
|
@ -545,6 +560,7 @@
|
|||
|
||||
ecap1: ecap@48302100 {
|
||||
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48302100 0x80>;
|
||||
ti,hwmods = "ecap1";
|
||||
status = "disabled";
|
||||
|
|
@ -552,6 +568,7 @@
|
|||
|
||||
ehrpwm1: ehrpwm@48302200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48302200 0x80>;
|
||||
ti,hwmods = "ehrpwm1";
|
||||
status = "disabled";
|
||||
|
|
@ -569,6 +586,7 @@
|
|||
|
||||
ecap2: ecap@48304100 {
|
||||
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48304100 0x80>;
|
||||
ti,hwmods = "ecap2";
|
||||
status = "disabled";
|
||||
|
|
@ -576,6 +594,7 @@
|
|||
|
||||
ehrpwm2: ehrpwm@48304200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48304200 0x80>;
|
||||
ti,hwmods = "ehrpwm2";
|
||||
status = "disabled";
|
||||
|
|
@ -593,6 +612,7 @@
|
|||
|
||||
ehrpwm3: ehrpwm@48306200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48306200 0x80>;
|
||||
ti,hwmods = "ehrpwm3";
|
||||
status = "disabled";
|
||||
|
|
@ -610,6 +630,7 @@
|
|||
|
||||
ehrpwm4: ehrpwm@48308200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x48308200 0x80>;
|
||||
ti,hwmods = "ehrpwm4";
|
||||
status = "disabled";
|
||||
|
|
@ -627,6 +648,7 @@
|
|||
|
||||
ehrpwm5: ehrpwm@4830a200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
#pwm-cells = <3>;
|
||||
reg = <0x4830a200 0x80>;
|
||||
ti,hwmods = "ehrpwm5";
|
||||
status = "disabled";
|
||||
|
|
@ -689,6 +711,30 @@
|
|||
<&edma 11>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
elm: elm@48080000 {
|
||||
compatible = "ti,am3352-elm";
|
||||
reg = <0x48080000 0x2000>;
|
||||
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "elm";
|
||||
clocks = <&l4ls_gclk>;
|
||||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpmc: gpmc@50000000 {
|
||||
compatible = "ti,am3352-gpmc";
|
||||
ti,hwmods = "gpmc";
|
||||
clocks = <&l3s_gclk>;
|
||||
clock-names = "fck";
|
||||
reg = <0x50000000 0x2000>;
|
||||
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
|
||||
gpmc,num-cs = <7>;
|
||||
gpmc,num-waitpins = <2>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,127 @@
|
|||
/*
|
||||
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/* AM437x GP EVM */
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "am4372.dtsi"
|
||||
#include <dt-bindings/pinctrl/am43xx.h>
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
model = "TI AM437x GP EVM";
|
||||
compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";
|
||||
|
||||
vmmcsd_fixed: fixedregulator-sd {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmcsd_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
|
||||
brightness-levels = <0 51 53 56 62 75 101 152 255>;
|
||||
default-brightness-level = <8>;
|
||||
};
|
||||
|
||||
matrix_keypad: matrix_keypad@0 {
|
||||
compatible = "gpio-matrix-keypad";
|
||||
debounce-delay-ms = <5>;
|
||||
col-scan-delay-us = <2>;
|
||||
|
||||
row-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH /* Bank3, pin21 */
|
||||
&gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */
|
||||
&gpio4 2 GPIO_ACTIVE_HIGH>; /* Bank4, pin2 */
|
||||
|
||||
col-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH /* Bank3, pin19 */
|
||||
&gpio3 20 GPIO_ACTIVE_HIGH>; /* Bank3, pin20 */
|
||||
|
||||
linux,keymap = <0x00000201 /* P1 */
|
||||
0x00010202 /* P2 */
|
||||
0x01000067 /* UP */
|
||||
0x0101006a /* RIGHT */
|
||||
0x02000069 /* LEFT */
|
||||
0x0201006c>; /* DOWN */
|
||||
};
|
||||
};
|
||||
|
||||
&am43xx_pinmux {
|
||||
i2c0_pins: i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
|
||||
0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
|
||||
ecap0_pins: backlight_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x164 MUX_MODE0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
};
|
||||
|
||||
&epwmss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ecap0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ecap0_pins>;
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
|
@ -13,6 +13,7 @@
|
|||
#include "am4372.dtsi"
|
||||
#include <dt-bindings/pinctrl/am43xx.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
|
||||
/ {
|
||||
model = "TI AM43x EPOS EVM";
|
||||
|
|
@ -79,6 +80,64 @@
|
|||
0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
nand_flash_x8: nand_flash_x8 {
|
||||
pinctrl-single,pins = <
|
||||
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.SELQSPIorNAND/GPIO */
|
||||
0x0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
||||
0x4 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
||||
0x8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
||||
0xc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
0x10 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
0x14 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
0x18 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
0x1c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
0x74 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */
|
||||
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
|
||||
>;
|
||||
};
|
||||
|
||||
ecap0_pins: backlight_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x164 MUX_MODE0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x1c0 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_sda.i2c2_sda */
|
||||
0x1c4 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_scl.i2c2_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
spi0_pins: pinmux_spi0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x150 (PIN_INPUT | MUX_MODE0) /* spi0_clk.spi0_clk */
|
||||
0x154 (PIN_OUTPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
|
||||
0x158 (PIN_INPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
|
||||
0x15c (PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
spi1_pins: pinmux_spi1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x190 (PIN_INPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_clk */
|
||||
0x194 (PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
|
||||
0x198 (PIN_INPUT | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
|
||||
0x19c (PIN_OUTPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
matrix_keypad: matrix_keypad@0 {
|
||||
|
|
@ -113,12 +172,22 @@
|
|||
0x0203006c /* DOWN */
|
||||
0x03030069>; /* LEFT */
|
||||
};
|
||||
|
||||
backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
|
||||
brightness-levels = <0 51 53 56 62 75 101 152 255>;
|
||||
default-brightness-level = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&mac {
|
||||
|
|
@ -169,6 +238,12 @@
|
|||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -184,3 +259,111 @@
|
|||
&gpio3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&elm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&nand_flash_x8>;
|
||||
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
|
||||
nand@0,0 {
|
||||
reg = <0 0 0>; /* CS0, offset 0 */
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
ti,elm-id = <&elm>;
|
||||
nand-bus-width = <8>;
|
||||
gpmc,device-width = <1>;
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <40>; /* tCEA + tCHZ + 1 */
|
||||
gpmc,cs-wr-off-ns = <40>;
|
||||
gpmc,adv-on-ns = <0>; /* cs-on-ns */
|
||||
gpmc,adv-rd-off-ns = <25>; /* min( tALH + tALS + 1) */
|
||||
gpmc,adv-wr-off-ns = <25>; /* min( tALH + tALS + 1) */
|
||||
gpmc,we-on-ns = <0>; /* cs-on-ns */
|
||||
gpmc,we-off-ns = <20>; /* we-on-time + tWP + 2 */
|
||||
gpmc,oe-on-ns = <3>; /* cs-on-ns + tRR + 2 */
|
||||
gpmc,oe-off-ns = <30>; /* oe-on-ns + tRP + 2 */
|
||||
gpmc,access-ns = <30>; /* tCEA + 4*/
|
||||
gpmc,rd-cycle-ns = <40>;
|
||||
gpmc,wr-cycle-ns = <40>;
|
||||
gpmc,wait-on-read = "true";
|
||||
gpmc,wait-on-write = "true";
|
||||
gpmc,bus-turnaround-ns = <0>;
|
||||
gpmc,cycle2cycle-delay-ns = <0>;
|
||||
gpmc,clk-activation-ns = <0>;
|
||||
gpmc,wait-monitoring-ns = <0>;
|
||||
gpmc,wr-access-ns = <40>;
|
||||
gpmc,wr-data-mux-bus-ns = <0>;
|
||||
/* MTD partition table */
|
||||
/* All SPL-* partitions are sized to minimal length
|
||||
* which can be independently programmable. For
|
||||
* NAND flash this is equal to size of erase-block */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "NAND.SPL";
|
||||
reg = <0x00000000 0x00040000>;
|
||||
};
|
||||
partition@1 {
|
||||
label = "NAND.SPL.backup1";
|
||||
reg = <0x00040000 0x00040000>;
|
||||
};
|
||||
partition@2 {
|
||||
label = "NAND.SPL.backup2";
|
||||
reg = <0x00080000 0x00040000>;
|
||||
};
|
||||
partition@3 {
|
||||
label = "NAND.SPL.backup3";
|
||||
reg = <0x000C0000 0x00040000>;
|
||||
};
|
||||
partition@4 {
|
||||
label = "NAND.u-boot-spl-os";
|
||||
reg = <0x00100000 0x00080000>;
|
||||
};
|
||||
partition@5 {
|
||||
label = "NAND.u-boot";
|
||||
reg = <0x00180000 0x00100000>;
|
||||
};
|
||||
partition@6 {
|
||||
label = "NAND.u-boot-env";
|
||||
reg = <0x00280000 0x00040000>;
|
||||
};
|
||||
partition@7 {
|
||||
label = "NAND.u-boot-env.backup1";
|
||||
reg = <0x002C0000 0x00040000>;
|
||||
};
|
||||
partition@8 {
|
||||
label = "NAND.kernel";
|
||||
reg = <0x00300000 0x00700000>;
|
||||
};
|
||||
partition@9 {
|
||||
label = "NAND.file-system";
|
||||
reg = <0x00800000 0x1F600000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&epwmss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ecap0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ecap0_pins>;
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -47,6 +47,11 @@
|
|||
1000000 1060000
|
||||
1176000 1160000
|
||||
>;
|
||||
|
||||
clocks = <&dpll_mpu_ck>;
|
||||
clock-names = "cpu";
|
||||
|
||||
clock-latency = <300000>; /* From omap-cpufreq driver */
|
||||
};
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
|
|
@ -464,6 +469,20 @@
|
|||
ti,hwmods = "wd_timer2";
|
||||
};
|
||||
|
||||
hwspinlock: spinlock@4a0f6000 {
|
||||
compatible = "ti,omap4-hwspinlock";
|
||||
reg = <0x4a0f6000 0x1000>;
|
||||
ti,hwmods = "spinlock";
|
||||
#hwlock-cells = <1>;
|
||||
};
|
||||
|
||||
dmm@4e000000 {
|
||||
compatible = "ti,omap5-dmm";
|
||||
reg = <0x4e000000 0x800>;
|
||||
interrupts = <0 113 0x4>;
|
||||
ti,hwmods = "dmm";
|
||||
};
|
||||
|
||||
i2c1: i2c@48070000 {
|
||||
compatible = "ti,omap4-i2c";
|
||||
reg = <0x48070000 0x100>;
|
||||
|
|
@ -559,6 +578,138 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
abb_mpu: regulator-abb-mpu {
|
||||
compatible = "ti,abb-v3";
|
||||
regulator-name = "abb_mpu";
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&sys_clkin1>;
|
||||
ti,settling-time = <50>;
|
||||
ti,clock-cycles = <16>;
|
||||
|
||||
reg = <0x4ae07ddc 0x4>, <0x4ae07de0 0x4>,
|
||||
<0x4ae06014 0x4>, <0x4a003b20 0x8>,
|
||||
<0x4ae0c158 0x4>;
|
||||
reg-names = "setup-address", "control-address",
|
||||
"int-address", "efuse-address",
|
||||
"ldo-address";
|
||||
ti,tranxdone-status-mask = <0x80>;
|
||||
/* LDOVBBMPU_FBB_MUX_CTRL */
|
||||
ti,ldovbb-override-mask = <0x400>;
|
||||
/* LDOVBBMPU_FBB_VSET_OUT */
|
||||
ti,ldovbb-vset-mask = <0x1F>;
|
||||
|
||||
/*
|
||||
* NOTE: only FBB mode used but actual vset will
|
||||
* determine final biasing
|
||||
*/
|
||||
ti,abb_info = <
|
||||
/*uV ABB efuse rbb_m fbb_m vset_m*/
|
||||
1060000 0 0x0 0 0x02000000 0x01F00000
|
||||
1160000 0 0x4 0 0x02000000 0x01F00000
|
||||
1210000 0 0x8 0 0x02000000 0x01F00000
|
||||
>;
|
||||
};
|
||||
|
||||
abb_ivahd: regulator-abb-ivahd {
|
||||
compatible = "ti,abb-v3";
|
||||
regulator-name = "abb_ivahd";
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&sys_clkin1>;
|
||||
ti,settling-time = <50>;
|
||||
ti,clock-cycles = <16>;
|
||||
|
||||
reg = <0x4ae07e34 0x4>, <0x4ae07e24 0x4>,
|
||||
<0x4ae06010 0x4>, <0x4a0025cc 0x8>,
|
||||
<0x4a002470 0x4>;
|
||||
reg-names = "setup-address", "control-address",
|
||||
"int-address", "efuse-address",
|
||||
"ldo-address";
|
||||
ti,tranxdone-status-mask = <0x40000000>;
|
||||
/* LDOVBBIVA_FBB_MUX_CTRL */
|
||||
ti,ldovbb-override-mask = <0x400>;
|
||||
/* LDOVBBIVA_FBB_VSET_OUT */
|
||||
ti,ldovbb-vset-mask = <0x1F>;
|
||||
|
||||
/*
|
||||
* NOTE: only FBB mode used but actual vset will
|
||||
* determine final biasing
|
||||
*/
|
||||
ti,abb_info = <
|
||||
/*uV ABB efuse rbb_m fbb_m vset_m*/
|
||||
1055000 0 0x0 0 0x02000000 0x01F00000
|
||||
1150000 0 0x4 0 0x02000000 0x01F00000
|
||||
1250000 0 0x8 0 0x02000000 0x01F00000
|
||||
>;
|
||||
};
|
||||
|
||||
abb_dspeve: regulator-abb-dspeve {
|
||||
compatible = "ti,abb-v3";
|
||||
regulator-name = "abb_dspeve";
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&sys_clkin1>;
|
||||
ti,settling-time = <50>;
|
||||
ti,clock-cycles = <16>;
|
||||
|
||||
reg = <0x4ae07e30 0x4>, <0x4ae07e20 0x4>,
|
||||
<0x4ae06010 0x4>, <0x4a0025e0 0x8>,
|
||||
<0x4a00246c 0x4>;
|
||||
reg-names = "setup-address", "control-address",
|
||||
"int-address", "efuse-address",
|
||||
"ldo-address";
|
||||
ti,tranxdone-status-mask = <0x20000000>;
|
||||
/* LDOVBBDSPEVE_FBB_MUX_CTRL */
|
||||
ti,ldovbb-override-mask = <0x400>;
|
||||
/* LDOVBBDSPEVE_FBB_VSET_OUT */
|
||||
ti,ldovbb-vset-mask = <0x1F>;
|
||||
|
||||
/*
|
||||
* NOTE: only FBB mode used but actual vset will
|
||||
* determine final biasing
|
||||
*/
|
||||
ti,abb_info = <
|
||||
/*uV ABB efuse rbb_m fbb_m vset_m*/
|
||||
1055000 0 0x0 0 0x02000000 0x01F00000
|
||||
1150000 0 0x4 0 0x02000000 0x01F00000
|
||||
1250000 0 0x8 0 0x02000000 0x01F00000
|
||||
>;
|
||||
};
|
||||
|
||||
abb_gpu: regulator-abb-gpu {
|
||||
compatible = "ti,abb-v3";
|
||||
regulator-name = "abb_gpu";
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&sys_clkin1>;
|
||||
ti,settling-time = <50>;
|
||||
ti,clock-cycles = <16>;
|
||||
|
||||
reg = <0x4ae07de4 0x4>, <0x4ae07de8 0x4>,
|
||||
<0x4ae06010 0x4>, <0x4a003b08 0x8>,
|
||||
<0x4ae0c154 0x4>;
|
||||
reg-names = "setup-address", "control-address",
|
||||
"int-address", "efuse-address",
|
||||
"ldo-address";
|
||||
ti,tranxdone-status-mask = <0x10000000>;
|
||||
/* LDOVBBGPU_FBB_MUX_CTRL */
|
||||
ti,ldovbb-override-mask = <0x400>;
|
||||
/* LDOVBBGPU_FBB_VSET_OUT */
|
||||
ti,ldovbb-vset-mask = <0x1F>;
|
||||
|
||||
/*
|
||||
* NOTE: only FBB mode used but actual vset will
|
||||
* determine final biasing
|
||||
*/
|
||||
ti,abb_info = <
|
||||
/*uV ABB efuse rbb_m fbb_m vset_m*/
|
||||
1090000 0 0x0 0 0x02000000 0x01F00000
|
||||
1210000 0 0x4 0 0x02000000 0x01F00000
|
||||
1280000 0 0x8 0 0x02000000 0x01F00000
|
||||
>;
|
||||
};
|
||||
|
||||
mcspi1: spi@48098000 {
|
||||
compatible = "ti,omap4-mcspi";
|
||||
reg = <0x48098000 0x200>;
|
||||
|
|
|
|||
|
|
@ -271,5 +271,36 @@
|
|||
ti,hwmods = "timer12";
|
||||
ti,timer-pwm;
|
||||
};
|
||||
|
||||
dss: dss@48050000 {
|
||||
compatible = "ti,omap2-dss";
|
||||
reg = <0x48050000 0x400>;
|
||||
status = "disabled";
|
||||
ti,hwmods = "dss_core";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
dispc@48050400 {
|
||||
compatible = "ti,omap2-dispc";
|
||||
reg = <0x48050400 0x400>;
|
||||
interrupts = <25>;
|
||||
ti,hwmods = "dss_dispc";
|
||||
};
|
||||
|
||||
rfbi: encoder@48050800 {
|
||||
compatible = "ti,omap2-rfbi";
|
||||
reg = <0x48050800 0x400>;
|
||||
status = "disabled";
|
||||
ti,hwmods = "dss_rfbi";
|
||||
};
|
||||
|
||||
venc: encoder@48050c00 {
|
||||
compatible = "ti,omap2-venc";
|
||||
reg = <0x48050c00 0x400>;
|
||||
status = "disabled";
|
||||
ti,hwmods = "dss_venc";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -99,6 +99,7 @@
|
|||
dmas = <&sdma 31>,
|
||||
<&sdma 32>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp2: mcbsp@48076000 {
|
||||
|
|
@ -112,6 +113,7 @@
|
|||
dmas = <&sdma 33>,
|
||||
<&sdma 34>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
msdi1: mmc@4809c000 {
|
||||
|
|
|
|||
|
|
@ -113,6 +113,7 @@
|
|||
dmas = <&sdma 31>,
|
||||
<&sdma 32>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp2: mcbsp@48076000 {
|
||||
|
|
@ -128,6 +129,7 @@
|
|||
dmas = <&sdma 33>,
|
||||
<&sdma 34>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp3: mcbsp@4808c000 {
|
||||
|
|
@ -143,6 +145,7 @@
|
|||
dmas = <&sdma 17>,
|
||||
<&sdma 18>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp4: mcbsp@4808e000 {
|
||||
|
|
@ -158,6 +161,7 @@
|
|||
dmas = <&sdma 19>,
|
||||
<&sdma 20>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp5: mcbsp@48096000 {
|
||||
|
|
@ -173,6 +177,7 @@
|
|||
dmas = <&sdma 21>,
|
||||
<&sdma 22>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc1: mmc@4809c000 {
|
||||
|
|
|
|||
|
|
@ -24,6 +24,11 @@
|
|||
reg = <0x80000000 0x20000000>; /* 512 MB */
|
||||
};
|
||||
|
||||
aliases {
|
||||
display0 = &dvi0;
|
||||
display1 = &tv0;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
|
|
@ -86,6 +91,60 @@
|
|||
reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
|
||||
vcc-supply = <&hsusb2_power>;
|
||||
};
|
||||
|
||||
tfp410: encoder@0 {
|
||||
compatible = "ti,tfp410";
|
||||
powerdown-gpios = <&twl_gpio 2 GPIO_ACTIVE_LOW>;
|
||||
|
||||
/* XXX pinctrl from twl */
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
tfp410_in: endpoint@0 {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
tfp410_out: endpoint@0 {
|
||||
remote-endpoint = <&dvi_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dvi0: connector@0 {
|
||||
compatible = "dvi-connector";
|
||||
label = "dvi";
|
||||
|
||||
digital;
|
||||
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
|
||||
port {
|
||||
dvi_connector_in: endpoint {
|
||||
remote-endpoint = <&tfp410_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tv0: connector@1 {
|
||||
compatible = "svideo-connector";
|
||||
label = "tv";
|
||||
|
||||
port {
|
||||
tv_connector_in: endpoint {
|
||||
remote-endpoint = <&venc_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_wkup {
|
||||
|
|
@ -94,6 +153,17 @@
|
|||
0x0e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot2.gpio_4 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_dpi_pins2: pinmux_dss_dpi_pins1 {
|
||||
pinctrl-single,pins = <
|
||||
0x0a (PIN_OUTPUT | MUX_MODE3) /* sys_boot0.dss_data18 */
|
||||
0x0c (PIN_OUTPUT | MUX_MODE3) /* sys_boot1.dss_data19 */
|
||||
0x10 (PIN_OUTPUT | MUX_MODE3) /* sys_boot3.dss_data20 */
|
||||
0x12 (PIN_OUTPUT | MUX_MODE3) /* sys_boot4.dss_data21 */
|
||||
0x14 (PIN_OUTPUT | MUX_MODE3) /* sys_boot5.dss_data22 */
|
||||
0x16 (PIN_OUTPUT | MUX_MODE3) /* sys_boot6.dss_data23 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
|
|
@ -119,6 +189,35 @@
|
|||
OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_dpi_pins1: pinmux_dss_dpi_pins2 {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
|
||||
OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
|
||||
OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
|
||||
OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
|
||||
|
||||
OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
|
||||
OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
|
||||
OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
|
||||
OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
|
||||
OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
|
||||
OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
|
||||
OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
|
||||
OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
|
||||
OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
|
||||
OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
|
||||
OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
|
||||
OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
|
||||
|
||||
OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE3) /* dss_data18.dss_data0 */
|
||||
OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE3) /* dss_data19.dss_data1 */
|
||||
OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE3) /* dss_data20.dss_data2 */
|
||||
OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE3) /* dss_data21.dss_data3 */
|
||||
OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE3) /* dss_data22.dss_data4 */
|
||||
OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE3) /* dss_data23.dss_data5 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core2 {
|
||||
|
|
@ -164,15 +263,6 @@
|
|||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
|
||||
/*
|
||||
* Display monitor features are burnt in the EEPROM
|
||||
* as EDID data.
|
||||
*/
|
||||
eeprom@50 {
|
||||
compatible = "ti,eeprom";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
|
|
@ -234,3 +324,37 @@
|
|||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&mcbsp2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "ok";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
&dss_dpi_pins1
|
||||
&dss_dpi_pins2
|
||||
>;
|
||||
|
||||
port {
|
||||
dpi_out: endpoint {
|
||||
remote-endpoint = <&tfp410_in>;
|
||||
data-lines = <24>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&venc {
|
||||
status = "ok";
|
||||
|
||||
vdda-supply = <&vdac>;
|
||||
|
||||
port {
|
||||
venc_out: endpoint {
|
||||
remote-endpoint = <&tv_connector_in>;
|
||||
ti,channels = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -24,6 +24,11 @@
|
|||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
aliases {
|
||||
display0 = &dvi0;
|
||||
display1 = &tv0;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pmu_stat {
|
||||
|
|
@ -80,6 +85,61 @@
|
|||
};
|
||||
|
||||
};
|
||||
|
||||
tfp410: encoder@0 {
|
||||
compatible = "ti,tfp410";
|
||||
powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tfp410_pins>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
tfp410_in: endpoint@0 {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
tfp410_out: endpoint@0 {
|
||||
remote-endpoint = <&dvi_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dvi0: connector@0 {
|
||||
compatible = "dvi-connector";
|
||||
label = "dvi";
|
||||
|
||||
digital;
|
||||
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
|
||||
port {
|
||||
dvi_connector_in: endpoint {
|
||||
remote-endpoint = <&tfp410_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tv0: connector@1 {
|
||||
compatible = "svideo-connector";
|
||||
label = "tv";
|
||||
|
||||
port {
|
||||
tv_connector_in: endpoint {
|
||||
remote-endpoint = <&venc_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_wkup {
|
||||
|
|
@ -113,6 +173,45 @@
|
|||
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
tfp410_pins: pinmux_tfp410_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x194 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_dpi_pins: pinmux_dss_dpi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
|
||||
0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
|
||||
0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
|
||||
0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
|
||||
0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
|
||||
0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
|
||||
0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
|
||||
0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
|
||||
0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
|
||||
0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
|
||||
0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
|
||||
0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
|
||||
0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
|
||||
0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
|
||||
0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
|
||||
0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
|
||||
0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
|
||||
0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
|
||||
0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
|
||||
0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
|
||||
0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
|
||||
0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
|
||||
0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
|
||||
0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
|
||||
0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
|
||||
0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
|
||||
0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
|
||||
0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core2 {
|
||||
|
|
@ -152,6 +251,10 @@
|
|||
#include "twl4030.dtsi"
|
||||
#include "twl4030_omap3.dtsi"
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
vmmc-supply = <&vmmc1>;
|
||||
vmmc_aux-supply = <&vsim>;
|
||||
|
|
@ -211,3 +314,39 @@
|
|||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&mcbsp2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Needed to power the DPI pins */
|
||||
&vpll2 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "ok";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dss_dpi_pins>;
|
||||
|
||||
port {
|
||||
dpi_out: endpoint {
|
||||
remote-endpoint = <&tfp410_in>;
|
||||
data-lines = <24>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&venc {
|
||||
status = "ok";
|
||||
|
||||
vdda-supply = <&vdac>;
|
||||
|
||||
port {
|
||||
venc_out: endpoint {
|
||||
remote-endpoint = <&tv_connector_in>;
|
||||
ti,channels = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,136 @@
|
|||
/*
|
||||
* Support for CompuLab CM-T3517
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "am3517.dtsi"
|
||||
#include "omap3-cm-t3x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CompuLab CM-T3517";
|
||||
compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
|
||||
|
||||
vmmc: regulator-vmmc {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
wl12xx_vmmc2: wl12xx_vmmc2 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vw1271";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
&wl12xx_wkup_pins
|
||||
&wl12xx_core_pins
|
||||
>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
gpio = <&gpio1 6 GPIO_ACTIVE_HIGH >; /* gpio6 */
|
||||
startup-delay-us = <20000>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
wl12xx_vaux2: wl12xx_vaux2 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vwl1271_vaux2";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_wkup {
|
||||
|
||||
wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
|
||||
OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE4) /* sys_boot4.gpio_6 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
|
||||
phy1_reset_pins: pinmux_hsusb1_phy_reset_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE4) /* uart2_tx.gpio_146 */
|
||||
>;
|
||||
};
|
||||
|
||||
phy2_reset_pins: pinmux_hsusb2_phy_reset_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x217a, PIN_OUTPUT | MUX_MODE4) /* uart2_rx.gpio_147 */
|
||||
>;
|
||||
};
|
||||
|
||||
otg_drv_vbus: pinmux_otg_drv_vbus {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50Mhz_clk.usb0_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
wl12xx_core_pins: pinmux_wl12xx_core_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs5.gpio_56 */
|
||||
OMAP3_CORE1_IOPAD(0x2176, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_rts.gpio_145 */
|
||||
>;
|
||||
};
|
||||
|
||||
usb_hub_pins: pinmux_usb_hub_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2184, PIN_OUTPUT | MUX_MODE4) /* mcbsp4_clkx.gpio_152 - USB HUB RST */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&hsusb1_phy {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&phy1_reset_pins>;
|
||||
reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&hsusb2_phy {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&phy2_reset_pins>;
|
||||
reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&davinci_emac {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&am35x_otg_hs {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&otg_drv_vbus>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
vmmc-supply = <&vmmc>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
vmmc-supply = <&wl12xx_vmmc2>;
|
||||
vmmc_aux-supply = <&wl12xx_vaux2>;
|
||||
non-removable;
|
||||
bus-width = <4>;
|
||||
cap-power-off-card;
|
||||
};
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
/*
|
||||
* Support for CompuLab CM-T3530
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "omap34xx.dtsi"
|
||||
#include "omap3-cm-t3x30.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CompuLab CM-T3530";
|
||||
compatible = "compulab,omap3-cm-t3530", "ti,omap34xx", "ti,omap3";
|
||||
|
||||
/* Regulator to trigger the reset signal of the Wifi module */
|
||||
mmc2_sdio_reset: regulator-mmc2-sdio-reset {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "regulator-mmc2-sdio-reset";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&twl_gpio 2 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat4.sdmmc2_dir_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat5.sdmmc2_dir_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat6.sdmmc2_dir_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* sdmmc2_dat7.sdmmc2_clkin */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
vmmc-supply = <&mmc2_sdio_reset>;
|
||||
non-removable;
|
||||
bus-width = <4>;
|
||||
cap-power-off-card;
|
||||
};
|
||||
|
|
@ -32,57 +32,26 @@
|
|||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
||||
0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
|
||||
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
|
||||
0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
|
||||
0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
|
||||
0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
smsc1_pins: pinmux_smsc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x88 (PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */
|
||||
0x16a (PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
wl12xx_gpio: pinmux_wl12xx_gpio {
|
||||
pinctrl-single,pins = <
|
||||
0xb2 (PIN_OUTPUT | MUX_MODE4) /* dss_data3.gpio_73 */
|
||||
0x134 (PIN_INPUT | MUX_MODE4) /* sdmmc2_dat4.gpio_136 */
|
||||
OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4) /* dss_data3.gpio_73 */
|
||||
OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE4) /* sdmmc2_dat4.gpio_136 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
vmmc-supply = <&vmmc1>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
|
|
@ -92,13 +61,3 @@
|
|||
bus-width = <4>;
|
||||
cap-power-off-card;
|
||||
};
|
||||
|
||||
&smsc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&smsc1_pins>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,110 @@
|
|||
/*
|
||||
* Common support for CompuLab CM-T3x CoMs
|
||||
*/
|
||||
|
||||
/ {
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&green_led_pins>;
|
||||
ledb {
|
||||
label = "cm-t3x:green";
|
||||
gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* gpio186 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
/* HS USB Port 1 Power */
|
||||
hsusb1_power: hsusb1_power_reg {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "hsusb1_vbus";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
startup-delay-us = <70000>;
|
||||
};
|
||||
|
||||
/* HS USB Port 2 Power */
|
||||
hsusb2_power: hsusb2_power_reg {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "hsusb2_vbus";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
startup-delay-us = <70000>;
|
||||
};
|
||||
|
||||
/* HS USB Host PHY on PORT 1 */
|
||||
hsusb1_phy: hsusb1_phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vcc-supply = <&hsusb1_power>;
|
||||
};
|
||||
|
||||
/* HS USB Host PHY on PORT 2 */
|
||||
hsusb2_phy: hsusb2_phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vcc-supply = <&hsusb2_power>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
||||
OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
green_led_pins: pinmux_green_led_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21e2, PIN_OUTPUT | MUX_MODE4) /* sys_clkout2.gpio_186 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
bus-width = <4>;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
&usbhshost {
|
||||
port1-mode = "ehci-phy";
|
||||
port2-mode = "ehci-phy";
|
||||
};
|
||||
|
||||
&usbhsehci {
|
||||
phys = <&hsusb1_phy &hsusb2_phy>;
|
||||
};
|
||||
|
|
@ -1,28 +1,16 @@
|
|||
/*
|
||||
* Common support for CompuLab CM-T3530 and CM-T3730
|
||||
* Common support for CompuLab CM-T3x30 CoMs
|
||||
*/
|
||||
|
||||
/ {
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
#include "omap3-cm-t3x.dtsi"
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&vcc>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
ledb {
|
||||
label = "cm-t35:green";
|
||||
gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* gpio186 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
vddvario: regulator-vddvario {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vddvario";
|
||||
|
|
@ -36,11 +24,40 @@
|
|||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
|
||||
smsc1_pins: pinmux_smsc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */
|
||||
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
|
||||
>;
|
||||
};
|
||||
|
||||
hsusb0_pins: pinmux_hsusb0_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
|
||||
OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
|
||||
OMAP3_CORE1_IOPAD(0x21a4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
|
||||
OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
|
||||
OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */
|
||||
OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
|
||||
OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
|
||||
OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */
|
||||
OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */
|
||||
OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */
|
||||
OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */
|
||||
OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <5 0 0x2c000000 0x01000000>;
|
||||
|
||||
smsc1: ethernet@5,0 {
|
||||
compatible = "smsc,lan9221", "smsc,lan9115";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&smsc1_pins>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
reg = <5 0 0xff>;
|
||||
|
|
@ -74,8 +91,6 @@
|
|||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <400000>;
|
||||
|
||||
twl: twl@48 {
|
||||
reg = <0x48>;
|
||||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
|
|
@ -86,10 +101,31 @@
|
|||
#include "twl4030.dtsi"
|
||||
#include "twl4030_omap3.dtsi"
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <400000>;
|
||||
&mmc1 {
|
||||
vmmc-supply = <&vmmc1>;
|
||||
};
|
||||
|
||||
&twl_gpio {
|
||||
ti,use-leds;
|
||||
/* pullups: BIT(0) */
|
||||
ti,pullups = <0x000001>;
|
||||
};
|
||||
|
||||
&hsusb1_phy {
|
||||
reset-gpios = <&twl_gpio 6 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&hsusb2_phy {
|
||||
reset-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&usb_otg_hs {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hsusb0_pins>;
|
||||
interface-type = <0>;
|
||||
usb-phy = <&usb2_phy>;
|
||||
phys = <&usb2_phy>;
|
||||
phy-names = "usb2-phy";
|
||||
mode = <3>;
|
||||
power = <50>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -101,20 +101,8 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
&mcbsp1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mcbsp3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mcbsp4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mcbsp5 {
|
||||
status = "disabled";
|
||||
&mcbsp2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
|
|
|
|||
|
|
@ -36,6 +36,14 @@
|
|||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "ti,omap-twl4030";
|
||||
ti,model = "gta04";
|
||||
|
||||
ti,mcbsp = <&mcbsp2>;
|
||||
ti,codec = <&twl_audio>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
|
|
@ -80,6 +88,12 @@
|
|||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
|
||||
twl_audio: audio {
|
||||
compatible = "ti,twl4030-audio";
|
||||
codec {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
#include "twl4030.dtsi"
|
||||
|
|
@ -96,6 +110,14 @@
|
|||
interrupts = <17 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
|
||||
/* accelerometer */
|
||||
bma180@41 {
|
||||
compatible = "bosch,bma180";
|
||||
reg = <0x41>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
/* leds */
|
||||
tca6507@45 {
|
||||
compatible = "ti,tca6507";
|
||||
|
|
@ -124,6 +146,22 @@
|
|||
reg = <0x4>;
|
||||
};
|
||||
};
|
||||
|
||||
/* compass aka magnetometer */
|
||||
hmc5843@1e {
|
||||
compatible = "honeywell,hmc5843";
|
||||
reg = <0x1e>;
|
||||
};
|
||||
|
||||
/* touchscreen */
|
||||
tsc2007@48 {
|
||||
compatible = "ti,tsc2007";
|
||||
reg = <0x48>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
|
||||
gpios = <&gpio6 0 GPIO_ACTIVE_LOW>;
|
||||
ti,x-plate-ohms = <600>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
|
|
@ -148,7 +186,9 @@
|
|||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "disabled";
|
||||
vmmc-supply = <&vaux4>;
|
||||
bus-width = <4>;
|
||||
ti,non-removable;
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
|
|
@ -170,3 +210,12 @@
|
|||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
||||
&charger {
|
||||
bb_uvolt = <3200000>;
|
||||
bb_uamp = <150>;
|
||||
};
|
||||
|
||||
&vaux4 {
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <3150000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -170,6 +170,7 @@
|
|||
&mcbsp2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcbsp2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
|
|
|
|||
|
|
@ -61,22 +61,63 @@
|
|||
reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
|
||||
vcc-supply = <&hsusb1_power>;
|
||||
};
|
||||
|
||||
tfp410: encoder@0 {
|
||||
compatible = "ti,tfp410";
|
||||
powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
tfp410_in: endpoint@0 {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
tfp410_out: endpoint@0 {
|
||||
remote-endpoint = <&dvi_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dvi0: connector@0 {
|
||||
compatible = "dvi-connector";
|
||||
label = "dvi";
|
||||
|
||||
digital;
|
||||
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
|
||||
port {
|
||||
dvi_connector_in: endpoint {
|
||||
remote-endpoint = <&tfp410_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
&tfp410_pins
|
||||
&dss_pins
|
||||
&dss_dpi_pins
|
||||
>;
|
||||
|
||||
tfp410_pins: tfp410_dvi_pins {
|
||||
tfp410_pins: pinmux_tfp410_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_pins: pinmux_dss_dvi_pins {
|
||||
dss_dpi_pins: pinmux_dss_dpi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
|
||||
0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
|
||||
|
|
@ -226,3 +267,14 @@
|
|||
/* Needed for DSS */
|
||||
regulator-name = "vdds_dsi";
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "ok";
|
||||
|
||||
port {
|
||||
dpi_out: endpoint {
|
||||
remote-endpoint = <&tfp410_in>;
|
||||
data-lines = <24>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,459 @@
|
|||
/*
|
||||
* Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include "omap36xx.dtsi"
|
||||
|
||||
/ {
|
||||
model = "INCOstartec LILLY-A83X module (DM3730)";
|
||||
compatible = "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0";
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x8000000>; /* 128 MB */
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led1 {
|
||||
label = "lilly-a83x::led1";
|
||||
gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "default-on";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "ti,omap-twl4030";
|
||||
ti,model = "lilly-a83x";
|
||||
|
||||
ti,mcbsp = <&mcbsp2>;
|
||||
ti,codec = <&twl_audio>;
|
||||
};
|
||||
|
||||
reg_vcc3: vcc3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VCC3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
hsusb1_phy: hsusb1_phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vcc-supply = <®_vcc3>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_wkup {
|
||||
pinctrl-names = "default";
|
||||
|
||||
lan9221_pins: pinmux_lan9221_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4) /* reserved.gpio_129 */
|
||||
>;
|
||||
};
|
||||
|
||||
tsc2048_pins: pinmux_tsc2048_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_WKUP_IOPAD(0x2a16, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_boot6.gpio_8 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1cd_pins: pinmux_mmc1cd_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4) /* reserved.gpio_126 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
|
||||
uart1_pins: pinmux_uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
|
||||
OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
|
||||
OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
|
||||
OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clkx.uart2_tx */
|
||||
OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
|
||||
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21ba ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.i2c1_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21bc ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
|
||||
OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
hsusb1_pins: pinmux_hsusb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
|
||||
/* GPIO 182 controls USB-Hub reset. But USB-Phy its
|
||||
* reset can't be controlled. So we clamp this GPIO to
|
||||
* high (PIN_OFF_OUTPUT_HIGH) to always enable USB-Hub.
|
||||
*/
|
||||
|
||||
OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT_PULLUP | PIN_OFF_OUTPUT_HIGH | MUX_MODE4) /* mcspi2_cs1.gpio_182 */
|
||||
>;
|
||||
};
|
||||
|
||||
hsusb_otg_pins: pinmux_hsusb_otg_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
|
||||
OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
|
||||
OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
|
||||
OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
|
||||
OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
|
||||
OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
|
||||
OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
|
||||
OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
|
||||
OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
|
||||
OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
|
||||
OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
|
||||
OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
|
||||
OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
spi2_pins: pinmux_spi2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_clk.mcspi2_clk */
|
||||
OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_simo.mcspi2_simo */
|
||||
OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_somi.mcspi2_somi */
|
||||
OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0.mcspi2_cs0 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
&hsusb1_2_pins
|
||||
>;
|
||||
|
||||
hsusb1_2_pins: pinmux_hsusb1_2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
|
||||
OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
|
||||
OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3) /* etk_d0.hsusb1_data0 */
|
||||
OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3) /* etk_d1.hsusb1_data1 */
|
||||
OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3) /* etk_d2.hsusb1_data2 */
|
||||
OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3) /* etk_d3.hsusb1_data7 */
|
||||
OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3) /* etk_d4.hsusb1_data4 */
|
||||
OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3) /* etk_d5.hsusb1_data5 */
|
||||
OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3) /* etk_d6.hsusb1_data6 */
|
||||
OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3) /* etk_d7.hsusb1_data3 */
|
||||
OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3) /* etk_d8.hsusb1_dir */
|
||||
OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3) /* etk_d9.hsusb1_nxt */
|
||||
>;
|
||||
};
|
||||
|
||||
gpio1_pins: pinmux_gpio1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3630_CORE2_IOPAD(0x25fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d15.gpio_29 */
|
||||
>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio1_pins>;
|
||||
};
|
||||
|
||||
&gpio6 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hsusb1_pins>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <2600000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
|
||||
twl: twl@48 {
|
||||
reg = <0x48>;
|
||||
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
|
||||
interrupt-parent = <&intc>;
|
||||
|
||||
twl_audio: audio {
|
||||
compatible = "ti,twl4030-audio";
|
||||
codec {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
#include "twl4030.dtsi"
|
||||
#include "twl4030_omap3.dtsi"
|
||||
|
||||
&twl {
|
||||
vmmc1: regulator-vmmc1 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd1: regulator-vdd1 {
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd2: regulator-vdd2 {
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <2600000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <2600000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
gpiom1: gpio@20 {
|
||||
compatible = "mcp,mcp23017";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
reg = <0x20>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
cd-gpios = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>;
|
||||
cd-inverted;
|
||||
vmmc-supply = <&vmmc1>;
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins &mmc1cd_pins>;
|
||||
cap-sdio-irq;
|
||||
cap-sd-highspeed;
|
||||
cap-mmc-highspeed;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mcspi2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi2_pins>;
|
||||
|
||||
tsc2046@0 {
|
||||
reg = <0>; /* CS0 */
|
||||
compatible = "ti,tsc2046";
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <8 0>; /* boot6 / gpio_8 */
|
||||
spi-max-frequency = <1000000>;
|
||||
pendown-gpio = <&gpio1 8 0>;
|
||||
vcc-supply = <®_vcc3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tsc2048_pins>;
|
||||
|
||||
ti,x-min = <300>;
|
||||
ti,x-max = <3000>;
|
||||
ti,y-min = <600>;
|
||||
ti,y-max = <3600>;
|
||||
ti,x-plate-ohms = <80>;
|
||||
ti,pressure-max = <255>;
|
||||
ti,swap-xy;
|
||||
|
||||
linux,wakeup;
|
||||
};
|
||||
};
|
||||
|
||||
&usbhsehci {
|
||||
phys = <&hsusb1_phy>;
|
||||
};
|
||||
|
||||
&usbhshost {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hsusb1_2_pins>;
|
||||
num-ports = <2>;
|
||||
port1-mode = "ehci-phy";
|
||||
};
|
||||
|
||||
&usb_otg_hs {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hsusb_otg_pins>;
|
||||
interface-type = <0>;
|
||||
usb-phy = <&usb2_phy>;
|
||||
phys = <&usb2_phy>;
|
||||
phy-names = "usb2-phy";
|
||||
mode = <3>;
|
||||
power = <50>;
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <0 0 0x30000000 0x1000000>,
|
||||
<7 0 0x15000000 0x01000000>;
|
||||
|
||||
nand@0,0 {
|
||||
reg = <0 0 0x1000000>;
|
||||
nand-bus-width = <16>;
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
/* no elm on omap3 */
|
||||
|
||||
gpmc,mux-add-data = <0>;
|
||||
gpmc,device-nand;
|
||||
gpmc,device-width = <2>;
|
||||
gpmc,wait-pin = <0>;
|
||||
gpmc,wait-monitoring-ns = <0>;
|
||||
gpmc,burst-length= <4>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <100>;
|
||||
gpmc,cs-wr-off-ns = <100>;
|
||||
gpmc,adv-on-ns = <0>;
|
||||
gpmc,adv-rd-off-ns = <100>;
|
||||
gpmc,adv-wr-off-ns = <100>;
|
||||
gpmc,oe-on-ns = <5>;
|
||||
gpmc,oe-off-ns = <75>;
|
||||
gpmc,we-on-ns = <5>;
|
||||
gpmc,we-off-ns = <75>;
|
||||
gpmc,rd-cycle-ns = <100>;
|
||||
gpmc,wr-cycle-ns = <100>;
|
||||
gpmc,access-ns = <60>;
|
||||
gpmc,page-burst-access-ns = <5>;
|
||||
gpmc,bus-turnaround-ns = <0>;
|
||||
gpmc,cycle2cycle-samecsen;
|
||||
gpmc,cycle2cycle-delay-ns = <50>;
|
||||
gpmc,wr-data-mux-bus-ns = <75>;
|
||||
gpmc,wr-access-ns = <155>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "MLO";
|
||||
reg = <0 0x80000>;
|
||||
};
|
||||
|
||||
partition@0x80000 {
|
||||
label = "u-boot";
|
||||
reg = <0x80000 0x1e0000>;
|
||||
};
|
||||
|
||||
partition@0x260000 {
|
||||
label = "u-boot-environment";
|
||||
reg = <0x260000 0x20000>;
|
||||
};
|
||||
|
||||
partition@0x280000 {
|
||||
label = "kernel";
|
||||
reg = <0x280000 0x500000>;
|
||||
};
|
||||
|
||||
partition@0x780000 {
|
||||
label = "filesystem";
|
||||
reg = <0x780000 0xf880000>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@7,0 {
|
||||
compatible = "smsc,lan9221", "smsc,lan9115";
|
||||
bank-width = <2>;
|
||||
gpmc,mux-add-data = <2>;
|
||||
gpmc,cs-on-ns = <10>;
|
||||
gpmc,cs-rd-off-ns = <60>;
|
||||
gpmc,cs-wr-off-ns = <60>;
|
||||
gpmc,adv-on-ns = <0>;
|
||||
gpmc,adv-rd-off-ns = <10>;
|
||||
gpmc,adv-wr-off-ns = <10>;
|
||||
gpmc,oe-on-ns = <10>;
|
||||
gpmc,oe-off-ns = <60>;
|
||||
gpmc,we-on-ns = <10>;
|
||||
gpmc,we-off-ns = <60>;
|
||||
gpmc,rd-cycle-ns = <100>;
|
||||
gpmc,wr-cycle-ns = <100>;
|
||||
gpmc,access-ns = <50>;
|
||||
gpmc,page-burst-access-ns = <5>;
|
||||
gpmc,bus-turnaround-ns = <0>;
|
||||
gpmc,cycle2cycle-delay-ns = <75>;
|
||||
gpmc,wr-data-mux-bus-ns = <15>;
|
||||
gpmc,wr-access-ns = <75>;
|
||||
gpmc,cycle2cycle-samecsen;
|
||||
gpmc,cycle2cycle-diffcsen;
|
||||
vddvario-supply = <®_vcc3>;
|
||||
vdd33a-supply = <®_vcc3>;
|
||||
reg-io-width = <4>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <1 0x2>;
|
||||
reg = <7 0 0xff>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lan9221_pins>;
|
||||
phy-mode = "mii";
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,170 @@
|
|||
/*
|
||||
* Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "omap3-lilly-a83x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "INCOstartec LILLY-DBB056 (DM3730)";
|
||||
compatible = "incostartec,omap3-lilly-dbb056", "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3";
|
||||
};
|
||||
|
||||
&twl {
|
||||
vaux2: regulator-vaux2 {
|
||||
compatible = "ti,twl4030-vaux2";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_pins>;
|
||||
|
||||
lan9117_pins: pinmux_lan9117_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2114, PIN_INPUT | MUX_MODE4) /* cam_fld.gpio_98 */
|
||||
>;
|
||||
};
|
||||
|
||||
gpio4_pins: pinmux_gpio4_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x212e, PIN_INPUT | MUX_MODE4) /* cam_xclkb.gpio_111 -> sja1000 IRQ */
|
||||
>;
|
||||
};
|
||||
|
||||
gpio5_pins: pinmux_gpio5_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x218c, PIN_OUTPUT | PIN_OFF_OUTPUT_HIGH | MUX_MODE4) /* mcbsp1_clk.gpio_156 -> enable DSS */
|
||||
>;
|
||||
};
|
||||
|
||||
lcd_pins: pinmux_lcd_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
|
||||
OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
|
||||
OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
|
||||
OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
|
||||
OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
|
||||
OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
|
||||
OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
|
||||
OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
|
||||
OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
|
||||
OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
|
||||
OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
|
||||
OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
|
||||
OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
|
||||
OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
|
||||
OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
|
||||
OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
|
||||
OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
|
||||
OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
|
||||
OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
|
||||
OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
|
||||
OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
|
||||
OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
|
||||
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat4.sdmmc2_dir_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat5.sdmmc2_dir_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat6.sdmmc2_dir_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* sdmmc2_dat7.sdmmc2_clkin */
|
||||
OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 -> wp */
|
||||
OMAP3_CORE1_IOPAD(0x219c, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_rts_sd.gpio_164 -> cd */
|
||||
>;
|
||||
};
|
||||
|
||||
spi1_pins: pinmux_spi1_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
|
||||
OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
|
||||
OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
|
||||
OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio4_pins>;
|
||||
};
|
||||
|
||||
&gpio5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpio5_pins>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "okay";
|
||||
bus-width = <4>;
|
||||
vmmc-supply = <&vmmc1>;
|
||||
cd-gpios = <&gpio6 4 0>; /* gpio_164 */
|
||||
wp-gpios = <&gpio6 3 0>; /* gpio_163 */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
ti,dual-volt;
|
||||
};
|
||||
|
||||
&mcspi1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi1_pins>;
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <0 0 0x30000000 0x1000000>, /* nand assigned by COM a83x */
|
||||
<4 0 0x20000000 0x01000000>,
|
||||
<7 0 0x15000000 0x01000000>; /* eth assigend by COM a83x */
|
||||
|
||||
ethernet@4,0 {
|
||||
compatible = "smsc,lan9117", "smsc,lan9115";
|
||||
bank-width = <2>;
|
||||
gpmc,mux-add-data = <2>;
|
||||
gpmc,cs-on-ns = <10>;
|
||||
gpmc,cs-rd-off-ns = <65>;
|
||||
gpmc,cs-wr-off-ns = <65>;
|
||||
gpmc,adv-on-ns = <0>;
|
||||
gpmc,adv-rd-off-ns = <10>;
|
||||
gpmc,adv-wr-off-ns = <10>;
|
||||
gpmc,oe-on-ns = <10>;
|
||||
gpmc,oe-off-ns = <65>;
|
||||
gpmc,we-on-ns = <10>;
|
||||
gpmc,we-off-ns = <65>;
|
||||
gpmc,rd-cycle-ns = <100>;
|
||||
gpmc,wr-cycle-ns = <100>;
|
||||
gpmc,access-ns = <60>;
|
||||
gpmc,page-burst-access-ns = <5>;
|
||||
gpmc,bus-turnaround-ns = <0>;
|
||||
gpmc,cycle2cycle-delay-ns = <75>;
|
||||
gpmc,wr-data-mux-bus-ns = <15>;
|
||||
gpmc,wr-access-ns = <75>;
|
||||
gpmc,cycle2cycle-samecsen;
|
||||
gpmc,cycle2cycle-diffcsen;
|
||||
vddvario-supply = <®_vcc3>;
|
||||
vdd33a-supply = <®_vcc3>;
|
||||
reg-io-width = <4>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <2 0x2>;
|
||||
reg = <4 0 0xff>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lan9117_pins>;
|
||||
phy-mode = "mii";
|
||||
smsc,force-internal-phy;
|
||||
};
|
||||
};
|
||||
|
|
@ -74,6 +74,22 @@
|
|||
};
|
||||
};
|
||||
|
||||
isp1704: isp1704 {
|
||||
compatible = "nxp,isp1704";
|
||||
nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
|
||||
usb-phy = <&usb2_phy>;
|
||||
};
|
||||
|
||||
tv: connector {
|
||||
compatible = "composite-connector";
|
||||
label = "tv";
|
||||
|
||||
port {
|
||||
tv_connector_in: endpoint {
|
||||
remote-endpoint = <&venc_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
|
|
@ -140,11 +156,23 @@
|
|||
>;
|
||||
};
|
||||
|
||||
display_pins: pinmux_display_pins {
|
||||
acx565akm_pins: pinmux_acx565akm_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
|
||||
>;
|
||||
};
|
||||
|
||||
dss_sdi_pins: pinmux_dss_sdi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0c0 (PIN_OUTPUT | MUX_MODE1) /* dss_data10.sdi_dat1n */
|
||||
0x0c2 (PIN_OUTPUT | MUX_MODE1) /* dss_data11.sdi_dat1p */
|
||||
0x0c4 (PIN_OUTPUT | MUX_MODE1) /* dss_data12.sdi_dat2n */
|
||||
0x0c6 (PIN_OUTPUT | MUX_MODE1) /* dss_data13.sdi_dat2p */
|
||||
|
||||
0x0d8 (PIN_OUTPUT | MUX_MODE1) /* dss_data22.sdi_clkp */
|
||||
0x0da (PIN_OUTPUT | MUX_MODE1) /* dss_data23.sdi_clkn */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
@ -254,6 +282,61 @@
|
|||
};
|
||||
};
|
||||
|
||||
&twl_keypad {
|
||||
linux,keymap = < 0x00000010 /* KEY_Q */
|
||||
0x00010018 /* KEY_O */
|
||||
0x00020019 /* KEY_P */
|
||||
0x00030033 /* KEY_COMMA */
|
||||
0x0004000e /* KEY_BACKSPACE */
|
||||
0x0006001e /* KEY_A */
|
||||
0x0007001f /* KEY_S */
|
||||
|
||||
0x01000011 /* KEY_W */
|
||||
0x01010020 /* KEY_D */
|
||||
0x01020021 /* KEY_F */
|
||||
0x01030022 /* KEY_G */
|
||||
0x01040023 /* KEY_H */
|
||||
0x01050024 /* KEY_J */
|
||||
0x01060025 /* KEY_K */
|
||||
0x01070026 /* KEY_L */
|
||||
|
||||
0x02000012 /* KEY_E */
|
||||
0x02010034 /* KEY_DOT */
|
||||
0x02020067 /* KEY_UP */
|
||||
0x0203001c /* KEY_ENTER */
|
||||
0x0205002c /* KEY_Z */
|
||||
0x0206002d /* KEY_X */
|
||||
0x0207002e /* KEY_C */
|
||||
0x02080043 /* KEY_F9 */
|
||||
|
||||
0x03000013 /* KEY_R */
|
||||
0x0301002f /* KEY_V */
|
||||
0x03020030 /* KEY_B */
|
||||
0x03030031 /* KEY_N */
|
||||
0x03040032 /* KEY_M */
|
||||
0x03050039 /* KEY_SPACE */
|
||||
0x03060039 /* KEY_SPACE */
|
||||
0x03070069 /* KEY_LEFT */
|
||||
|
||||
0x04000014 /* KEY_T */
|
||||
0x0401006c /* KEY_DOWN */
|
||||
0x0402006a /* KEY_RIGHT */
|
||||
0x0404001d /* KEY_LEFTCTRL */
|
||||
0x04050064 /* KEY_RIGHTALT */
|
||||
0x0406002a /* KEY_LEFTSHIFT */
|
||||
0x04080044 /* KEY_F10 */
|
||||
|
||||
0x05000015 /* KEY_Y */
|
||||
0x05080057 /* KEY_F11 */
|
||||
|
||||
0x06000016 /* KEY_U */
|
||||
|
||||
0x07000017 /* KEY_I */
|
||||
0x07010041 /* KEY_F7 */
|
||||
0x07020042 /* KEY_F8 */
|
||||
>;
|
||||
};
|
||||
|
||||
&twl_gpio {
|
||||
ti,pullups = <0x0>;
|
||||
ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
|
||||
|
|
@ -291,6 +374,13 @@
|
|||
DVDD-supply = <&vio>;
|
||||
};
|
||||
|
||||
tsl2563: tsl2563@29 {
|
||||
compatible = "amstaos,tsl2563";
|
||||
reg = <0x29>;
|
||||
|
||||
amstaos,cover-comp-gain = <16>;
|
||||
};
|
||||
|
||||
lp5523: lp5523@32 {
|
||||
compatible = "national,lp5523";
|
||||
reg = <0x32>;
|
||||
|
|
@ -356,6 +446,29 @@
|
|||
compatible = "ti,bq27200";
|
||||
reg = <0x55>;
|
||||
};
|
||||
|
||||
tpa6130a2: tpa6130a2@60 {
|
||||
compatible = "ti,tpa6130a2";
|
||||
reg = <0x60>;
|
||||
|
||||
Vdd-supply = <&vmmc2>;
|
||||
|
||||
power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
|
||||
};
|
||||
|
||||
bq24150a: bq24150a@6b {
|
||||
compatible = "ti,bq24150a";
|
||||
reg = <0x6b>;
|
||||
|
||||
ti,current-limit = <100>;
|
||||
ti,weak-battery-voltage = <3400>;
|
||||
ti,battery-regulation-voltage = <4200>;
|
||||
ti,charge-current = <650>;
|
||||
ti,termination-current = <100>;
|
||||
ti,resistor-sense = <68>;
|
||||
|
||||
ti,usb-charger-detection = <&isp1704>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
|
|
@ -471,13 +584,23 @@
|
|||
spi-max-frequency = <6000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
mipid@2 {
|
||||
compatible = "acx565akm";
|
||||
|
||||
acx565akm@2 {
|
||||
compatible = "sony,acx565akm";
|
||||
spi-max-frequency = <6000000>;
|
||||
reg = <2>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&display_pins>;
|
||||
pinctrl-0 = <&acx565akm_pins>;
|
||||
|
||||
label = "lcd";
|
||||
reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
|
||||
|
||||
port {
|
||||
lcd_in: endpoint {
|
||||
remote-endpoint = <&sdi_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -503,3 +626,39 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "ok";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dss_sdi_pins>;
|
||||
|
||||
vdds_sdi-supply = <&vaux1>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
sdi_out: endpoint {
|
||||
remote-endpoint = <&lcd_in>;
|
||||
datapairs = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&venc {
|
||||
status = "ok";
|
||||
|
||||
vdda-supply = <&vdac>;
|
||||
|
||||
port {
|
||||
venc_out: endpoint {
|
||||
remote-endpoint = <&tv_connector_in>;
|
||||
ti,channels = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -92,3 +92,7 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
||||
&mcbsp2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -2,11 +2,36 @@
|
|||
* Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730
|
||||
*/
|
||||
|
||||
/ {
|
||||
vddvario_sb_t35: regulator-vddvario-sb-t35 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vddvario";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd33a_sb_t35: regulator-vdd33a-sb-t35 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd33a";
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
smsc2_pins: pinmux_smsc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20b6, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs4.gpmc_ncs4 */
|
||||
OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_wait3.gpio_65 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <4 0 0x2d000000 0x01000000>;
|
||||
|
||||
smsc2: ethernet@4,0 {
|
||||
compatible = "smsc,lan9221", "smsc,lan9115";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&smsc2_pins>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
|
||||
reg = <4 0 0xff>;
|
||||
|
|
@ -32,8 +57,8 @@
|
|||
gpmc,wr-access-ns = <186>;
|
||||
gpmc,cycle2cycle-samecsen;
|
||||
gpmc,cycle2cycle-diffcsen;
|
||||
vddvario-supply = <&vddvario>;
|
||||
vdd33a-supply = <&vdd33a>;
|
||||
vddvario-supply = <&vddvario_sb_t35>;
|
||||
vdd33a-supply = <&vdd33a_sb_t35>;
|
||||
reg-io-width = <4>;
|
||||
smsc,save-mac-address;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,43 @@
|
|||
/*
|
||||
* Suppport for CompuLab SBC-T3517 with CM-T3517
|
||||
*/
|
||||
|
||||
#include "omap3-cm-t3517.dts"
|
||||
#include "omap3-sb-t35.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CompuLab SBC-T3517 with CM-T3517";
|
||||
compatible = "compulab,omap3-sbc-t3517", "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
&sb_t35_usb_hub_pins
|
||||
&usb_hub_pins
|
||||
>;
|
||||
|
||||
mmc1_aux_pins: pinmux_mmc1_aux_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20c0, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_clk.gpio_59 */
|
||||
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_cts.gpio_144 */
|
||||
>;
|
||||
};
|
||||
|
||||
sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x21ec, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_98 - SB-T35 USB HUB RST */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
&mmc1_pins
|
||||
&mmc1_aux_pins
|
||||
>;
|
||||
|
||||
wp-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>; /* gpio_59 */
|
||||
cd-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* gpio_144 */
|
||||
};
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
/*
|
||||
* Suppport for CompuLab SBC-T3530 with CM-T3530
|
||||
*/
|
||||
|
||||
#include "omap3-cm-t3530.dts"
|
||||
#include "omap3-sb-t35.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CompuLab SBC-T3530 with CM-T3530";
|
||||
compatible = "compulab,omap3-sbc-t3530", "compulab,omap3-cm-t3530", "ti,omap34xx", "ti,omap3";
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sb_t35_usb_hub_pins>;
|
||||
|
||||
sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* The following ranges correspond to SMSC9x eth chips on CM-T3530 CoM and
|
||||
* SB-T35 baseboard respectively.
|
||||
* This setting includes both chips in SBC-T3530 board device tree.
|
||||
*/
|
||||
&gpmc {
|
||||
ranges = <5 0 0x2c000000 0x01000000>,
|
||||
<4 0 0x2d000000 0x01000000>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
|
@ -10,21 +10,18 @@
|
|||
compatible = "compulab,omap3-sbc-t3730", "compulab,omap3-cm-t3730", "ti,omap36xx", "ti,omap3";
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sb_t35_usb_hub_pins>;
|
||||
|
||||
sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <5 0 0x2c000000 0x01000000>,
|
||||
<4 0 0x2d000000 0x01000000>;
|
||||
};
|
||||
|
||||
&smsc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&smsc2_pins>;
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
smsc2_pins: pinmux_smsc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x86 (PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs4.gpmc_ncs4 */
|
||||
0xa2 (PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_wait3.gpio_65 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -35,6 +35,11 @@
|
|||
compatible = "arm,cortex-a8";
|
||||
device_type = "cpu";
|
||||
reg = <0x0>;
|
||||
|
||||
clocks = <&dpll1_ck>;
|
||||
clock-names = "cpu";
|
||||
|
||||
clock-latency = <300000>; /* From omap-cpufreq driver */
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -411,10 +416,19 @@
|
|||
};
|
||||
|
||||
mmu_isp: mmu@480bd400 {
|
||||
compatible = "ti,omap3-mmu-isp";
|
||||
ti,hwmods = "mmu_isp";
|
||||
compatible = "ti,omap2-iommu";
|
||||
reg = <0x480bd400 0x80>;
|
||||
interrupts = <8>;
|
||||
interrupts = <24>;
|
||||
ti,hwmods = "mmu_isp";
|
||||
ti,#tlb-entries = <8>;
|
||||
};
|
||||
|
||||
mmu_iva: mmu@5d000000 {
|
||||
compatible = "ti,omap2-iommu";
|
||||
reg = <0x5d000000 0x80>;
|
||||
interrupts = <28>;
|
||||
ti,hwmods = "mmu_iva";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
wdt2: wdt@48314000 {
|
||||
|
|
@ -436,6 +450,7 @@
|
|||
dmas = <&sdma 31>,
|
||||
<&sdma 32>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp2: mcbsp@49022000 {
|
||||
|
|
@ -453,6 +468,7 @@
|
|||
dmas = <&sdma 33>,
|
||||
<&sdma 34>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp3: mcbsp@49024000 {
|
||||
|
|
@ -470,6 +486,7 @@
|
|||
dmas = <&sdma 17>,
|
||||
<&sdma 18>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp4: mcbsp@49026000 {
|
||||
|
|
@ -485,6 +502,7 @@
|
|||
dmas = <&sdma 19>,
|
||||
<&sdma 20>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp5: mcbsp@48096000 {
|
||||
|
|
@ -500,6 +518,7 @@
|
|||
dmas = <&sdma 21>,
|
||||
<&sdma 22>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sham: sham@480c3000 {
|
||||
|
|
@ -634,14 +653,14 @@
|
|||
ranges;
|
||||
|
||||
usbhsohci: ohci@48064400 {
|
||||
compatible = "ti,ohci-omap3", "usb-ohci";
|
||||
compatible = "ti,ohci-omap3";
|
||||
reg = <0x48064400 0x400>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <76>;
|
||||
};
|
||||
|
||||
usbhsehci: ehci@48064800 {
|
||||
compatible = "ti,ehci-omap", "usb-ehci";
|
||||
compatible = "ti,ehci-omap";
|
||||
reg = <0x48064800 0x400>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <77>;
|
||||
|
|
@ -669,6 +688,58 @@
|
|||
num-eps = <16>;
|
||||
ram-bits = <12>;
|
||||
};
|
||||
|
||||
dss: dss@48050000 {
|
||||
compatible = "ti,omap3-dss";
|
||||
reg = <0x48050000 0x200>;
|
||||
status = "disabled";
|
||||
ti,hwmods = "dss_core";
|
||||
clocks = <&dss1_alwon_fck>;
|
||||
clock-names = "fck";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
dispc@48050400 {
|
||||
compatible = "ti,omap3-dispc";
|
||||
reg = <0x48050400 0x400>;
|
||||
interrupts = <25>;
|
||||
ti,hwmods = "dss_dispc";
|
||||
clocks = <&dss1_alwon_fck>;
|
||||
clock-names = "fck";
|
||||
};
|
||||
|
||||
dsi: encoder@4804fc00 {
|
||||
compatible = "ti,omap3-dsi";
|
||||
reg = <0x4804fc00 0x200>,
|
||||
<0x4804fe00 0x40>,
|
||||
<0x4804ff00 0x20>;
|
||||
reg-names = "proto", "phy", "pll";
|
||||
interrupts = <25>;
|
||||
status = "disabled";
|
||||
ti,hwmods = "dss_dsi1";
|
||||
clocks = <&dss1_alwon_fck>, <&dss2_alwon_fck>;
|
||||
clock-names = "fck", "sys_clk";
|
||||
};
|
||||
|
||||
rfbi: encoder@48050800 {
|
||||
compatible = "ti,omap3-rfbi";
|
||||
reg = <0x48050800 0x100>;
|
||||
status = "disabled";
|
||||
ti,hwmods = "dss_rfbi";
|
||||
clocks = <&dss1_alwon_fck>, <&dss_ick>;
|
||||
clock-names = "fck", "ick";
|
||||
};
|
||||
|
||||
venc: encoder@48050c00 {
|
||||
compatible = "ti,omap3-venc";
|
||||
reg = <0x48050c00 0x100>;
|
||||
status = "disabled";
|
||||
ti,hwmods = "dss_venc";
|
||||
clocks = <&dss_tv_fck>;
|
||||
clock-names = "fck";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -34,6 +34,10 @@
|
|||
&mmc1 {
|
||||
vmmc-supply = <&vmmc1>;
|
||||
vmmc_aux-supply = <&vsim>;
|
||||
/*
|
||||
* S6-3 must be in ON position for 8 bit mode to function
|
||||
* Else, use 4 bit mode
|
||||
*/
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
|
|
@ -103,9 +107,8 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <1 0 0x08000000>;
|
||||
ti,nand-ecc-opt = "ham1";
|
||||
nand-bus-width = <8>;
|
||||
|
||||
ti,nand-ecc-opt = "sw";
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <36>;
|
||||
gpmc,cs-wr-off-ns = <36>;
|
||||
|
|
|
|||
|
|
@ -82,16 +82,16 @@
|
|||
ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
|
||||
};
|
||||
|
||||
ssi_ssr_fck_3430es1: ssi_ssr_fck_3430es1 {
|
||||
ssi_ssr_fck: ssi_ssr_fck_3430es1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,composite-clock";
|
||||
clocks = <&ssi_ssr_gate_fck_3430es1>, <&ssi_ssr_div_fck_3430es1>;
|
||||
};
|
||||
|
||||
ssi_sst_fck_3430es1: ssi_sst_fck_3430es1 {
|
||||
ssi_sst_fck: ssi_sst_fck_3430es1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
clocks = <&ssi_ssr_fck_3430es1>;
|
||||
clocks = <&ssi_ssr_fck>;
|
||||
clock-mult = <1>;
|
||||
clock-div = <2>;
|
||||
};
|
||||
|
|
@ -120,7 +120,7 @@
|
|||
clock-div = <1>;
|
||||
};
|
||||
|
||||
ssi_ick_3430es1: ssi_ick_3430es1 {
|
||||
ssi_ick: ssi_ick_3430es1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap3-no-wait-interface-clock";
|
||||
clocks = <&ssi_l4_ick>;
|
||||
|
|
@ -152,7 +152,7 @@
|
|||
clocks = <&usb_l4_gate_ick>, <&usb_l4_div_ick>;
|
||||
};
|
||||
|
||||
dss1_alwon_fck_3430es1: dss1_alwon_fck_3430es1 {
|
||||
dss1_alwon_fck: dss1_alwon_fck_3430es1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&dpll4_m4x2_ck>;
|
||||
|
|
@ -161,7 +161,7 @@
|
|||
ti,set-rate-parent;
|
||||
};
|
||||
|
||||
dss_ick_3430es1: dss_ick_3430es1 {
|
||||
dss_ick: dss_ick_3430es1 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap3-no-wait-interface-clock";
|
||||
clocks = <&l4_ick>;
|
||||
|
|
@ -184,7 +184,7 @@
|
|||
dss_clkdm: dss_clkdm {
|
||||
compatible = "ti,clockdomain";
|
||||
clocks = <&dss_tv_fck>, <&dss_96m_fck>, <&dss2_alwon_fck>,
|
||||
<&dss1_alwon_fck_3430es1>, <&dss_ick_3430es1>;
|
||||
<&dss1_alwon_fck>, <&dss_ick>;
|
||||
};
|
||||
|
||||
d2d_clkdm: d2d_clkdm {
|
||||
|
|
@ -203,6 +203,6 @@
|
|||
<&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
|
||||
<&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
|
||||
<&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
|
||||
<&fshostusb_fck>, <&fac_ick>, <&ssi_ick_3430es1>;
|
||||
<&fshostusb_fck>, <&fac_ick>, <&ssi_ick>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -160,7 +160,7 @@
|
|||
ti,bit-shift = <30>;
|
||||
};
|
||||
|
||||
dss1_alwon_fck_3430es2: dss1_alwon_fck_3430es2 {
|
||||
dss1_alwon_fck: dss1_alwon_fck_3430es2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,dss-gate-clock";
|
||||
clocks = <&dpll4_m4x2_ck>;
|
||||
|
|
@ -169,7 +169,7 @@
|
|||
ti,set-rate-parent;
|
||||
};
|
||||
|
||||
dss_ick_3430es2: dss_ick_3430es2 {
|
||||
dss_ick: dss_ick_3430es2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap3-dss-interface-clock";
|
||||
clocks = <&l4_ick>;
|
||||
|
|
@ -216,7 +216,7 @@
|
|||
dss_clkdm: dss_clkdm {
|
||||
compatible = "ti,clockdomain";
|
||||
clocks = <&dss_tv_fck>, <&dss_96m_fck>, <&dss2_alwon_fck>,
|
||||
<&dss1_alwon_fck_3430es2>, <&dss_ick_3430es2>;
|
||||
<&dss1_alwon_fck>, <&dss_ick>;
|
||||
};
|
||||
|
||||
core_l4_clkdm: core_l4_clkdm {
|
||||
|
|
|
|||
|
|
@ -70,6 +70,26 @@
|
|||
};
|
||||
};
|
||||
|
||||
&dpll4_m2x2_mul_ck {
|
||||
clock-mult = <1>;
|
||||
};
|
||||
|
||||
&dpll4_m3x2_mul_ck {
|
||||
clock-mult = <1>;
|
||||
};
|
||||
|
||||
&dpll4_m4x2_mul_ck {
|
||||
ti,clock-mult = <1>;
|
||||
};
|
||||
|
||||
&dpll4_m5x2_mul_ck {
|
||||
clock-mult = <1>;
|
||||
};
|
||||
|
||||
&dpll4_m6x2_mul_ck {
|
||||
clock-mult = <1>;
|
||||
};
|
||||
|
||||
&cm_clockdomains {
|
||||
dpll4_clkdm: dpll4_clkdm {
|
||||
compatible = "ti,clockdomain";
|
||||
|
|
|
|||
|
|
@ -25,16 +25,16 @@
|
|||
ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
|
||||
};
|
||||
|
||||
ssi_ssr_fck_3430es2: ssi_ssr_fck_3430es2 {
|
||||
ssi_ssr_fck: ssi_ssr_fck_3430es2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,composite-clock";
|
||||
clocks = <&ssi_ssr_gate_fck_3430es2>, <&ssi_ssr_div_fck_3430es2>;
|
||||
};
|
||||
|
||||
ssi_sst_fck_3430es2: ssi_sst_fck_3430es2 {
|
||||
ssi_sst_fck: ssi_sst_fck_3430es2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
clocks = <&ssi_ssr_fck_3430es2>;
|
||||
clocks = <&ssi_ssr_fck>;
|
||||
clock-mult = <1>;
|
||||
clock-div = <2>;
|
||||
};
|
||||
|
|
@ -55,7 +55,7 @@
|
|||
clock-div = <1>;
|
||||
};
|
||||
|
||||
ssi_ick_3430es2: ssi_ick_3430es2 {
|
||||
ssi_ick: ssi_ick_3430es2 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap3-ssi-interface-clock";
|
||||
clocks = <&ssi_l4_ick>;
|
||||
|
|
@ -193,6 +193,6 @@
|
|||
<&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
|
||||
<&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
|
||||
<&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
|
||||
<&ssi_ick_3430es2>;
|
||||
<&ssi_ick>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -39,6 +39,26 @@
|
|||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
abb_mpu_iva: regulator-abb-mpu {
|
||||
compatible = "ti,abb-v1";
|
||||
regulator-name = "abb_mpu_iva";
|
||||
#address-cell = <0>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x483072f0 0x8>, <0x48306818 0x4>;
|
||||
reg-names = "base-address", "int-address";
|
||||
ti,tranxdone-status-mask = <0x4000000>;
|
||||
clocks = <&sys_ck>;
|
||||
ti,settling-time = <30>;
|
||||
ti,clock-cycles = <8>;
|
||||
ti,abb_info = <
|
||||
/*uV ABB efuse rbb_m fbb_m vset_m*/
|
||||
1012500 0 0 0 0 0
|
||||
1200000 0 0 0 0 0
|
||||
1325000 0 0 0 0 0
|
||||
1375000 1 0 0 0 0
|
||||
>;
|
||||
};
|
||||
|
||||
omap3_pmx_core2: pinmux@480025a0 {
|
||||
compatible = "ti,omap3-padconf", "pinctrl-single";
|
||||
reg = <0x480025a0 0x5c>;
|
||||
|
|
@ -52,7 +72,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
/include/ "omap36xx-clocks.dtsi"
|
||||
/* OMAP3630 needs dss_96m_fck for VENC */
|
||||
&venc {
|
||||
clocks = <&dss_tv_fck>, <&dss_96m_fck>;
|
||||
clock-names = "fck", "tv_dac_clk";
|
||||
};
|
||||
|
||||
/include/ "omap34xx-omap36xx-clocks.dtsi"
|
||||
/include/ "omap36xx-omap3430es2plus-clocks.dtsi"
|
||||
/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
|
||||
/include/ "omap36xx-clocks.dtsi"
|
||||
|
|
|
|||
|
|
@ -425,10 +425,11 @@
|
|||
|
||||
dpll4_m4x2_mul_ck: dpll4_m4x2_mul_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-factor-clock";
|
||||
compatible = "ti,fixed-factor-clock";
|
||||
clocks = <&dpll4_m4_ck>;
|
||||
clock-mult = <2>;
|
||||
clock-div = <1>;
|
||||
ti,clock-mult = <2>;
|
||||
ti,clock-div = <1>;
|
||||
ti,set-rate-parent;
|
||||
};
|
||||
|
||||
dpll4_m4x2_ck: dpll4_m4x2_ck {
|
||||
|
|
@ -438,6 +439,7 @@
|
|||
ti,bit-shift = <0x1d>;
|
||||
reg = <0x0d00>;
|
||||
ti,set-bit-to-disable;
|
||||
ti,set-rate-parent;
|
||||
};
|
||||
|
||||
dpll4_m5_ck: dpll4_m5_ck {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,146 @@
|
|||
/*
|
||||
* Copyright (C) 2014 Florian Vaussard, EPFL Mobots group
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "omap4-duovero.dtsi"
|
||||
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "OMAP4430 Gumstix Duovero on Parlor";
|
||||
compatible = "gumstix,omap4-duovero-parlor", "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4";
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
led0 {
|
||||
label = "duovero:blue:led0";
|
||||
gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* gpio_122 */
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
button0@121 {
|
||||
label = "button0";
|
||||
linux,code = <BTN_0>;
|
||||
gpios = <&gpio4 25 GPIO_ACTIVE_LOW>; /* gpio_121 */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&omap4_pmx_core {
|
||||
pinctrl-0 = <
|
||||
&led_pins
|
||||
&button_pins
|
||||
&smsc_pins
|
||||
>;
|
||||
|
||||
led_pins: pinmux_led_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xd6 (PIN_OUTPUT | MUX_MODE3) /* abe_dmic_din3.gpio_122 */
|
||||
>;
|
||||
};
|
||||
|
||||
button_pins: pinmux_button_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xd4 (PIN_INPUT_PULLUP | MUX_MODE3) /* abe_dmic_din2.gpio_121 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xe6 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
|
||||
0xe8 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xea (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
|
||||
0xec (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
smsc_pins: pinmux_smsc_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x28 (PIN_INPUT | MUX_MODE3) /* gpmc_a20.gpio_44: IRQ */
|
||||
0x2a (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a21.gpio_45: nReset */
|
||||
0x30 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_a24.gpio_48: amdix enabled */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
|
||||
clock-frequency = <100000>;
|
||||
|
||||
/* optional 1K EEPROM with revision information */
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c01";
|
||||
reg = <0x51>;
|
||||
pagesize = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
#include "omap-gpmc-smsc911x.dtsi"
|
||||
|
||||
&gpmc {
|
||||
ranges = <5 0 0x2c000000 0x1000000>; /* CS5 */
|
||||
|
||||
ethernet@gpmc {
|
||||
reg = <5 0 0xff>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <12 IRQ_TYPE_LEVEL_LOW>; /* gpio_44 */
|
||||
|
||||
phy-mode = "mii";
|
||||
|
||||
gpmc,cs-on-ns = <10>;
|
||||
gpmc,cs-rd-off-ns = <50>;
|
||||
gpmc,cs-wr-off-ns = <50>;
|
||||
gpmc,adv-on-ns = <0>;
|
||||
gpmc,adv-rd-off-ns = <10>;
|
||||
gpmc,adv-wr-off-ns = <10>;
|
||||
gpmc,oe-on-ns = <15>;
|
||||
gpmc,oe-off-ns = <50>;
|
||||
gpmc,we-on-ns = <15>;
|
||||
gpmc,we-off-ns = <50>;
|
||||
gpmc,rd-cycle-ns = <50>;
|
||||
gpmc,wr-cycle-ns = <50>;
|
||||
gpmc,access-ns = <50>;
|
||||
gpmc,page-burst-access-ns = <0>;
|
||||
gpmc,bus-turnaround-ns = <35>;
|
||||
gpmc,cycle2cycle-delay-ns = <35>;
|
||||
gpmc,wr-data-mux-bus-ns = <35>;
|
||||
gpmc,wr-access-ns = <50>;
|
||||
|
||||
gpmc,mux-add-data = <2>;
|
||||
gpmc,sync-read;
|
||||
gpmc,sync-write;
|
||||
gpmc,clk-activation-ns = <5>;
|
||||
gpmc,sync-clk-ps = <20000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,252 @@
|
|||
/*
|
||||
* Copyright (C) 2014 Florian Vaussard, EPFL Mobots group
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include "omap443x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Gumstix Duovero";
|
||||
compatible = "gumstix,omap4-duovero", "ti,omap4430", "ti,omap4";
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "ti,abe-twl6040";
|
||||
ti,model = "DuoVero";
|
||||
|
||||
ti,mclk-freq = <38400000>;
|
||||
|
||||
ti,mcpdm = <&mcpdm>;
|
||||
|
||||
ti,twl6040 = <&twl6040>;
|
||||
|
||||
/* Audio routing */
|
||||
ti,audio-routing =
|
||||
"Headset Stereophone", "HSOL",
|
||||
"Headset Stereophone", "HSOR",
|
||||
"HSMIC", "Headset Mic",
|
||||
"Headset Mic", "Headset Mic Bias";
|
||||
};
|
||||
|
||||
/* HS USB Host PHY on PORT 1 */
|
||||
hsusb1_phy: hsusb1_phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hsusb1phy_pins>;
|
||||
|
||||
clocks = <&auxclk3_ck>;
|
||||
clock-names = "main_clk";
|
||||
clock-frequency = <19200000>;
|
||||
};
|
||||
|
||||
/* regulator for w2cbw0015 on sdio5 */
|
||||
w2cbw0015_vmmc: w2cbw0015_vmmc {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&w2cbw0015_pins>;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "w2cbw0015";
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
gpio = <&gpio2 11 GPIO_ACTIVE_LOW>; /* gpio_43 */
|
||||
startup-delay-us = <70000>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
&omap4_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
&twl6040_pins
|
||||
&mcpdm_pins
|
||||
&mcbsp1_pins
|
||||
&hsusbb1_pins
|
||||
>;
|
||||
|
||||
twl6040_pins: pinmux_twl6040_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x126 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_nxt.gpio_160 */
|
||||
0x160 (PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcpdm_pins: pinmux_mcpdm_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xc6 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */
|
||||
0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */
|
||||
0xca (PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */
|
||||
0xcc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */
|
||||
0xce (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp1_pins: pinmux_mcbsp1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xbe (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
|
||||
0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
|
||||
0xc2 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */
|
||||
0xc4 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
|
||||
>;
|
||||
};
|
||||
|
||||
hsusbb1_pins: pinmux_hsusbb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x82 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */
|
||||
0x84 (PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */
|
||||
0x86 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */
|
||||
0x88 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */
|
||||
0x8a (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */
|
||||
0x8c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */
|
||||
0x8e (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */
|
||||
0x90 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */
|
||||
0x92 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */
|
||||
0x94 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */
|
||||
0x96 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */
|
||||
0x98 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */
|
||||
>;
|
||||
};
|
||||
|
||||
hsusb1phy_pins: pinmux_hsusb1phy_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x4c (PIN_OUTPUT | MUX_MODE3) /* gpmc_wait1.gpio_62 */
|
||||
>;
|
||||
};
|
||||
|
||||
w2cbw0015_pins: pinmux_w2cbw0015_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x26 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a19.gpio_43 */
|
||||
0x3a (PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xe2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
0xe4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c4_pins: pinmux_i2c4_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xee (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
|
||||
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xa2 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
|
||||
0xa4 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmcc1_cmd */
|
||||
0xa6 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmcc1_dat0 */
|
||||
0xa8 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
|
||||
0xaa (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
|
||||
0xac (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc5_pins: pinmux_mmc5_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x108 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk */
|
||||
0x10a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmcc5_cmd */
|
||||
0x10c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmcc5_dat0 */
|
||||
0x10e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1 */
|
||||
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2 */
|
||||
0x112 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
/* PMIC */
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
|
||||
clock-frequency = <400000>;
|
||||
|
||||
twl: twl@48 {
|
||||
reg = <0x48>;
|
||||
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
|
||||
interrupt-parent = <&gic>;
|
||||
};
|
||||
|
||||
twl6040: twl@4b {
|
||||
compatible = "ti,twl6040";
|
||||
reg = <0x4b>;
|
||||
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
|
||||
interrupt-parent = <&gic>;
|
||||
ti,audpwron-gpio = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* gpio_160 */
|
||||
|
||||
vio-supply = <&v1v8>;
|
||||
v2v1-supply = <&v2v1>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
#include "twl6030.dtsi"
|
||||
#include "twl6030_omap4.dtsi"
|
||||
|
||||
/* on-board bluetooth / WiFi module */
|
||||
&i2c4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4_pins>;
|
||||
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
|
||||
vmmc-supply = <&vmmc>;
|
||||
ti,bus-width = <4>;
|
||||
ti,non-removable; /* FIXME: use PMIC_MMC detect */
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* mmc3 is available to the expansion board */
|
||||
|
||||
&mmc4 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* on-board WiFi module */
|
||||
&mmc5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc5_pins>;
|
||||
|
||||
vmmc-supply = <&w2cbw0015_vmmc>;
|
||||
ti,bus-width = <4>;
|
||||
ti,non-removable;
|
||||
cap-power-off-card;
|
||||
};
|
||||
|
||||
&twl_usb_comparator {
|
||||
usb-supply = <&vusb>;
|
||||
};
|
||||
|
||||
&usb_otg_hs {
|
||||
interface-type = <1>;
|
||||
mode = <3>;
|
||||
power = <50>;
|
||||
};
|
||||
|
||||
&usbhshost {
|
||||
port1-mode = "ehci-phy";
|
||||
};
|
||||
|
||||
&usbhsehci {
|
||||
phys = <&hsusb1_phy>;
|
||||
};
|
||||
|
||||
|
|
@ -16,6 +16,11 @@
|
|||
reg = <0x80000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
|
||||
aliases {
|
||||
display0 = &dvi0;
|
||||
display1 = &hdmi0;
|
||||
};
|
||||
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -83,12 +88,8 @@
|
|||
compatible = "usb-nop-xceiv";
|
||||
reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */
|
||||
vcc-supply = <&hsusb1_power>;
|
||||
/**
|
||||
* FIXME:
|
||||
* put the right clock phandle here when available
|
||||
* clocks = <&auxclk3>;
|
||||
* clock-names = "main_clk";
|
||||
*/
|
||||
clocks = <&auxclk3_ck>;
|
||||
clock-names = "main_clk";
|
||||
clock-frequency = <19200000>;
|
||||
};
|
||||
|
||||
|
|
@ -104,14 +105,94 @@
|
|||
startup-delay-us = <70000>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
tfp410: encoder@0 {
|
||||
compatible = "ti,tfp410";
|
||||
powerdown-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; /* gpio_0 */
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
tfp410_in: endpoint@0 {
|
||||
remote-endpoint = <&dpi_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
tfp410_out: endpoint@0 {
|
||||
remote-endpoint = <&dvi_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dvi0: connector@0 {
|
||||
compatible = "dvi-connector";
|
||||
label = "dvi";
|
||||
|
||||
digital;
|
||||
|
||||
ddc-i2c-bus = <&i2c3>;
|
||||
|
||||
port {
|
||||
dvi_connector_in: endpoint {
|
||||
remote-endpoint = <&tfp410_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tpd12s015: encoder@1 {
|
||||
compatible = "ti,tpd12s015";
|
||||
|
||||
gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */
|
||||
<&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */
|
||||
<&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
tpd12s015_in: endpoint@0 {
|
||||
remote-endpoint = <&hdmi_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
tpd12s015_out: endpoint@0 {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
hdmi0: connector@1 {
|
||||
compatible = "hdmi-connector";
|
||||
label = "hdmi";
|
||||
|
||||
type = "a";
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&tpd12s015_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&omap4_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
&twl6040_pins
|
||||
&mcpdm_pins
|
||||
&mcbsp1_pins
|
||||
&dss_dpi_pins
|
||||
&tfp410_pins
|
||||
&dss_hdmi_pins
|
||||
|
|
@ -300,6 +381,10 @@
|
|||
twl6040: twl@4b {
|
||||
compatible = "ti,twl6040";
|
||||
reg = <0x4b>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&twl6040_pins>;
|
||||
|
||||
/* IRQ# = 119 */
|
||||
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
|
||||
interrupt-parent = <&gic>;
|
||||
|
|
@ -380,16 +465,16 @@
|
|||
device-handle = <&elpida_ECB240ABACN>;
|
||||
};
|
||||
|
||||
&mcbsp2 {
|
||||
status = "disabled";
|
||||
&mcbsp1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcbsp1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcbsp3 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&dmic {
|
||||
status = "disabled";
|
||||
&mcpdm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcpdm_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&twl_usb_comparator {
|
||||
|
|
@ -409,3 +494,30 @@
|
|||
&usbhsehci {
|
||||
phys = <&hsusb1_phy>;
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "ok";
|
||||
|
||||
port {
|
||||
dpi_out: endpoint {
|
||||
remote-endpoint = <&tfp410_in>;
|
||||
data-lines = <24>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi2 {
|
||||
status = "ok";
|
||||
vdd-supply = <&vcxio>;
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "ok";
|
||||
vdda-supply = <&vdac>;
|
||||
|
||||
port {
|
||||
hdmi_out: endpoint {
|
||||
remote-endpoint = <&tpd12s015_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -19,6 +19,12 @@
|
|||
reg = <0x80000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
|
||||
aliases {
|
||||
display0 = &lcd0;
|
||||
display1 = &lcd1;
|
||||
display2 = &hdmi0;
|
||||
};
|
||||
|
||||
vdd_eth: fixedregulator-vdd-eth {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VDD_ETH";
|
||||
|
|
@ -153,16 +159,53 @@
|
|||
startup-delay-us = <70000>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
tpd12s015: encoder@0 {
|
||||
compatible = "ti,tpd12s015";
|
||||
|
||||
gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */
|
||||
<&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */
|
||||
<&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
tpd12s015_in: endpoint@0 {
|
||||
remote-endpoint = <&hdmi_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
tpd12s015_out: endpoint@0 {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
hdmi0: connector@0 {
|
||||
compatible = "hdmi-connector";
|
||||
label = "hdmi";
|
||||
|
||||
type = "c";
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&tpd12s015_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&omap4_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <
|
||||
&twl6040_pins
|
||||
&mcpdm_pins
|
||||
&dmic_pins
|
||||
&mcbsp1_pins
|
||||
&mcbsp2_pins
|
||||
&dss_hdmi_pins
|
||||
&tpd12s015_pins
|
||||
>;
|
||||
|
|
@ -326,6 +369,10 @@
|
|||
twl6040: twl@4b {
|
||||
compatible = "ti,twl6040";
|
||||
reg = <0x4b>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&twl6040_pins>;
|
||||
|
||||
/* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
|
||||
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
|
||||
interrupt-parent = <&gic>;
|
||||
|
|
@ -537,8 +584,28 @@
|
|||
pinctrl-0 = <&uart4_pins>;
|
||||
};
|
||||
|
||||
&mcbsp3 {
|
||||
status = "disabled";
|
||||
&mcbsp1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcbsp1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcbsp2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcbsp2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dmic {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&dmic_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mcpdm {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcpdm_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&twl_usb_comparator {
|
||||
|
|
@ -550,3 +617,68 @@
|
|||
mode = <3>;
|
||||
power = <50>;
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&dsi1 {
|
||||
status = "ok";
|
||||
vdd-supply = <&vcxio>;
|
||||
|
||||
port {
|
||||
dsi1_out_ep: endpoint {
|
||||
remote-endpoint = <&lcd0_in>;
|
||||
lanes = <0 1 2 3 4 5>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd0: display {
|
||||
compatible = "tpo,taal", "panel-dsi-cm";
|
||||
label = "lcd0";
|
||||
|
||||
reset-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
|
||||
|
||||
port {
|
||||
lcd0_in: endpoint {
|
||||
remote-endpoint = <&dsi1_out_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dsi2 {
|
||||
status = "ok";
|
||||
vdd-supply = <&vcxio>;
|
||||
|
||||
port {
|
||||
dsi2_out_ep: endpoint {
|
||||
remote-endpoint = <&lcd1_in>;
|
||||
lanes = <0 1 2 3 4 5>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd1: display {
|
||||
compatible = "tpo,taal", "panel-dsi-cm";
|
||||
label = "lcd1";
|
||||
|
||||
reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
|
||||
|
||||
port {
|
||||
lcd1_in: endpoint {
|
||||
remote-endpoint = <&dsi2_out_ep>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "ok";
|
||||
vdda-supply = <&vdac>;
|
||||
|
||||
port {
|
||||
hdmi_out: endpoint {
|
||||
remote-endpoint = <&tpd12s015_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -36,6 +36,11 @@
|
|||
device_type = "cpu";
|
||||
next-level-cache = <&L2>;
|
||||
reg = <0x0>;
|
||||
|
||||
clocks = <&dpll_mpu_ck>;
|
||||
clock-names = "cpu";
|
||||
|
||||
clock-latency = <300000>; /* From omap-cpufreq driver */
|
||||
};
|
||||
cpu@1 {
|
||||
compatible = "arm,cortex-a9";
|
||||
|
|
@ -313,6 +318,7 @@
|
|||
compatible = "ti,omap4-hwspinlock";
|
||||
reg = <0x4a0f6000 0x1000>;
|
||||
ti,hwmods = "spinlock";
|
||||
#hwlock-cells = <1>;
|
||||
};
|
||||
|
||||
i2c1: i2c@48070000 {
|
||||
|
|
@ -461,6 +467,21 @@
|
|||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
mmu_dsp: mmu@4a066000 {
|
||||
compatible = "ti,omap4-iommu";
|
||||
reg = <0x4a066000 0x100>;
|
||||
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "mmu_dsp";
|
||||
};
|
||||
|
||||
mmu_ipu: mmu@55082000 {
|
||||
compatible = "ti,omap4-iommu";
|
||||
reg = <0x55082000 0x100>;
|
||||
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "mmu_ipu";
|
||||
ti,iommu-bus-err-back;
|
||||
};
|
||||
|
||||
wdt2: wdt@4a314000 {
|
||||
compatible = "ti,omap4-wdt", "ti,omap3-wdt";
|
||||
reg = <0x4a314000 0x80>;
|
||||
|
|
@ -478,6 +499,7 @@
|
|||
dmas = <&sdma 65>,
|
||||
<&sdma 66>;
|
||||
dma-names = "up_link", "dn_link";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dmic: dmic@4012e000 {
|
||||
|
|
@ -489,6 +511,7 @@
|
|||
ti,hwmods = "dmic";
|
||||
dmas = <&sdma 67>;
|
||||
dma-names = "up_link";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp1: mcbsp@40122000 {
|
||||
|
|
@ -503,6 +526,7 @@
|
|||
dmas = <&sdma 33>,
|
||||
<&sdma 34>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp2: mcbsp@40124000 {
|
||||
|
|
@ -517,6 +541,7 @@
|
|||
dmas = <&sdma 17>,
|
||||
<&sdma 18>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp3: mcbsp@40126000 {
|
||||
|
|
@ -531,6 +556,7 @@
|
|||
dmas = <&sdma 19>,
|
||||
<&sdma 20>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp4: mcbsp@48096000 {
|
||||
|
|
@ -544,6 +570,7 @@
|
|||
dmas = <&sdma 31>,
|
||||
<&sdma 32>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
keypad: keypad@4a31c000 {
|
||||
|
|
@ -554,6 +581,13 @@
|
|||
ti,hwmods = "kbd";
|
||||
};
|
||||
|
||||
dmm@4e000000 {
|
||||
compatible = "ti,omap4-dmm";
|
||||
reg = <0x4e000000 0x800>;
|
||||
interrupts = <0 113 0x4>;
|
||||
ti,hwmods = "dmm";
|
||||
};
|
||||
|
||||
emif1: emif@4c000000 {
|
||||
compatible = "ti,emif-4d";
|
||||
reg = <0x4c000000 0x100>;
|
||||
|
|
@ -699,14 +733,14 @@
|
|||
ranges;
|
||||
|
||||
usbhsohci: ohci@4a064800 {
|
||||
compatible = "ti,ohci-omap3", "usb-ohci";
|
||||
compatible = "ti,ohci-omap3";
|
||||
reg = <0x4a064800 0x400>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
usbhsehci: ehci@4a064c00 {
|
||||
compatible = "ti,ehci-omap", "usb-ehci";
|
||||
compatible = "ti,ehci-omap";
|
||||
reg = <0x4a064c00 0x400>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
@ -757,6 +791,111 @@
|
|||
dmas = <&sdma 117>, <&sdma 116>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
abb_mpu: regulator-abb-mpu {
|
||||
compatible = "ti,abb-v2";
|
||||
regulator-name = "abb_mpu";
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
ti,tranxdone-status-mask = <0x80>;
|
||||
clocks = <&sys_clkin_ck>;
|
||||
ti,settling-time = <50>;
|
||||
ti,clock-cycles = <16>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
abb_iva: regulator-abb-iva {
|
||||
compatible = "ti,abb-v2";
|
||||
regulator-name = "abb_iva";
|
||||
#address-cells = <0>;
|
||||
#size-cells = <0>;
|
||||
ti,tranxdone-status-mask = <0x80000000>;
|
||||
clocks = <&sys_clkin_ck>;
|
||||
ti,settling-time = <50>;
|
||||
ti,clock-cycles = <16>;
|
||||
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dss: dss@58000000 {
|
||||
compatible = "ti,omap4-dss";
|
||||
reg = <0x58000000 0x80>;
|
||||
status = "disabled";
|
||||
ti,hwmods = "dss_core";
|
||||
clocks = <&dss_dss_clk>;
|
||||
clock-names = "fck";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
dispc@58001000 {
|
||||
compatible = "ti,omap4-dispc";
|
||||
reg = <0x58001000 0x1000>;
|
||||
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "dss_dispc";
|
||||
clocks = <&dss_dss_clk>;
|
||||
clock-names = "fck";
|
||||
};
|
||||
|
||||
rfbi: encoder@58002000 {
|
||||
compatible = "ti,omap4-rfbi";
|
||||
reg = <0x58002000 0x1000>;
|
||||
status = "disabled";
|
||||
ti,hwmods = "dss_rfbi";
|
||||
clocks = <&dss_dss_clk>, <&dss_fck>;
|
||||
clock-names = "fck", "ick";
|
||||
};
|
||||
|
||||
venc: encoder@58003000 {
|
||||
compatible = "ti,omap4-venc";
|
||||
reg = <0x58003000 0x1000>;
|
||||
status = "disabled";
|
||||
ti,hwmods = "dss_venc";
|
||||
clocks = <&dss_tv_clk>;
|
||||
clock-names = "fck";
|
||||
};
|
||||
|
||||
dsi1: encoder@58004000 {
|
||||
compatible = "ti,omap4-dsi";
|
||||
reg = <0x58004000 0x200>,
|
||||
<0x58004200 0x40>,
|
||||
<0x58004300 0x20>;
|
||||
reg-names = "proto", "phy", "pll";
|
||||
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
ti,hwmods = "dss_dsi1";
|
||||
clocks = <&dss_dss_clk>, <&dss_sys_clk>;
|
||||
clock-names = "fck", "sys_clk";
|
||||
};
|
||||
|
||||
dsi2: encoder@58005000 {
|
||||
compatible = "ti,omap4-dsi";
|
||||
reg = <0x58005000 0x200>,
|
||||
<0x58005200 0x40>,
|
||||
<0x58005300 0x20>;
|
||||
reg-names = "proto", "phy", "pll";
|
||||
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
ti,hwmods = "dss_dsi2";
|
||||
clocks = <&dss_dss_clk>, <&dss_sys_clk>;
|
||||
clock-names = "fck", "sys_clk";
|
||||
};
|
||||
|
||||
hdmi: encoder@58006000 {
|
||||
compatible = "ti,omap4-hdmi";
|
||||
reg = <0x58006000 0x200>,
|
||||
<0x58006200 0x100>,
|
||||
<0x58006300 0x100>,
|
||||
<0x58006400 0x1000>;
|
||||
reg-names = "wp", "pll", "phy", "core";
|
||||
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
ti,hwmods = "dss_hdmi";
|
||||
clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
|
||||
clock-names = "fck", "sys_clk";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -43,6 +43,32 @@
|
|||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ocp {
|
||||
abb_mpu: regulator-abb-mpu {
|
||||
status = "okay";
|
||||
|
||||
reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>;
|
||||
reg-names = "base-address", "int-address";
|
||||
|
||||
ti,abb_info = <
|
||||
/*uV ABB efuse rbb_m fbb_m vset_m*/
|
||||
1025000 0 0 0 0 0
|
||||
1200000 0 0 0 0 0
|
||||
1313000 0 0 0 0 0
|
||||
1375000 1 0 0 0 0
|
||||
1389000 1 0 0 0 0
|
||||
>;
|
||||
};
|
||||
|
||||
/* Default unused, just provide register info for record */
|
||||
abb_iva: regulator-abb-iva {
|
||||
reg = <0x4a307bd8 0x8>, <0x4a306010 0x4>;
|
||||
reg-names = "base-address", "int-address";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
/include/ "omap443x-clocks.dtsi"
|
||||
|
|
|
|||
|
|
@ -50,7 +50,44 @@
|
|||
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
|
||||
abb_mpu: regulator-abb-mpu {
|
||||
status = "okay";
|
||||
|
||||
reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>,
|
||||
<0x4A002268 0x4>;
|
||||
reg-names = "base-address", "int-address",
|
||||
"efuse-address";
|
||||
|
||||
ti,abb_info = <
|
||||
/*uV ABB efuse rbb_m fbb_m vset_m*/
|
||||
1025000 0 0 0 0 0
|
||||
1200000 0 0 0 0 0
|
||||
1313000 0 0 0x100000 0x40000 0
|
||||
1375000 1 0 0 0 0
|
||||
1389000 1 0 0 0 0
|
||||
>;
|
||||
};
|
||||
|
||||
abb_iva: regulator-abb-iva {
|
||||
status = "okay";
|
||||
|
||||
reg = <0x4a307bd8 0x8>, <0x4a306010 0x4>,
|
||||
<0x4A002268 0x4>;
|
||||
reg-names = "base-address", "int-address",
|
||||
"efuse-address";
|
||||
|
||||
ti,abb_info = <
|
||||
/*uV ABB efuse rbb_m fbb_m vset_m*/
|
||||
950000 0 0 0 0 0
|
||||
1140000 0 0 0 0 0
|
||||
1291000 0 0 0x200000 0 0
|
||||
1375000 1 0 0 0 0
|
||||
1376000 1 0 0 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
/include/ "omap446x-clocks.dtsi"
|
||||
|
|
|
|||
|
|
@ -31,12 +31,8 @@
|
|||
hsusb2_phy: hsusb2_phy {
|
||||
compatible = "usb-nop-xceiv";
|
||||
reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
|
||||
/**
|
||||
* FIXME
|
||||
* Put the right clock phandle here when available
|
||||
* clocks = <&auxclk1>;
|
||||
* clock-names = "main_clk";
|
||||
*/
|
||||
clocks = <&auxclk1_ck>;
|
||||
clock-names = "main_clk";
|
||||
clock-frequency = <19200000>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -49,6 +49,12 @@
|
|||
1000000 1060000
|
||||
1500000 1250000
|
||||
>;
|
||||
|
||||
clocks = <&dpll_mpu_ck>;
|
||||
clock-names = "cpu";
|
||||
|
||||
clock-latency = <300000>; /* From omap-cpufreq driver */
|
||||
|
||||
/* cooling options */
|
||||
cooling-min-level = <0>;
|
||||
cooling-max-level = <2>;
|
||||
|
|
@ -353,6 +359,7 @@
|
|||
compatible = "ti,omap4-hwspinlock";
|
||||
reg = <0x4a0f6000 0x1000>;
|
||||
ti,hwmods = "spinlock";
|
||||
#hwlock-cells = <1>;
|
||||
};
|
||||
|
||||
mcspi1: spi@48098000 {
|
||||
|
|
@ -513,6 +520,21 @@
|
|||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
mmu_dsp: mmu@4a066000 {
|
||||
compatible = "ti,omap4-iommu";
|
||||
reg = <0x4a066000 0x100>;
|
||||
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "mmu_dsp";
|
||||
};
|
||||
|
||||
mmu_ipu: mmu@55082000 {
|
||||
compatible = "ti,omap4-iommu";
|
||||
reg = <0x55082000 0x100>;
|
||||
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "mmu_ipu";
|
||||
ti,iommu-bus-err-back;
|
||||
};
|
||||
|
||||
keypad: keypad@4ae1c000 {
|
||||
compatible = "ti,omap4-keypad";
|
||||
reg = <0x4ae1c000 0x400>;
|
||||
|
|
@ -529,6 +551,7 @@
|
|||
dmas = <&sdma 65>,
|
||||
<&sdma 66>;
|
||||
dma-names = "up_link", "dn_link";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dmic: dmic@4012e000 {
|
||||
|
|
@ -540,6 +563,7 @@
|
|||
ti,hwmods = "dmic";
|
||||
dmas = <&sdma 67>;
|
||||
dma-names = "up_link";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp1: mcbsp@40122000 {
|
||||
|
|
@ -554,6 +578,7 @@
|
|||
dmas = <&sdma 33>,
|
||||
<&sdma 34>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp2: mcbsp@40124000 {
|
||||
|
|
@ -568,6 +593,7 @@
|
|||
dmas = <&sdma 17>,
|
||||
<&sdma 18>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mcbsp3: mcbsp@40126000 {
|
||||
|
|
@ -582,6 +608,7 @@
|
|||
dmas = <&sdma 19>,
|
||||
<&sdma 20>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timer1: timer@4ae18000 {
|
||||
|
|
@ -683,6 +710,13 @@
|
|||
ti,hwmods = "wd_timer2";
|
||||
};
|
||||
|
||||
dmm@4e000000 {
|
||||
compatible = "ti,omap5-dmm";
|
||||
reg = <0x4e000000 0x800>;
|
||||
interrupts = <0 113 0x4>;
|
||||
ti,hwmods = "dmm";
|
||||
};
|
||||
|
||||
emif1: emif@4c000000 {
|
||||
compatible = "ti,emif-4d5";
|
||||
ti,hwmods = "emif1";
|
||||
|
|
@ -732,7 +766,8 @@
|
|||
compatible = "snps,dwc3";
|
||||
reg = <0x4a030000 0x10000>;
|
||||
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
|
||||
usb-phy = <&usb2_phy>, <&usb3_phy>;
|
||||
phys = <&usb2_phy>, <&usb3_phy>;
|
||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
dr_mode = "peripheral";
|
||||
tx-fifo-resize;
|
||||
};
|
||||
|
|
@ -749,6 +784,7 @@
|
|||
compatible = "ti,omap-usb2";
|
||||
reg = <0x4a084000 0x7c>;
|
||||
ctrl-module = <&omap_control_usb2phy>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
usb3_phy: usb3phy@4a084400 {
|
||||
|
|
@ -758,6 +794,7 @@
|
|||
<0x4a084c00 0x40>;
|
||||
reg-names = "phy_rx", "phy_tx", "pll_ctrl";
|
||||
ctrl-module = <&omap_control_usb3phy>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -777,14 +814,14 @@
|
|||
ranges;
|
||||
|
||||
usbhsohci: ohci@4a064800 {
|
||||
compatible = "ti,ohci-omap3", "usb-ohci";
|
||||
compatible = "ti,ohci-omap3";
|
||||
reg = <0x4a064800 0x400>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
usbhsehci: ehci@4a064c00 {
|
||||
compatible = "ti,ehci-omap", "usb-ehci";
|
||||
compatible = "ti,ehci-omap";
|
||||
reg = <0x4a064c00 0x400>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
|
|||
|
|
@ -82,5 +82,10 @@
|
|||
reg = <12>;
|
||||
regulator-compatible = "vmmc";
|
||||
};
|
||||
|
||||
vbb_reg: regulator@13 {
|
||||
reg = <13>;
|
||||
regulator-compatible = "vbb";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -145,4 +145,11 @@
|
|||
compatible = "ti,twl4030-pwrbutton";
|
||||
interrupts = <8>;
|
||||
};
|
||||
|
||||
twl_keypad: keypad {
|
||||
compatible = "ti,twl4030-keypad";
|
||||
interrupts = <1>;
|
||||
keypad,num-rows = <8>;
|
||||
keypad,num-columns = <8>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -247,7 +247,7 @@ static struct clockdomain neon_clkdm = {
|
|||
static struct clockdomain iva2_clkdm = {
|
||||
.name = "iva2_clkdm",
|
||||
.pwrdm = { .name = "iva2_pwrdm" },
|
||||
.flags = CLKDM_CAN_HWSUP_SWSUP,
|
||||
.flags = CLKDM_CAN_SWSUP,
|
||||
.dep_bit = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT,
|
||||
.wkdep_srcs = iva2_wkdeps,
|
||||
.clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK,
|
||||
|
|
|
|||
|
|
@ -229,6 +229,9 @@ static struct omap_iommu_arch_data omap3_isp_iommu = {
|
|||
|
||||
int omap3_init_camera(struct isp_platform_data *pdata)
|
||||
{
|
||||
if (of_have_populated_dt())
|
||||
omap3_isp_iommu.name = "480bd400.mmu";
|
||||
|
||||
omap3isp_device.dev.platform_data = pdata;
|
||||
omap3isp_device.dev.archdata.iommu = &omap3_isp_iommu;
|
||||
|
||||
|
|
|
|||
|
|
@ -45,24 +45,31 @@ static struct platform_device gpmc_nand_device = {
|
|||
|
||||
static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
|
||||
{
|
||||
/* support only OMAP3 class */
|
||||
if (!cpu_is_omap34xx() && !soc_is_am33xx()) {
|
||||
pr_err("BCH ecc is not supported on this CPU\n");
|
||||
/* platforms which support all ECC schemes */
|
||||
if (soc_is_am33xx() || cpu_is_omap44xx() ||
|
||||
soc_is_omap54xx() || soc_is_dra7xx())
|
||||
return 1;
|
||||
|
||||
/* OMAP3xxx do not have ELM engine, so cannot support ECC schemes
|
||||
* which require H/W based ECC error detection */
|
||||
if ((cpu_is_omap34xx() || cpu_is_omap3630()) &&
|
||||
((ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
|
||||
(ecc_opt == OMAP_ECC_BCH8_CODE_HW)))
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1
|
||||
* and AM33xx derivates. Other chips may be added if confirmed to work.
|
||||
*/
|
||||
if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) &&
|
||||
(!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)) &&
|
||||
(!soc_is_am33xx())) {
|
||||
pr_err("BCH 4-bit mode is not supported on this CPU\n");
|
||||
if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) &&
|
||||
(!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)))
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
/* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
|
||||
if (ecc_opt == OMAP_ECC_HAM1_CODE_HW)
|
||||
return 1;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* This function will go away once the device-tree convertion is complete */
|
||||
|
|
@ -133,8 +140,10 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
|
|||
|
||||
gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
|
||||
|
||||
if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt))
|
||||
if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) {
|
||||
dev_err(dev, "Unsupported NAND ECC scheme selected\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
err = platform_device_register(&gpmc_nand_device);
|
||||
if (err < 0) {
|
||||
|
|
|
|||
|
|
@ -3029,8 +3029,6 @@ static struct omap_hwmod omap3xxx_mmu_isp_hwmod = {
|
|||
.flags = HWMOD_NO_IDLEST,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_OMAP_IOMMU_IVA2
|
||||
|
||||
/* mmu iva */
|
||||
|
||||
static struct omap_mmu_dev_attr mmu_iva_dev_attr = {
|
||||
|
|
@ -3070,20 +3068,22 @@ static struct omap_hwmod omap3xxx_mmu_iva_hwmod = {
|
|||
.name = "mmu_iva",
|
||||
.class = &omap3xxx_mmu_hwmod_class,
|
||||
.mpu_irqs = omap3xxx_mmu_iva_irqs,
|
||||
.clkdm_name = "iva2_clkdm",
|
||||
.rst_lines = omap3xxx_mmu_iva_resets,
|
||||
.rst_lines_cnt = ARRAY_SIZE(omap3xxx_mmu_iva_resets),
|
||||
.main_clk = "iva2_ck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = OMAP3430_IVA2_MOD,
|
||||
.module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
|
||||
.idlest_reg_id = 1,
|
||||
.idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT,
|
||||
},
|
||||
},
|
||||
.dev_attr = &mmu_iva_dev_attr,
|
||||
.flags = HWMOD_NO_IDLEST,
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
/* l4_per -> gpio4 */
|
||||
static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = {
|
||||
{
|
||||
|
|
@ -3855,9 +3855,7 @@ static struct omap_hwmod_ocp_if *omap34xx_hwmod_ocp_ifs[] __initdata = {
|
|||
&omap3xxx_l4_core__hdq1w,
|
||||
&omap3xxx_sad2d__l3,
|
||||
&omap3xxx_l4_core__mmu_isp,
|
||||
#ifdef CONFIG_OMAP_IOMMU_IVA2
|
||||
&omap3xxx_l3_main__mmu_iva,
|
||||
#endif
|
||||
&omap34xx_l4_core__ssi,
|
||||
NULL
|
||||
};
|
||||
|
|
@ -3881,9 +3879,7 @@ static struct omap_hwmod_ocp_if *omap36xx_hwmod_ocp_ifs[] __initdata = {
|
|||
&omap3xxx_l4_core__hdq1w,
|
||||
&omap3xxx_sad2d__l3,
|
||||
&omap3xxx_l4_core__mmu_isp,
|
||||
#ifdef CONFIG_OMAP_IOMMU_IVA2
|
||||
&omap3xxx_l3_main__mmu_iva,
|
||||
#endif
|
||||
NULL
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1121,6 +1121,71 @@ static struct omap_hwmod omap54xx_mmc5_hwmod = {
|
|||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* 'mmu' class
|
||||
* The memory management unit performs virtual to physical address translation
|
||||
* for its requestors.
|
||||
*/
|
||||
|
||||
static struct omap_hwmod_class_sysconfig omap54xx_mmu_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x0010,
|
||||
.syss_offs = 0x0014,
|
||||
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
|
||||
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
|
||||
SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap54xx_mmu_hwmod_class = {
|
||||
.name = "mmu",
|
||||
.sysc = &omap54xx_mmu_sysc,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_rst_info omap54xx_mmu_dsp_resets[] = {
|
||||
{ .name = "mmu_cache", .rst_shift = 1 },
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap54xx_mmu_dsp_hwmod = {
|
||||
.name = "mmu_dsp",
|
||||
.class = &omap54xx_mmu_hwmod_class,
|
||||
.clkdm_name = "dsp_clkdm",
|
||||
.rst_lines = omap54xx_mmu_dsp_resets,
|
||||
.rst_lines_cnt = ARRAY_SIZE(omap54xx_mmu_dsp_resets),
|
||||
.main_clk = "dpll_iva_h11x2_ck",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = OMAP54XX_CM_DSP_DSP_CLKCTRL_OFFSET,
|
||||
.rstctrl_offs = OMAP54XX_RM_DSP_RSTCTRL_OFFSET,
|
||||
.context_offs = OMAP54XX_RM_DSP_DSP_CONTEXT_OFFSET,
|
||||
.modulemode = MODULEMODE_HWCTRL,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/* mmu ipu */
|
||||
static struct omap_hwmod_rst_info omap54xx_mmu_ipu_resets[] = {
|
||||
{ .name = "mmu_cache", .rst_shift = 2 },
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap54xx_mmu_ipu_hwmod = {
|
||||
.name = "mmu_ipu",
|
||||
.class = &omap54xx_mmu_hwmod_class,
|
||||
.clkdm_name = "ipu_clkdm",
|
||||
.rst_lines = omap54xx_mmu_ipu_resets,
|
||||
.rst_lines_cnt = ARRAY_SIZE(omap54xx_mmu_ipu_resets),
|
||||
.main_clk = "dpll_core_h22x2_ck",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = OMAP54XX_CM_IPU_IPU_CLKCTRL_OFFSET,
|
||||
.rstctrl_offs = OMAP54XX_RM_IPU_RSTCTRL_OFFSET,
|
||||
.context_offs = OMAP54XX_RM_IPU_IPU_CONTEXT_OFFSET,
|
||||
.modulemode = MODULEMODE_HWCTRL,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* 'mpu' class
|
||||
* mpu sub-system
|
||||
|
|
@ -1763,6 +1828,14 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__l3_main_1 = {
|
|||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l4_cfg -> mmu_dsp */
|
||||
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mmu_dsp = {
|
||||
.master = &omap54xx_l4_cfg_hwmod,
|
||||
.slave = &omap54xx_mmu_dsp_hwmod,
|
||||
.clk = "l4_root_clk_div",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* mpu -> l3_main_1 */
|
||||
static struct omap_hwmod_ocp_if omap54xx_mpu__l3_main_1 = {
|
||||
.master = &omap54xx_mpu_hwmod,
|
||||
|
|
@ -1787,6 +1860,14 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__l3_main_2 = {
|
|||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l3_main_2 -> mmu_ipu */
|
||||
static struct omap_hwmod_ocp_if omap54xx_l3_main_2__mmu_ipu = {
|
||||
.master = &omap54xx_l3_main_2_hwmod,
|
||||
.slave = &omap54xx_mmu_ipu_hwmod,
|
||||
.clk = "l3_iclk_div",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l3_main_1 -> l3_main_3 */
|
||||
static struct omap_hwmod_ocp_if omap54xx_l3_main_1__l3_main_3 = {
|
||||
.master = &omap54xx_l3_main_1_hwmod,
|
||||
|
|
@ -2345,6 +2426,7 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
|
|||
&omap54xx_l4_wkup__counter_32k,
|
||||
&omap54xx_l4_cfg__dma_system,
|
||||
&omap54xx_l4_abe__dmic,
|
||||
&omap54xx_l4_cfg__mmu_dsp,
|
||||
&omap54xx_mpu__emif1,
|
||||
&omap54xx_mpu__emif2,
|
||||
&omap54xx_l4_wkup__gpio1,
|
||||
|
|
@ -2360,6 +2442,7 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
|
|||
&omap54xx_l4_per__i2c3,
|
||||
&omap54xx_l4_per__i2c4,
|
||||
&omap54xx_l4_per__i2c5,
|
||||
&omap54xx_l3_main_2__mmu_ipu,
|
||||
&omap54xx_l4_wkup__kbd,
|
||||
&omap54xx_l4_cfg__mailbox,
|
||||
&omap54xx_l4_abe__mcbsp1,
|
||||
|
|
|
|||
|
|
@ -16,12 +16,14 @@
|
|||
#include <linux/wl12xx.h>
|
||||
|
||||
#include <linux/platform_data/pinctrl-single.h>
|
||||
#include <linux/platform_data/iommu-omap.h>
|
||||
|
||||
#include "am35xx.h"
|
||||
#include "common.h"
|
||||
#include "common-board-devices.h"
|
||||
#include "dss-common.h"
|
||||
#include "control.h"
|
||||
#include "omap_device.h"
|
||||
|
||||
struct pdata_init {
|
||||
const char *compatible;
|
||||
|
|
@ -31,20 +33,6 @@ struct pdata_init {
|
|||
struct of_dev_auxdata omap_auxdata_lookup[];
|
||||
static struct twl4030_gpio_platform_data twl_gpio_auxdata;
|
||||
|
||||
/*
|
||||
* Create alias for USB host PHY clock.
|
||||
* Remove this when clock phandle can be provided via DT
|
||||
*/
|
||||
static void __init __used legacy_init_ehci_clk(char *clkname)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = clk_add_alias("main_clk", NULL, clkname, NULL);
|
||||
if (ret)
|
||||
pr_err("%s:Failed to add main_clk alias to %s :%d\n",
|
||||
__func__, clkname, ret);
|
||||
}
|
||||
|
||||
#if IS_ENABLED(CONFIG_WL12XX)
|
||||
|
||||
static struct wl12xx_platform_data wl12xx __initdata;
|
||||
|
|
@ -92,6 +80,12 @@ static void __init hsmmc2_internal_input_clk(void)
|
|||
omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1);
|
||||
}
|
||||
|
||||
static struct iommu_platform_data omap3_iommu_pdata = {
|
||||
.reset_name = "mmu",
|
||||
.assert_reset = omap_device_assert_hardreset,
|
||||
.deassert_reset = omap_device_deassert_hardreset,
|
||||
};
|
||||
|
||||
static int omap3_sbc_t3730_twl_callback(struct device *dev,
|
||||
unsigned gpio,
|
||||
unsigned ngpio)
|
||||
|
|
@ -99,7 +93,7 @@ static int omap3_sbc_t3730_twl_callback(struct device *dev,
|
|||
int res;
|
||||
|
||||
res = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH,
|
||||
"wlan rst");
|
||||
"wlan pwr");
|
||||
if (res)
|
||||
return res;
|
||||
|
||||
|
|
@ -108,6 +102,23 @@ static int omap3_sbc_t3730_twl_callback(struct device *dev,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void __init omap3_sbc_t3x_usb_hub_init(int gpio, char *hub_name)
|
||||
{
|
||||
int err = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW, hub_name);
|
||||
|
||||
if (err) {
|
||||
pr_err("SBC-T3x: %s reset gpio request failed: %d\n",
|
||||
hub_name, err);
|
||||
return;
|
||||
}
|
||||
|
||||
gpio_export(gpio, 0);
|
||||
|
||||
udelay(10);
|
||||
gpio_set_value(gpio, 1);
|
||||
msleep(1);
|
||||
}
|
||||
|
||||
static void __init omap3_sbc_t3730_twl_init(void)
|
||||
{
|
||||
twl_gpio_auxdata.setup = omap3_sbc_t3730_twl_callback;
|
||||
|
|
@ -115,10 +126,17 @@ static void __init omap3_sbc_t3730_twl_init(void)
|
|||
|
||||
static void __init omap3_sbc_t3730_legacy_init(void)
|
||||
{
|
||||
omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
|
||||
legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 136);
|
||||
omap_ads7846_init(1, 57, 0, NULL);
|
||||
}
|
||||
|
||||
static void __init omap3_sbc_t3530_legacy_init(void)
|
||||
{
|
||||
omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
|
||||
omap_ads7846_init(1, 57, 0, NULL);
|
||||
}
|
||||
|
||||
static void __init omap3_igep0020_legacy_init(void)
|
||||
{
|
||||
omap3_igep2_display_init_of();
|
||||
|
|
@ -160,7 +178,7 @@ static struct emac_platform_data am35xx_emac_pdata = {
|
|||
.interrupt_disable = am35xx_disable_emac_int,
|
||||
};
|
||||
|
||||
static void __init am3517_evm_legacy_init(void)
|
||||
static void __init am35xx_emac_reset(void)
|
||||
{
|
||||
u32 v;
|
||||
|
||||
|
|
@ -169,6 +187,43 @@ static void __init am3517_evm_legacy_init(void)
|
|||
omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
|
||||
omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
|
||||
}
|
||||
|
||||
static struct gpio cm_t3517_wlan_gpios[] __initdata = {
|
||||
{ 56, GPIOF_OUT_INIT_HIGH, "wlan pwr" },
|
||||
{ 4, GPIOF_OUT_INIT_HIGH, "xcvr noe" },
|
||||
};
|
||||
|
||||
static void __init omap3_sbc_t3517_wifi_init(void)
|
||||
{
|
||||
int err = gpio_request_array(cm_t3517_wlan_gpios,
|
||||
ARRAY_SIZE(cm_t3517_wlan_gpios));
|
||||
if (err) {
|
||||
pr_err("SBC-T3517: wl12xx gpios request failed: %d\n", err);
|
||||
return;
|
||||
}
|
||||
|
||||
gpio_export(cm_t3517_wlan_gpios[0].gpio, 0);
|
||||
gpio_export(cm_t3517_wlan_gpios[1].gpio, 0);
|
||||
|
||||
msleep(100);
|
||||
gpio_set_value(cm_t3517_wlan_gpios[1].gpio, 0);
|
||||
}
|
||||
|
||||
static void __init omap3_sbc_t3517_legacy_init(void)
|
||||
{
|
||||
omap3_sbc_t3x_usb_hub_init(152, "cm-t3517 usb hub");
|
||||
omap3_sbc_t3x_usb_hub_init(98, "sb-t35 usb hub");
|
||||
am35xx_emac_reset();
|
||||
hsmmc2_internal_input_clk();
|
||||
omap3_sbc_t3517_wifi_init();
|
||||
legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 145);
|
||||
omap_ads7846_init(1, 57, 0, NULL);
|
||||
}
|
||||
|
||||
static void __init am3517_evm_legacy_init(void)
|
||||
{
|
||||
am35xx_emac_reset();
|
||||
}
|
||||
#endif /* CONFIG_ARCH_OMAP3 */
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
|
|
@ -182,15 +237,28 @@ static void __init omap4_sdp_legacy_init(void)
|
|||
static void __init omap4_panda_legacy_init(void)
|
||||
{
|
||||
omap4_panda_display_init_of();
|
||||
legacy_init_ehci_clk("auxclk3_ck");
|
||||
legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
|
||||
static struct iommu_platform_data omap4_iommu_pdata = {
|
||||
.reset_name = "mmu_cache",
|
||||
.assert_reset = omap_device_assert_hardreset,
|
||||
.deassert_reset = omap_device_deassert_hardreset,
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SOC_AM33XX
|
||||
static void __init am335x_evmsk_legacy_init(void)
|
||||
{
|
||||
legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 31);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SOC_OMAP5
|
||||
static void __init omap5_uevm_legacy_init(void)
|
||||
{
|
||||
legacy_init_ehci_clk("auxclk1_ck");
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -240,6 +308,8 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
|
|||
#ifdef CONFIG_ARCH_OMAP3
|
||||
OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata),
|
||||
OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002a00, "48002a00.pinmux", &pcs_pdata),
|
||||
OF_DEV_AUXDATA("ti,omap2-iommu", 0x5d000000, "5d000000.mmu",
|
||||
&omap3_iommu_pdata),
|
||||
/* Only on am3517 */
|
||||
OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL),
|
||||
OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0",
|
||||
|
|
@ -248,6 +318,12 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
|
|||
#ifdef CONFIG_ARCH_OMAP4
|
||||
OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a100040, "4a100040.pinmux", &pcs_pdata),
|
||||
OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a31e040, "4a31e040.pinmux", &pcs_pdata),
|
||||
#endif
|
||||
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
|
||||
OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",
|
||||
&omap4_iommu_pdata),
|
||||
OF_DEV_AUXDATA("ti,omap4-iommu", 0x55082000, "55082000.mmu",
|
||||
&omap4_iommu_pdata),
|
||||
#endif
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
|
@ -258,6 +334,8 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
|
|||
*/
|
||||
static struct pdata_init pdata_quirks[] __initdata = {
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
{ "compulab,omap3-sbc-t3517", omap3_sbc_t3517_legacy_init, },
|
||||
{ "compulab,omap3-sbc-t3530", omap3_sbc_t3530_legacy_init, },
|
||||
{ "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, },
|
||||
{ "nokia,omap3-n900", hsmmc2_internal_input_clk, },
|
||||
{ "nokia,omap3-n9", hsmmc2_internal_input_clk, },
|
||||
|
|
@ -271,6 +349,9 @@ static struct pdata_init pdata_quirks[] __initdata = {
|
|||
{ "ti,omap4-sdp", omap4_sdp_legacy_init, },
|
||||
{ "ti,omap4-panda", omap4_panda_legacy_init, },
|
||||
#endif
|
||||
#ifdef CONFIG_SOC_AM33XX
|
||||
{ "ti,am335x-evmsk", am335x_evmsk_legacy_init, },
|
||||
#endif
|
||||
#ifdef CONFIG_SOC_OMAP5
|
||||
{ "ti,omap5-uevm", omap5_uevm_legacy_init, },
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -86,9 +86,6 @@ config OMAP_MUX_WARNINGS
|
|||
to change the pin multiplexing setup. When there are no warnings
|
||||
printed, it's safe to deselect OMAP_MUX for your product.
|
||||
|
||||
config OMAP_IOMMU_IVA2
|
||||
bool
|
||||
|
||||
config OMAP_MPU_TIMER
|
||||
bool "Use mpu timer"
|
||||
depends on ARCH_OMAP1
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@
|
|||
#define MUX_MODE5 5
|
||||
#define MUX_MODE6 6
|
||||
#define MUX_MODE7 7
|
||||
#define MUX_MODE8 8
|
||||
|
||||
#define PULL_DISABLE (1 << 16)
|
||||
#define PULL_UP (1 << 17)
|
||||
|
|
|
|||
Loading…
Reference in New Issue