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powerpc: Rewrite FSL_BOOKE flush_cache_instruction() in C 

Nothing prevents flush_cache_instruction() from being writen in C.

Do it to improve readability and maintainability.

This function is only use by low level callers, it is not
intended to be used by module. Don't export it.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/f989eff8296800c427622c0985384148404e4f0b.1597384512.git.christophe.leroy@csgroup.eu
zero-sugar-mainline-defconfig
Christophe Leroy 2020-08-14 05:56:27 +00:00 committed by Michael Ellerman
parent de39b19452
commit 704dfe931d
2 changed files with 16 additions and 22 deletions
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22
arch/powerpc/kernel/misc_32.S
View File

@ -255,28 +255,6 @@ _ASM_NOKPROBE_SYMBOL(real_writeb)
#endif /* CONFIG_40x */
/*
* Flush instruction cache.
*/
#ifdef CONFIG_FSL_BOOKE
_GLOBAL(flush_instruction_cache)
#ifdef CONFIG_E200
mfspr r3,SPRN_L1CSR0
ori r3,r3,L1CSR0_CFI|L1CSR0_CLFC
/* msync; isync recommended here */
mtspr SPRN_L1CSR0,r3
isync
blr
#endif
mfspr r3,SPRN_L1CSR1
ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
mtspr SPRN_L1CSR1,r3
isync
blr
EXPORT_SYMBOL(flush_instruction_cache)
#endif
/*
* Copy a whole page. We use the dcbz instruction on the destination
* to reduce memory traffic (it eliminates the unnecessary reads of

16
arch/powerpc/mm/nohash/fsl_booke.c
View File

@ -219,6 +219,22 @@ unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)
return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
}
void flush_instruction_cache(void)
{
unsigned long tmp;
if (IS_ENABLED(CONFIG_E200)) {
tmp = mfspr(SPRN_L1CSR0);
tmp |= L1CSR0_CFI | L1CSR0_CLFC;
mtspr(SPRN_L1CSR0, tmp);
} else {
tmp = mfspr(SPRN_L1CSR1);
tmp |= L1CSR1_ICFI | L1CSR1_ICLFR;
mtspr(SPRN_L1CSR1, tmp);
}
isync();
}
/*
* MMU_init_hw does the chip-specific initialization of the MMU hardware.
*/