diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index bf042aff1d21..f531b08b2a0e 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -599,6 +599,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \ imx7d-pico-pi.dtb \ imx7d-sbc-imx7.dtb \ imx7d-sdb.dtb \ + imx7d-sdb-m4.dtb \ imx7d-sdb-reva.dtb \ imx7d-sdb-sht11.dtb \ imx7d-zii-rmu2.dtb \ diff --git a/arch/arm/boot/dts/imx7d-sdb-m4.dts b/arch/arm/boot/dts/imx7d-sdb-m4.dts new file mode 100644 index 000000000000..7aa803559ef5 --- /dev/null +++ b/arch/arm/boot/dts/imx7d-sdb-m4.dts @@ -0,0 +1,9 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include "imx7d-sdb.dts" +#include "imx7d-sdb-m4.dtsi" diff --git a/arch/arm/boot/dts/imx7d-sdb-m4.dtsi b/arch/arm/boot/dts/imx7d-sdb-m4.dtsi new file mode 100644 index 000000000000..deba9ef75646 --- /dev/null +++ b/arch/arm/boot/dts/imx7d-sdb-m4.dtsi @@ -0,0 +1,68 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/ { + memory { + linux,usable-memory = <0x80000000 0x1ff00000>, + <0xa0000000 0x1ff00000>; + }; + m4_tcm: tcml@007f8000 { + compatible = "fsl, m4_tcml"; + reg = <0x007f8000 0x8000>; + }; +}; + +&adc1 { + status = "disabled"; +}; + +&adc2 { + status = "disabled"; +}; + +&flexcan1 { + status = "disabled"; +}; + +&flexcan2 { + status = "disabled"; +}; + +&i2c2 { + status = "disabled"; +}; + +&gpt3 { + status = "disabled"; +}; + +&gpt4 { + status = "disabled"; +}; + +&ocram { + reg = <0x00901000 0xf000>; +}; + +®_can2_3v3 { + status = "disabled"; +}; + +&rpmsg{ + vdev-nums = <1>; + reg = <0xbfff0000 0x10000>; + status = "okay"; +}; + +&uart2 { + status = "disabled"; +}; + +&wdog3{ + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts index eacbd7a1af4c..9bb3ede9bbab 100644 --- a/arch/arm/boot/dts/imx7d-sdb.dts +++ b/arch/arm/boot/dts/imx7d-sdb.dts @@ -405,7 +405,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; - assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index 103c161c95fe..32b81517b928 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -22,7 +22,6 @@ reg = <1>; clock-frequency = <996000000>; operating-points-v2 = <&cpu0_opp_table>; - cpu-idle-states = <&cpu_sleep_wait>; }; }; @@ -77,9 +76,10 @@ <&clks IMX7D_DRAM_ROOT_SRC>, <&clks IMX7D_DRAM_ALT_ROOT_SRC>, <&clks IMX7D_PLL_DRAM_MAIN_CLK>, <&clks IMX7D_DRAM_ALT_ROOT_CLK>, <&clks IMX7D_PLL_SYS_PFD2_270M_CLK>, <&clks IMX7D_PLL_SYS_PFD1_332M_CLK>, - <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>, <&clks IMX7D_MAIN_AXI_ROOT_DIV>; - clock-names = "osc", "axi_sel", "ahb_sel", "pfd0_392m", "dram_root", "dram_alt_sel", - "pll_dram", "dram_alt_root", "pfd2_270m", "pfd1_332m", "ahb", "axi"; + <&clks IMX7D_AHB_CHANNEL_ROOT_DIV>, <&clks IMX7D_MAIN_AXI_ROOT_DIV>; + clock-names = "osc", "axi_sel", "ahb_sel", "pfd0_392m", "dram_root", + "dram_alt_sel", "pll_dram", "dram_alt_root", "pfd2_270m", + "pfd1_332m", "ahb", "axi"; interrupts = <0 112 0x04>, <0 113 0x04>; interrupt-names = "irq_busfreq_0", "irq_busfreq_1"; }; @@ -90,6 +90,12 @@ clocks = <&clks IMX7D_OCRAM_CLK>; }; + ocram: sram@901000 { + compatible = "mmio-sram"; + reg = <0x00901000 0x1f000>; + clocks = <&clks IMX7D_OCRAM_CLK>; + }; + ocrams: sram@00180000 { compatible = "fsl,lpm-sram"; reg = <0x00180000 0x8000>; @@ -97,6 +103,12 @@ status = "disabled"; }; + ocrams_mf: sram-mf@00900000 { + compatible = "fsl,mega-fast-sram"; + reg = <0x00900000 0x20000>; + clocks = <&clks IMX7D_OCRAM_CLK>; + }; + etm@3007d000 { compatible = "arm,coresight-etm3x", "arm,primecell"; reg = <0x3007d000 0x1000>; @@ -140,9 +152,52 @@ reg = <0x306d0000 0x10000>; status = "disabled"; }; + + system_counter_rd: system-counter-rd@306a0000 { + compatible = "fsl,imx7d-system-counter-rd"; + reg = <0x306a0000 0x10000>; + status = "disabled"; + }; + + system_counter_cmp: system-counter-cmp@306b0000 { + compatible = "fsl,imx7d-system-counter-cmp"; + reg = <0x306b0000 0x10000>; + status = "disabled"; + }; + + system_counter_ctrl: system-counter-ctrl@306c0000 { + compatible = "fsl,imx7d-system-counter-ctrl"; + reg = <0x306c0000 0x10000>; + interrupts = , + ; + status = "disabled"; + }; }; &aips3 { + mu: mu@30aa0000 { + compatible = "fsl,imx7d-mu", "fsl,imx6sx-mu"; + reg = <0x30aa0000 0x10000>; + interrupts = ; + clocks = <&clks IMX7D_MU_ROOT_CLK>; + clock-names = "mu"; + status = "okay"; + }; + + rpmsg: rpmsg{ + compatible = "fsl,imx7d-rpmsg"; + status = "disabled"; + }; + + sema4: sema4@30ac0000 { + compatible = "fsl,imx7d-sema4"; + reg = <0x30ac0000 0x10000>; + interrupts = ; + clocks = <&clks IMX7D_SEMA4_HS_ROOT_CLK>; + clock-names = "sema4"; + status = "okay"; + }; + usbotg2: usb@30b20000 { compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; reg = <0x30b20000 0x200>; diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index b4ac51062f77..50abcc811146 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -53,19 +53,6 @@ #address-cells = <1>; #size-cells = <0>; - idle-states { - entry-method = "psci"; - - cpu_sleep_wait: cpu-sleep-wait { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - local-timer-stop; - entry-latency-us = <100>; - exit-latency-us = <50>; - min-residency-us = <1000>; - }; - }; - cpu0: cpu@0 { compatible = "arm,cortex-a7"; device_type = "cpu"; @@ -73,7 +60,6 @@ clock-frequency = <792000000>; clock-latency = <61036>; /* two CLK32 periods */ clocks = <&clks IMX7D_CLK_ARM>; - cpu-idle-states = <&cpu_sleep_wait>; }; }; @@ -158,15 +144,6 @@ clocks = <&clks IMX7D_PLL_SYS_MAIN_CLK>; }; - timer { - compatible = "arm,armv7-timer"; - interrupt-parent = <&intc>; - interrupts = , - , - , - ; - }; - soc { #address-cells = <1>; #size-cells = <1>; @@ -316,6 +293,17 @@ <0x31006000 0x2000>; }; + timer { + compatible = "arm,armv7-timer"; + arm,cpu-registers-not-fw-configured; + interrupt-parent = <&intc>; + interrupts = , + , + , + ; + clock-frequency = <8000000>; + }; + aips1: aips-bus@30000000 { compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; @@ -628,7 +616,7 @@ }; src: src@30390000 { - compatible = "fsl,imx7d-src", "syscon"; + compatible = "fsl,imx7d-src", "fsl,imx51-src", "syscon"; reg = <0x30390000 0x10000>; interrupts = ; #reset-cells = <1>; @@ -641,6 +629,7 @@ interrupts = ; #interrupt-cells = <3>; interrupt-parent = <&intc>; + fsl,mf-mix-wakeup-irq = <0x54010000 0xc00 0x0 0x1040640>; #power-domain-cells = <1>; pgc {