drm/nve0/grctx: initial attempt at unhardcoding yet more magic
Not sure about the (gpc_nr == 1) condition, it's probably wrong but for all the examples I've seen so far it matches what NVIDIA end up poking. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
ba366c25bc
commit
7092a8dd5c
|
@ -2772,10 +2772,15 @@ nve0_grctx_generate(struct nvc0_graph_priv *priv)
|
|||
for (i = 0; i < 8; i++)
|
||||
nv_wr32(priv, 0x4064d0 + (i * 0x04), 0x00000000);
|
||||
|
||||
nv_wr32(priv, 0x405b00, 0x201);
|
||||
nv_wr32(priv, 0x408850, 0x2);
|
||||
nv_wr32(priv, 0x408958, 0x2);
|
||||
nv_wr32(priv, 0x419f78, 0xa);
|
||||
nv_wr32(priv, 0x405b00, (priv->tpc_total << 8) | priv->gpc_nr);
|
||||
if (priv->gpc_nr == 1) {
|
||||
nv_mask(priv, 0x408850, 0x0000000f, priv->tpc_nr[0]);
|
||||
nv_mask(priv, 0x408958, 0x0000000f, priv->tpc_nr[0]);
|
||||
} else {
|
||||
nv_mask(priv, 0x408850, 0x0000000f, priv->gpc_nr);
|
||||
nv_mask(priv, 0x408958, 0x0000000f, priv->gpc_nr);
|
||||
}
|
||||
nv_mask(priv, 0x419f78, 0x00000001, 0x00000000);
|
||||
|
||||
nve0_grctx_generate_icmd(priv);
|
||||
nve0_grctx_generate_a097(priv);
|
||||
|
|
Loading…
Reference in a new issue