[POWERPC] Split out iSeries specific exception macros
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Stephen Rothwell
Paul Mackerras
parent
dc8f571a26
commit
7180e3e636
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@ -30,9 +30,10 @@
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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#include <asm/ptrace.h>
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#include <asm/exception.h>
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#include <asm/cputable.h>
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#include "exception.h"
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.text
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.globl system_reset_iSeries
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@ -104,15 +105,15 @@ BEGIN_FTR_SECTION
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mtcrf 0x80,r12
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mfspr r12,SPRN_SPRG2
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END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
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EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN)
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EXCEPTION_PROLOG_ISERIES_2
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EXCEPTION_PROLOG_1(PACA_EXGEN)
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EXCEPTION_PROLOG_ISERIES_1
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b data_access_common
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.do_stab_bolted_iSeries:
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mtcrf 0x80,r12
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mfspr r12,SPRN_SPRG2
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EXCEPTION_PROLOG_ISERIES_1(PACA_EXSLB)
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EXCEPTION_PROLOG_ISERIES_2
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EXCEPTION_PROLOG_1(PACA_EXSLB)
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EXCEPTION_PROLOG_ISERIES_1
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b .do_stab_bolted
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.globl data_access_slb_iSeries
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@ -171,7 +172,7 @@ slb_miss_user_iseries:
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std r10,PACA_EXGEN+EX_R13(r13)
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std r11,PACA_EXGEN+EX_R9(r13)
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std r12,PACA_EXGEN+EX_R3(r13)
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EXCEPTION_PROLOG_ISERIES_2
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EXCEPTION_PROLOG_ISERIES_1
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b slb_miss_user_common
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#endif
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@ -187,7 +188,7 @@ slb_miss_user_iseries:
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system_call_iSeries:
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mr r9,r13
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mfspr r13,SPRN_SPRG3
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EXCEPTION_PROLOG_ISERIES_2
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EXCEPTION_PROLOG_ISERIES_1
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b system_call_common
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STD_EXCEPTION_ISERIES( 0xd00, single_step, PACA_EXGEN)
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58
arch/powerpc/platforms/iseries/exception.h
Normal file
58
arch/powerpc/platforms/iseries/exception.h
Normal file
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@ -0,0 +1,58 @@
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#ifndef _ASM_POWERPC_ISERIES_EXCEPTION_H
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#define _ASM_POWERPC_ISERIES_EXCEPTION_H
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/*
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* Extracted from head_64.S
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*
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* PowerPC version
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
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* Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
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* Adapted for Power Macintosh by Paul Mackerras.
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* Low-level exception handlers and MMU support
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* rewritten by Paul Mackerras.
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* Copyright (C) 1996 Paul Mackerras.
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*
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* Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
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* Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
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*
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* This file contains the low-level support and setup for the
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* PowerPC-64 platform, including trap and interrupt dispatch.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/exception.h>
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#define EXCEPTION_PROLOG_ISERIES_1 \
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mfmsr r10; \
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ld r12,PACALPPACAPTR(r13); \
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ld r11,LPPACASRR0(r12); \
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ld r12,LPPACASRR1(r12); \
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ori r10,r10,MSR_RI; \
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mtmsrd r10,1
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#define STD_EXCEPTION_ISERIES(n, label, area) \
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.globl label##_iSeries; \
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label##_iSeries: \
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HMT_MEDIUM; \
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mtspr SPRN_SPRG1,r13; /* save r13 */ \
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EXCEPTION_PROLOG_1(area); \
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EXCEPTION_PROLOG_ISERIES_1; \
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b label##_common
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#define MASKABLE_EXCEPTION_ISERIES(n, label) \
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.globl label##_iSeries; \
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label##_iSeries: \
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HMT_MEDIUM; \
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mtspr SPRN_SPRG1,r13; /* save r13 */ \
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EXCEPTION_PROLOG_1(PACA_EXGEN); \
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lbz r10,PACASOFTIRQEN(r13); \
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cmpwi 0,r10,0; \
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beq- label##_iSeries_masked; \
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EXCEPTION_PROLOG_ISERIES_1; \
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b label##_common; \
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#endif /* _ASM_POWERPC_ISERIES_EXCEPTION_H */
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@ -62,6 +62,16 @@
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ori reg,reg,(label)@l; /* virt addr of handler ... */
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#endif
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#define EXCEPTION_PROLOG_1(area) \
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mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \
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std r9,area+EX_R9(r13); /* save r9 - r12 */ \
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std r10,area+EX_R10(r13); \
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std r11,area+EX_R11(r13); \
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std r12,area+EX_R12(r13); \
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mfspr r9,SPRN_SPRG1; \
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std r9,area+EX_R13(r13); \
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mfcr r9
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/*
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* Equal to EXCEPTION_PROLOG_PSERIES, except that it forces 64bit mode.
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* The firmware calls the registered system_reset_fwnmi and
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@ -70,14 +80,7 @@
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* This firmware bug is present on POWER4 and JS20.
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*/
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#define EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(area, label) \
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mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \
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std r9,area+EX_R9(r13); /* save r9 - r12 */ \
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std r10,area+EX_R10(r13); \
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std r11,area+EX_R11(r13); \
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std r12,area+EX_R12(r13); \
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mfspr r9,SPRN_SPRG1; \
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std r9,area+EX_R13(r13); \
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mfcr r9; \
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EXCEPTION_PROLOG_1(area); \
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clrrdi r12,r13,32; /* get high part of &label */ \
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mfmsr r10; \
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/* force 64bit mode */ \
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@ -94,14 +97,7 @@
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b . /* prevent speculative execution */
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#define EXCEPTION_PROLOG_PSERIES(area, label) \
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mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \
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std r9,area+EX_R9(r13); /* save r9 - r12 */ \
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std r10,area+EX_R10(r13); \
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std r11,area+EX_R11(r13); \
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std r12,area+EX_R12(r13); \
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mfspr r9,SPRN_SPRG1; \
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std r9,area+EX_R13(r13); \
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mfcr r9; \
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EXCEPTION_PROLOG_1(area); \
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clrrdi r12,r13,32; /* get high part of &label */ \
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mfmsr r10; \
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mfspr r11,SPRN_SRR0; /* save SRR0 */ \
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@ -113,28 +109,6 @@
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rfid; \
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b . /* prevent speculative execution */
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/*
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* This is the start of the interrupt handlers for iSeries
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* This code runs with relocation on.
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*/
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#define EXCEPTION_PROLOG_ISERIES_1(area) \
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mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \
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std r9,area+EX_R9(r13); /* save r9 - r12 */ \
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std r10,area+EX_R10(r13); \
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std r11,area+EX_R11(r13); \
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std r12,area+EX_R12(r13); \
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mfspr r9,SPRN_SPRG1; \
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std r9,area+EX_R13(r13); \
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mfcr r9
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#define EXCEPTION_PROLOG_ISERIES_2 \
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mfmsr r10; \
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ld r12,PACALPPACAPTR(r13); \
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ld r11,LPPACASRR0(r12); \
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ld r12,LPPACASRR1(r12); \
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ori r10,r10,MSR_RI; \
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mtmsrd r10,1
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/*
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* The common exception prolog is used for all except a few exceptions
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* such as a segment miss on a kernel address. We have to be prepared
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@ -247,27 +221,6 @@ label##_pSeries: \
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rfid; \
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b . /* prevent speculative execution */
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#define STD_EXCEPTION_ISERIES(n, label, area) \
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.globl label##_iSeries; \
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label##_iSeries: \
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HMT_MEDIUM; \
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mtspr SPRN_SPRG1,r13; /* save r13 */ \
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EXCEPTION_PROLOG_ISERIES_1(area); \
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EXCEPTION_PROLOG_ISERIES_2; \
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b label##_common
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#define MASKABLE_EXCEPTION_ISERIES(n, label) \
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.globl label##_iSeries; \
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label##_iSeries: \
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HMT_MEDIUM; \
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mtspr SPRN_SPRG1,r13; /* save r13 */ \
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EXCEPTION_PROLOG_ISERIES_1(PACA_EXGEN); \
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lbz r10,PACASOFTIRQEN(r13); \
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cmpwi 0,r10,0; \
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beq- label##_iSeries_masked; \
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EXCEPTION_PROLOG_ISERIES_2; \
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b label##_common; \
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#ifdef CONFIG_PPC_ISERIES
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#define DISABLE_INTS \
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li r11,0; \
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