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mmc: tmio: remove TMIO_MMC_HAVE_HIGH_REG flag 

TMIO_MMC_HAVE_HIGH_REG is confusing due to its counter-intuitive name.

All the TMIO MMC variants (TMIO MMC, Renesas SDHI, UniPhier SD) actually
have high registers. It is just that each of them implements its own
registers there. The original IP from Panasonic only defines registers
0x00-0xff in the bus_shift=1 review. The register area above them is
platform-dependent.

In fact, TMIO_MMC_HAVE_HIGH_REG is set only by tmio-mmc.c and used to
test the accessibility of CTL_SDIO_REGS. Because it is specific to
the TMIO MFD variant, the right thing to do is to move such registers
to tmio_mmc.c and delete the TMIO_MMC_HAVE_HIGH_REG flag.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
hifive-unleashed-5.1
Masahiro Yamada 2018-10-10 12:51:32 +09:00 committed by Ulf Hansson
parent acb9fce730
commit 722fb61e2e
3 changed files with 5 additions and 12 deletions
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7
drivers/mmc/host/tmio_mmc.c
View File

@ -21,6 +21,11 @@
#include "tmio_mmc.h"
/* Registers specific to this variant */
#define CTL_SDIO_REGS 0x100
#define CTL_CLK_AND_WAIT_CTL 0x138
#define CTL_RESET_SDIO 0x1e0
static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
{
sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
@ -153,8 +158,6 @@ static int tmio_mmc_probe(struct platform_device *pdev)
goto cell_disable;
}
pdata->flags |= TMIO_MMC_HAVE_HIGH_REG;
host = tmio_mmc_host_alloc(pdev, pdata);
if (IS_ERR(host)) {
ret = PTR_ERR(host);

3
drivers/mmc/host/tmio_mmc.h
View File

@ -43,9 +43,6 @@
#define CTL_RESET_SD 0xe0
#define CTL_VERSION 0xe2
#define CTL_SDIF_MODE 0xe6
#define CTL_SDIO_REGS 0x100
#define CTL_CLK_AND_WAIT_CTL 0x138
#define CTL_RESET_SDIO 0x1e0
/* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */
#define TMIO_STOP_STP BIT(0)

7
include/linux/mfd/tmio.h
View File

@ -61,13 +61,6 @@
*/
#define TMIO_MMC_USE_GPIO_CD BIT(5)
/*
* Some controllers doesn't have over 0x100 register.
* it is used to checking accessibility of
* CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL
*/
#define TMIO_MMC_HAVE_HIGH_REG BIT(6)
/*
* Some controllers have CMD12 automatically
* issue/non-issue register