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arm:dts:imx: dropping leading 0s on ocram nodes 

removing all the leading "0x" and zeros to fix the
following dtc warnings:

Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s

Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
5.4-rM2-2.2.x-imx-squashed
Silvano di Ninno 2019-11-06 16:56:48 +01:00 committed by Dong Aisheng
parent c6aa28920d
commit 724a66a1fc
6 changed files with 46 additions and 46 deletions
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10
arch/arm/boot/dts/imx6q.dtsi
View File

@ -170,16 +170,16 @@
fsl,max_ddr_freq = <528000000>;
};
ocram: sram@00905000 {
ocram: sram@905000 {
compatible = "mmio-sram";
reg = <0x00905000 0x3B000>;
reg = <0x905000 0x3B000>;
clocks = <&clks IMX6QDL_CLK_OCRAM>;
};
ocram_optee: sram@00938000 {
ocram_optee: sram@938000 {
compatible = "fsl,optee-lpm-sram";
reg = <0x00938000 0x8000>;
overw_reg = <&ocram 0x00905000 0x33000>;
reg = <0x938000 0x8000>;
overw_reg = <&ocram 0x905000 0x33000>;
};
aips-bus@2000000 { /* AIPS1 */

18
arch/arm/boot/dts/imx6sl.dtsi
View File

@ -145,28 +145,28 @@
fsl,max_ddr_freq = <400000000>;
};
ocrams: sram@00900000 {
ocrams: sram@900000 {
compatible = "fsl,lpm-sram";
reg = <0x00900000 0x4000>;
reg = <0x900000 0x4000>;
clocks = <&clks IMX6SL_CLK_OCRAM>;
};
ocrams_ddr: sram@00904000 {
ocrams_ddr: sram@904000 {
compatible = "fsl,ddr-lpm-sram";
reg = <0x00904000 0x1000>;
reg = <0x904000 0x1000>;
clocks = <&clks IMX6SL_CLK_OCRAM>;
};
ocram: sram@00905000 {
ocram: sram@905000 {
compatible = "mmio-sram";
reg = <0x00905000 0x1B000>;
reg = <0x905000 0x1B000>;
clocks = <&clks IMX6SL_CLK_OCRAM>;
};
ocram_optee: sram@00918000 {
ocram_optee: sram@918000 {
compatible = "fsl,optee-lpm-sram";
reg = <0x00918000 0x8000>;
overw_reg = <&ocram 0x00905000 0x13000>;
reg = <0x918000 0x8000>;
overw_reg = <&ocram 0x905000 0x13000>;
};
intc: interrupt-controller@a01000 {

18
arch/arm/boot/dts/imx6sll.dtsi
View File

@ -145,25 +145,25 @@
fsl,max_ddr_freq = <400000000>;
};
ocrams: sram@00900000 {
ocrams: sram@900000 {
compatible = "fsl,lpm-sram";
reg = <0x00900000 0x4000>;
reg = <0x900000 0x4000>;
};
ocrams_ddr: sram@00904000 {
ocrams_ddr: sram@904000 {
compatible = "fsl,ddr-lpm-sram";
reg = <0x00904000 0x1000>;
reg = <0x904000 0x1000>;
};
ocram: sram@00905000 {
ocram: sram@905000 {
compatible = "mmio-sram";
reg = <0x00905000 0x1B000>;
reg = <0x905000 0x1B000>;
};
ocram_optee: sram@00918000 {
ocram_optee: sram@918000 {
compatible = "fsl,optee-lpm-sram";
reg = <0x00918000 0x8000>;
overw_reg = <&ocram 0x00905000 0x13000>;
reg = <0x918000 0x8000>;
overw_reg = <&ocram 0x905000 0x13000>;
};
intc: interrupt-controller@a01000 {

16
arch/arm/boot/dts/imx6sx.dtsi
View File

@ -186,27 +186,27 @@
fsl,max_ddr_freq = <400000000>;
};
ocrams: sram@008f8000 {
ocrams: sram@8f8000 {
compatible = "fsl,lpm-sram";
reg = <0x008f8000 0x4000>;
reg = <0x8f8000 0x4000>;
clocks = <&clks IMX6SX_CLK_OCRAM_S>;
};
ocrams_ddr: sram@00900000 {
ocrams_ddr: sram@900000 {
compatible = "fsl,ddr-lpm-sram";
reg = <0x00900000 0x1000>;
reg = <0x900000 0x1000>;
clocks = <&clks IMX6SX_CLK_OCRAM>;
};
ocram: sram@00901000 {
ocram: sram@901000 {
compatible = "mmio-sram";
reg = <0x00901000 0x1F000>;
reg = <0x901000 0x1F000>;
clocks = <&clks IMX6SX_CLK_OCRAM>;
};
ocram_mf: sram-mf@00900000 {
ocram_mf: sram-mf@900000 {
compatible = "fsl,mega-fast-sram";
reg = <0x00900000 0x20000>;
reg = <0x900000 0x20000>;
clocks = <&clks IMX6SX_CLK_OCRAM>;
};

16
arch/arm/boot/dts/imx6ul.dtsi
View File

@ -177,25 +177,25 @@
fsl,max_ddr_freq = <400000000>;
};
ocrams: sram@00900000 {
ocrams: sram@900000 {
compatible = "fsl,lpm-sram";
reg = <0x00900000 0x4000>;
reg = <0x900000 0x4000>;
};
ocrams_ddr: sram@00904000 {
ocrams_ddr: sram@904000 {
compatible = "fsl,ddr-lpm-sram";
reg = <0x00904000 0x1000>;
reg = <0x904000 0x1000>;
};
ocram: sram@00905000 {
ocram: sram@905000 {
compatible = "mmio-sram";
reg = <0x00905000 0x1B000>;
};
ocram_optee: sram@00918000 {
ocram_optee: sram@918000 {
compatible = "fsl,optee-lpm-sram";
reg = <0x00918000 0x8000>;
overw_reg = <&ocram 0x00905000 0x13000>;
reg = <0x918000 0x8000>;
overw_reg = <&ocram 0x905000 0x13000>;
};
intc: interrupt-controller@a01000 {

14
arch/arm/boot/dts/imx7d.dtsi
View File

@ -84,21 +84,21 @@
interrupt-names = "irq_busfreq_0", "irq_busfreq_1";
};
ocrams_ddr: sram@00900000 {
ocrams_ddr: sram@900000 {
compatible = "fsl,ddr-lpm-sram";
reg = <0x00900000 0x1000>;
reg = <0x900000 0x1000>;
clocks = <&clks IMX7D_OCRAM_CLK>;
};
ocram: sram@901000 {
compatible = "mmio-sram";
reg = <0x00901000 0x1f000>;
reg = <0x901000 0x1f000>;
clocks = <&clks IMX7D_OCRAM_CLK>;
};
ocrams: sram@00180000 {
ocrams: sram@180000 {
compatible = "fsl,lpm-sram";
reg = <0x00180000 0x8000>;
reg = <0x180000 0x8000>;
clocks = <&clks IMX7D_OCRAM_S_CLK>;
status = "disabled";
};
@ -112,9 +112,9 @@
overw_clock = <&ocrams &clks IMX7D_OCRAM_CLK>;
};
ocrams_mf: sram-mf@00900000 {
ocrams_mf: sram-mf@900000 {
compatible = "fsl,mega-fast-sram";
reg = <0x00900000 0x20000>;
reg = <0x900000 0x20000>;
clocks = <&clks IMX7D_OCRAM_CLK>;
};