Merge branch 'spi-5.5' into spi-linus
This commit is contained in:
commit
7265e8fc51
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@ -297,6 +297,9 @@ static int dw_spi_transfer_one(struct spi_controller *master,
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dws->len = transfer->len;
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spin_unlock_irqrestore(&dws->buf_lock, flags);
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/* Ensure dw->rx and dw->rx_end are visible */
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smp_mb();
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spi_enable_chip(dws, 0);
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/* Handle per transfer options for bpw and speed */
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@ -410,7 +410,7 @@ static bool fsl_qspi_supports_op(struct spi_mem *mem,
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op->data.nbytes > q->devtype_data->txfifo)
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return false;
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return true;
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return spi_mem_default_supports_op(mem, op);
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}
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static void fsl_qspi_prepare_lut(struct fsl_qspi *q,
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@ -195,6 +195,7 @@ static void npcm_pspi_setup_transfer(struct spi_device *spi,
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static void npcm_pspi_send(struct npcm_pspi *priv)
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{
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int wsize;
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u16 val;
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wsize = min(bytes_per_word(priv->bits_per_word), priv->tx_bytes);
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priv->tx_bytes -= wsize;
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@ -204,17 +205,18 @@ static void npcm_pspi_send(struct npcm_pspi *priv)
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switch (wsize) {
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case 1:
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iowrite8(*priv->tx_buf, NPCM_PSPI_DATA + priv->base);
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val = *priv->tx_buf++;
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iowrite8(val, NPCM_PSPI_DATA + priv->base);
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break;
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case 2:
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iowrite16(*priv->tx_buf, NPCM_PSPI_DATA + priv->base);
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val = *priv->tx_buf++;
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val = *priv->tx_buf++ | (val << 8);
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iowrite16(val, NPCM_PSPI_DATA + priv->base);
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break;
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default:
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WARN_ON_ONCE(1);
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return;
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}
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priv->tx_buf += wsize;
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}
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static void npcm_pspi_recv(struct npcm_pspi *priv)
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@ -230,18 +232,17 @@ static void npcm_pspi_recv(struct npcm_pspi *priv)
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switch (rsize) {
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case 1:
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val = ioread8(priv->base + NPCM_PSPI_DATA);
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*priv->rx_buf++ = ioread8(priv->base + NPCM_PSPI_DATA);
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break;
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case 2:
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val = ioread16(priv->base + NPCM_PSPI_DATA);
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*priv->rx_buf++ = (val >> 8);
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*priv->rx_buf++ = val & 0xff;
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break;
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default:
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WARN_ON_ONCE(1);
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return;
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}
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*priv->rx_buf = val;
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priv->rx_buf += rsize;
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}
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static int npcm_pspi_transfer_one(struct spi_master *master,
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@ -461,6 +461,16 @@ int pxa2xx_spi_flush(struct driver_data *drv_data)
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return limit;
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}
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static void pxa2xx_spi_off(struct driver_data *drv_data)
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{
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/* On MMP, disabling SSE seems to corrupt the rx fifo */
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if (drv_data->ssp_type == MMP2_SSP)
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return;
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pxa2xx_spi_write(drv_data, SSCR0,
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pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);
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}
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static int null_writer(struct driver_data *drv_data)
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{
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u8 n_bytes = drv_data->n_bytes;
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@ -587,8 +597,7 @@ static void int_error_stop(struct driver_data *drv_data, const char* msg)
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if (!pxa25x_ssp_comp(drv_data))
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pxa2xx_spi_write(drv_data, SSTO, 0);
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pxa2xx_spi_flush(drv_data);
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pxa2xx_spi_write(drv_data, SSCR0,
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pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);
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pxa2xx_spi_off(drv_data);
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dev_err(&drv_data->pdev->dev, "%s\n", msg);
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@ -686,8 +695,7 @@ static irqreturn_t interrupt_transfer(struct driver_data *drv_data)
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static void handle_bad_msg(struct driver_data *drv_data)
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{
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pxa2xx_spi_write(drv_data, SSCR0,
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pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);
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pxa2xx_spi_off(drv_data);
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pxa2xx_spi_write(drv_data, SSCR1,
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pxa2xx_spi_read(drv_data, SSCR1) & ~drv_data->int_cr1);
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if (!pxa25x_ssp_comp(drv_data))
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@ -1062,7 +1070,8 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
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|| (pxa2xx_spi_read(drv_data, SSCR1) & change_mask)
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!= (cr1 & change_mask)) {
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/* stop the SSP, and update the other bits */
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pxa2xx_spi_write(drv_data, SSCR0, cr0 & ~SSCR0_SSE);
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if (drv_data->ssp_type != MMP2_SSP)
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pxa2xx_spi_write(drv_data, SSCR0, cr0 & ~SSCR0_SSE);
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if (!pxa25x_ssp_comp(drv_data))
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pxa2xx_spi_write(drv_data, SSTO, chip->timeout);
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/* first set CR1 without interrupt and service enables */
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@ -1118,8 +1127,7 @@ static int pxa2xx_spi_slave_abort(struct spi_controller *controller)
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if (!pxa25x_ssp_comp(drv_data))
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pxa2xx_spi_write(drv_data, SSTO, 0);
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pxa2xx_spi_flush(drv_data);
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pxa2xx_spi_write(drv_data, SSCR0,
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pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);
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pxa2xx_spi_off(drv_data);
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dev_dbg(&drv_data->pdev->dev, "transfer aborted\n");
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@ -1135,8 +1143,7 @@ static void pxa2xx_spi_handle_err(struct spi_controller *controller,
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struct driver_data *drv_data = spi_controller_get_devdata(controller);
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/* Disable the SSP */
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pxa2xx_spi_write(drv_data, SSCR0,
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pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);
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pxa2xx_spi_off(drv_data);
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/* Clear and disable interrupts and service requests */
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write_SSSR_CS(drv_data, drv_data->clear_sr);
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pxa2xx_spi_write(drv_data, SSCR1,
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@ -1161,8 +1168,7 @@ static int pxa2xx_spi_unprepare_transfer(struct spi_controller *controller)
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struct driver_data *drv_data = spi_controller_get_devdata(controller);
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/* Disable the SSP now */
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pxa2xx_spi_write(drv_data, SSCR0,
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pxa2xx_spi_read(drv_data, SSCR0) & ~SSCR0_SSE);
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pxa2xx_spi_off(drv_data);
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return 0;
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}
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@ -1423,6 +1429,9 @@ static const struct pci_device_id pxa2xx_spi_pci_compound_match[] = {
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/* KBL-H */
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{ PCI_VDEVICE(INTEL, 0xa2a9), LPSS_SPT_SSP },
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{ PCI_VDEVICE(INTEL, 0xa2aa), LPSS_SPT_SSP },
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/* CML-V */
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{ PCI_VDEVICE(INTEL, 0xa3a9), LPSS_SPT_SSP },
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{ PCI_VDEVICE(INTEL, 0xa3aa), LPSS_SPT_SSP },
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/* BXT A-Step */
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{ PCI_VDEVICE(INTEL, 0x0ac2), LPSS_BXT_SSP },
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{ PCI_VDEVICE(INTEL, 0x0ac4), LPSS_BXT_SSP },
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