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omap: dma: Support for prefetch in destination synchronizedtransfer 

Omap DMA controller can prefetch data in advance in case of
destination synchronized data transfer. This may increase
performance when target HW block doesn't have fifo.
Data is waiting for transfer request in DMA fifo instead of read from memory.

Signed-off-by: Samu Onkalo <samu.p.onkalo@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
hifive-unleashed-5.1
Samu Onkalo 2010-08-02 14:21:40 +03:00 committed by Tony Lindgren
parent 5ebc0d526a
commit 72a1179ed4
2 changed files with 9 additions and 5 deletions
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13
arch/arm/plat-omap/dma.c
View File

@ -290,7 +290,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
val = dma_read(CCR(lch));
/* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */
val &= ~((3 << 19) | 0x1f);
val &= ~((1 << 23) | (3 << 19) | 0x1f);
val |= (dma_trigger & ~0x1f) << 14;
val |= dma_trigger & 0x1f;
@ -304,11 +304,14 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
else
val &= ~(1 << 18);
if (src_or_dst_synch)
val |= 1 << 24; /* source synch */
else
if (src_or_dst_synch == OMAP_DMA_DST_SYNC_PREFETCH) {
val &= ~(1 << 24); /* dest synch */
val |= (1 << 23); /* Prefetch */
} else if (src_or_dst_synch) {
val |= 1 << 24; /* source synch */
} else {
val &= ~(1 << 24); /* dest synch */
}
dma_write(val, CCR(lch));
}

1
arch/arm/plat-omap/include/plat/dma.h
View File

@ -345,6 +345,7 @@
#define OMAP_DMA_SYNC_BLOCK 0x02
#define OMAP_DMA_SYNC_PACKET 0x03
#define OMAP_DMA_DST_SYNC_PREFETCH 0x02
#define OMAP_DMA_SRC_SYNC 0x01
#define OMAP_DMA_DST_SYNC 0x00