ARM: dts: omap24xx: add minimal l4 bus layout with control module support
This patch creates an l4 / l4-wkup interconnects for omap2420 / omap2430 SoCs, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the new SCM node as the clock provider. Signed-off-by: Tero Kristo <t-kristo@ti.com>hifive-unleashed-5.1
Tero Kristo
parent
e5b635742e
commit
72b10ac00e
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@ -0,0 +1,17 @@
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L4 interconnect bindings
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These bindings describe the OMAP SoCs L4 interconnect bus.
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Required properties:
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- compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus
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Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus
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- ranges : contains the IO map range for the bus
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Examples:
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l4: l4@48000000 {
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compatible "ti,omap2-l4", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x48000000 0x100000>;
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};
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@ -14,7 +14,7 @@ Required properties:
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"ti,am4-prcm"
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"ti,am4-scrm"
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"ti,omap2-prcm"
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"ti,omap2-scrm"
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"ti,omap2-scm"
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"ti,omap3-prm"
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"ti,omap3-cm"
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"ti,omap3-scrm"
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@ -14,45 +14,63 @@
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compatible = "ti,omap2420", "ti,omap2";
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ocp {
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prcm: prcm@48008000 {
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compatible = "ti,omap2-prcm";
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reg = <0x48008000 0x1000>;
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prcm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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prcm_clockdomains: clockdomains {
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};
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};
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scrm: scrm@48000000 {
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compatible = "ti,omap2-scrm";
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reg = <0x48000000 0x1000>;
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scrm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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scrm_clockdomains: clockdomains {
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};
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};
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counter32k: counter@48004000 {
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compatible = "ti,omap-counter32k";
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reg = <0x48004000 0x20>;
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ti,hwmods = "counter_32k";
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};
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omap2420_pmx: pinmux@48000030 {
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compatible = "ti,omap2420-padconf", "pinctrl-single";
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reg = <0x48000030 0x0113>;
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l4: l4@48000000 {
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compatible = "ti,omap2-l4", "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <8>;
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pinctrl-single,function-mask = <0x3f>;
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#size-cells = <1>;
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ranges = <0 0x48000000 0x100000>;
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prcm: prcm@8000 {
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compatible = "ti,omap2-prcm";
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reg = <0x8000 0x1000>;
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prcm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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prcm_clockdomains: clockdomains {
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};
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};
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scm: scm@0 {
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compatible = "ti,omap2-scm", "simple-bus";
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reg = <0x0 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x0 0x1000>;
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omap2420_pmx: pinmux@30 {
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compatible = "ti,omap2420-padconf",
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"pinctrl-single";
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reg = <0x30 0x0113>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <8>;
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pinctrl-single,function-mask = <0x3f>;
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};
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scm_conf: scm_conf@270 {
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compatible = "syscon";
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reg = <0x270 0x100>;
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#address-cells = <1>;
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#size-cells = <1>;
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scm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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scm_clockdomains: clockdomains {
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};
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};
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counter32k: counter@4000 {
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compatible = "ti,omap-counter32k";
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reg = <0x4000 0x20>;
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ti,hwmods = "counter_32k";
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};
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};
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gpio1: gpio@48018000 {
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@ -8,12 +8,12 @@
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* published by the Free Software Foundation.
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*/
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&scrm_clocks {
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&scm_clocks {
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mcbsp3_mux_fck: mcbsp3_mux_fck {
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#clock-cells = <0>;
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compatible = "ti,composite-mux-clock";
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clocks = <&func_96m_ck>, <&mcbsp_clks>;
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reg = <0x02e8>;
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reg = <0x78>;
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};
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mcbsp3_fck: mcbsp3_fck {
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@ -27,7 +27,7 @@
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compatible = "ti,composite-mux-clock";
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clocks = <&func_96m_ck>, <&mcbsp_clks>;
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ti,bit-shift = <2>;
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reg = <0x02e8>;
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reg = <0x78>;
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};
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mcbsp4_fck: mcbsp4_fck {
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@ -41,7 +41,7 @@
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compatible = "ti,composite-mux-clock";
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clocks = <&func_96m_ck>, <&mcbsp_clks>;
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ti,bit-shift = <4>;
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reg = <0x02e8>;
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reg = <0x78>;
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};
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mcbsp5_fck: mcbsp5_fck {
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@ -14,60 +14,73 @@
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compatible = "ti,omap2430", "ti,omap2";
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ocp {
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prcm: prcm@49006000 {
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compatible = "ti,omap2-prcm";
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reg = <0x49006000 0x1000>;
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prcm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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prcm_clockdomains: clockdomains {
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};
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};
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scrm: scrm@49002000 {
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compatible = "ti,omap2-scrm";
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reg = <0x49002000 0x1000>;
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scrm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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scrm_clockdomains: clockdomains {
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};
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};
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counter32k: counter@49020000 {
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compatible = "ti,omap-counter32k";
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reg = <0x49020000 0x20>;
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ti,hwmods = "counter_32k";
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};
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omap2430_pmx: pinmux@49002030 {
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compatible = "ti,omap2430-padconf", "pinctrl-single";
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reg = <0x49002030 0x0154>;
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l4_wkup: l4_wkup@49000000 {
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compatible = "ti,omap2-l4-wkup", "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <8>;
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pinctrl-single,function-mask = <0x3f>;
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};
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#size-cells = <1>;
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ranges = <0 0x49000000 0x31000>;
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omap2_scm_general: tisyscon@49002270 {
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compatible = "syscon";
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reg = <0x49002270 0x240>;
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};
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prcm: prcm@6000 {
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compatible = "ti,omap2-prcm";
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reg = <0x6000 0x1000>;
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pbias_regulator: pbias_regulator {
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compatible = "ti,pbias-omap";
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reg = <0x230 0x4>;
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syscon = <&omap2_scm_general>;
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pbias_mmc_reg: pbias_mmc_omap2430 {
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regulator-name = "pbias_mmc_omap2430";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3000000>;
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prcm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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prcm_clockdomains: clockdomains {
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};
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};
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scm: scm@2000 {
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compatible = "ti,omap2-scm", "simple-bus";
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reg = <0x2000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x2000 0x1000>;
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omap2430_pmx: pinmux@30 {
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compatible = "ti,omap2430-padconf",
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"pinctrl-single";
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reg = <0x30 0x0154>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <8>;
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pinctrl-single,function-mask = <0x3f>;
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};
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scm_conf: scm_conf@270 {
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compatible = "syscon";
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reg = <0x270 0x240>;
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#address-cells = <1>;
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#size-cells = <1>;
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scm_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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pbias_regulator: pbias_regulator {
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compatible = "ti,pbias-omap";
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reg = <0x230 0x4>;
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syscon = <&scm_conf>;
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pbias_mmc_reg: pbias_mmc_omap2430 {
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regulator-name = "pbias_mmc_omap2430";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3000000>;
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};
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};
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};
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scm_clockdomains: clockdomains {
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};
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};
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counter32k: counter@20000 {
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compatible = "ti,omap-counter32k";
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reg = <0x20000 0x20>;
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ti,hwmods = "counter_32k";
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};
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};
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@ -7,13 +7,13 @@
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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&scrm_clocks {
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&scm_clocks {
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mcbsp1_mux_fck: mcbsp1_mux_fck {
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#clock-cells = <0>;
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compatible = "ti,composite-mux-clock";
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clocks = <&func_96m_ck>, <&mcbsp_clks>;
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ti,bit-shift = <2>;
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reg = <0x0274>;
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reg = <0x4>;
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};
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mcbsp1_fck: mcbsp1_fck {
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@ -27,7 +27,7 @@
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compatible = "ti,composite-mux-clock";
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clocks = <&func_96m_ck>, <&mcbsp_clks>;
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ti,bit-shift = <6>;
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reg = <0x0274>;
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reg = <0x4>;
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};
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mcbsp2_fck: mcbsp2_fck {
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@ -661,10 +661,15 @@ static struct control_init_data ctrl_data = {
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.index = TI_CLKM_CTRL,
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};
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static const struct control_init_data omap2_ctrl_data = {
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.index = TI_CLKM_CTRL,
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.offset = -OMAP2_CONTROL_GENERAL,
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};
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static const struct of_device_id omap_scrm_dt_match_table[] = {
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{ .compatible = "ti,am3-scrm", .data = &ctrl_data },
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{ .compatible = "ti,am4-scrm", .data = &ctrl_data },
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{ .compatible = "ti,omap2-scrm", .data = &ctrl_data },
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{ .compatible = "ti,omap2-scm", .data = &omap2_ctrl_data },
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{ .compatible = "ti,omap3-scrm", .data = &ctrl_data },
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{ .compatible = "ti,dm816-scrm", .data = &ctrl_data },
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{ }
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