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i2c: at91: Send bus clear command if SDA is down 

After a transfer timeout, some faulty I2C slave devices might hold down
the SDA pin. We can generate a bus clear command, hoping that the slave
might release the pins.
If the CLEAR command is not supported, we will use gpio recovery, if
available, to reset the bus.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
alistair/sunxi64-5.8
Codrin Ciubotariu 2020-02-25 17:50:09 +02:00 committed by Wolfram Sang
parent e896be5ad1
commit 73371d5f31
3 changed files with 50 additions and 8 deletions
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2
drivers/i2c/busses/i2c-at91-core.c
View File

@ -131,6 +131,7 @@ static struct at91_twi_pdata sama5d2_config = {
.has_dig_filtr = true,
.has_adv_dig_filtr = true,
.has_ana_filtr = true,
.has_clear_cmd = false, /* due to errata, CLEAR cmd is not working */
};
static struct at91_twi_pdata sam9x60_config = {
@ -142,6 +143,7 @@ static struct at91_twi_pdata sam9x60_config = {
.has_dig_filtr = true,
.has_adv_dig_filtr = true,
.has_ana_filtr = true,
.has_clear_cmd = true,
};
static const struct of_device_id atmel_twi_dt_ids[] = {

49
drivers/i2c/busses/i2c-at91-master.c
View File

@ -480,7 +480,6 @@ static int at91_do_twi_transfer(struct at91_twi_dev *dev)
unsigned long time_left;
bool has_unre_flag = dev->pdata->has_unre_flag;
bool has_alt_cmd = dev->pdata->has_alt_cmd;
struct i2c_bus_recovery_info *rinfo = &dev->rinfo;
/*
* WARNING: the TXCOMP bit in the Status Register is NOT a clear on
@ -641,11 +640,12 @@ error:
AT91_TWI_THRCLR | AT91_TWI_LOCKCLR);
}
if (rinfo->get_sda && !(rinfo->get_sda(&dev->adapter))) {
dev_dbg(dev->dev,
"SDA is down; clear bus using gpio\n");
i2c_recover_bus(&dev->adapter);
}
/*
* some faulty I2C slave devices might hold SDA down;
* we can send a bus clear command, hoping that the pins will be
* released
*/
i2c_recover_bus(&dev->adapter);
return ret;
}
@ -830,7 +830,7 @@ static void at91_unprepare_twi_recovery(struct i2c_adapter *adap)
pinctrl_select_state(dev->pinctrl, dev->pinctrl_pins_default);
}
static int at91_init_twi_recovery_info(struct platform_device *pdev,
static int at91_init_twi_recovery_gpio(struct platform_device *pdev,
struct at91_twi_dev *dev)
{
struct i2c_bus_recovery_info *rinfo = &dev->rinfo;
@ -880,6 +880,41 @@ static int at91_init_twi_recovery_info(struct platform_device *pdev,
return 0;
}
static int at91_twi_recover_bus_cmd(struct i2c_adapter *adap)
{
struct at91_twi_dev *dev = i2c_get_adapdata(adap);
dev->transfer_status |= at91_twi_read(dev, AT91_TWI_SR);
if (!(dev->transfer_status & AT91_TWI_SDA)) {
dev_dbg(dev->dev, "SDA is down; sending bus clear command\n");
if (dev->use_alt_cmd) {
unsigned int acr;
acr = at91_twi_read(dev, AT91_TWI_ACR);
acr &= ~AT91_TWI_ACR_DATAL_MASK;
at91_twi_write(dev, AT91_TWI_ACR, acr);
}
at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_CLEAR);
}
return 0;
}
static int at91_init_twi_recovery_info(struct platform_device *pdev,
struct at91_twi_dev *dev)
{
struct i2c_bus_recovery_info *rinfo = &dev->rinfo;
bool has_clear_cmd = dev->pdata->has_clear_cmd;
if (!has_clear_cmd)
return at91_init_twi_recovery_gpio(pdev, dev);
rinfo->recover_bus = at91_twi_recover_bus_cmd;
dev->adapter.bus_recovery_info = rinfo;
return 0;
}
int at91_twi_probe_master(struct platform_device *pdev,
u32 phy_addr, struct at91_twi_dev *dev)
{

7
drivers/i2c/busses/i2c-at91.h
View File

@ -36,6 +36,7 @@
#define AT91_TWI_SVDIS BIT(5) /* Slave Transfer Disable */
#define AT91_TWI_QUICK BIT(6) /* SMBus quick command */
#define AT91_TWI_SWRST BIT(7) /* Software Reset */
#define AT91_TWI_CLEAR BIT(15) /* Bus clear command */
#define AT91_TWI_ACMEN BIT(16) /* Alternative Command Mode Enable */
#define AT91_TWI_ACMDIS BIT(17) /* Alternative Command Mode Disable */
#define AT91_TWI_THRCLR BIT(24) /* Transmit Holding Register Clear */
@ -69,6 +70,8 @@
#define AT91_TWI_NACK BIT(8) /* Not Acknowledged */
#define AT91_TWI_EOSACC BIT(11) /* End Of Slave Access */
#define AT91_TWI_LOCK BIT(23) /* TWI Lock due to Frame Errors */
#define AT91_TWI_SCL BIT(24) /* TWI SCL status */
#define AT91_TWI_SDA BIT(25) /* TWI SDA status */
#define AT91_TWI_INT_MASK \
(AT91_TWI_TXCOMP | AT91_TWI_RXRDY | AT91_TWI_TXRDY | AT91_TWI_NACK \
@ -81,7 +84,8 @@
#define AT91_TWI_THR 0x0034 /* Transmit Holding Register */
#define AT91_TWI_ACR 0x0040 /* Alternative Command Register */
#define AT91_TWI_ACR_DATAL(len) ((len) & 0xff)
#define AT91_TWI_ACR_DATAL_MASK GENMASK(15, 0)
#define AT91_TWI_ACR_DATAL(len) ((len) & AT91_TWI_ACR_DATAL_MASK)
#define AT91_TWI_ACR_DIR BIT(8)
#define AT91_TWI_FILTR 0x0044
@ -118,6 +122,7 @@ struct at91_twi_pdata {
bool has_dig_filtr;
bool has_adv_dig_filtr;
bool has_ana_filtr;
bool has_clear_cmd;
struct at_dma_slave dma_slave;
};