m68knommu: fix clock rate value reported for ColdFire 54xx parts
The instruction timings of the ColdFire 54xx family parts are different to other version 4 parts (or version 2 or 3 parts for that matter too). Move the instruction timing setting into the ColdFire part specific headers, and set the 54xx value appropriately. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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@ -12,7 +12,8 @@
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#define m5206sim_h
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/****************************************************************************/
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#define CPU_NAME "COLDFIRE(m5206)"
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#define CPU_NAME "COLDFIRE(m5206)"
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#define CPU_INSTR_PER_JIFFY 3
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/*
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* Define the 5206 SIM register set addresses.
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@ -11,7 +11,8 @@
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#define m520xsim_h
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/****************************************************************************/
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#define CPU_NAME "COLDFIRE(m520x)"
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#define CPU_NAME "COLDFIRE(m520x)"
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#define CPU_INSTR_PER_JIFFY 3
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/*
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* Define the 520x SIM register set addresses.
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@ -11,7 +11,8 @@
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#define m523xsim_h
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/****************************************************************************/
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#define CPU_NAME "COLDFIRE(m523x)"
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#define CPU_NAME "COLDFIRE(m523x)"
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#define CPU_INSTR_PER_JIFFY 3
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/*
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* Define the 523x SIM register set addresses.
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@ -11,7 +11,8 @@
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#define m5249sim_h
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/****************************************************************************/
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#define CPU_NAME "COLDFIRE(m5249)"
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#define CPU_NAME "COLDFIRE(m5249)"
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#define CPU_INSTR_PER_JIFFY 3
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/*
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* Define the 5249 SIM register set addresses.
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@ -12,7 +12,8 @@
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#define m5272sim_h
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/****************************************************************************/
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#define CPU_NAME "COLDFIRE(m5272)"
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#define CPU_NAME "COLDFIRE(m5272)"
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#define CPU_INSTR_PER_JIFFY 3
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/*
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* Define the 5272 SIM register set addresses.
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@ -11,7 +11,8 @@
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#define m527xsim_h
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/****************************************************************************/
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#define CPU_NAME "COLDFIRE(m527x)"
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#define CPU_NAME "COLDFIRE(m527x)"
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#define CPU_INSTR_PER_JIFFY 3
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/*
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@ -11,7 +11,8 @@
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#define m528xsim_h
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/****************************************************************************/
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#define CPU_NAME "COLDFIRE(m528x)"
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#define CPU_NAME "COLDFIRE(m528x)"
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#define CPU_INSTR_PER_JIFFY 3
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/*
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* Define the 5280/5282 SIM register set addresses.
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@ -14,7 +14,8 @@
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#define m5307sim_h
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/****************************************************************************/
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#define CPU_NAME "COLDFIRE(m5307)"
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#define CPU_NAME "COLDFIRE(m5307)"
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#define CPU_INSTR_PER_JIFFY 3
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/*
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* Define the 5307 SIM register set addresses.
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@ -9,7 +9,8 @@
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#define m532xsim_h
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/****************************************************************************/
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#define CPU_NAME "COLDFIRE(m532x)"
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#define CPU_NAME "COLDFIRE(m532x)"
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#define CPU_INSTR_PER_JIFFY 3
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#define MCF_REG32(x) (*(volatile unsigned long *)(x))
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#define MCF_REG16(x) (*(volatile unsigned short *)(x))
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@ -14,7 +14,8 @@
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#define m5407sim_h
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/****************************************************************************/
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#define CPU_NAME "COLDFIRE(m5407)"
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#define CPU_NAME "COLDFIRE(m5407)"
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#define CPU_INSTR_PER_JIFFY 3
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/*
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* Define the 5407 SIM register set addresses.
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@ -5,9 +5,10 @@
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#ifndef m54xxsim_h
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#define m54xxsim_h
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#define CPU_NAME "COLDFIRE(m54xx)"
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#define CPU_NAME "COLDFIRE(m54xx)"
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#define CPU_INSTR_PER_JIFFY 2
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#define MCFINT_VECBASE 64
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#define MCFINT_VECBASE 64
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/*
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* Interrupt Controller Registers
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@ -66,13 +66,20 @@ void (*mach_power_off)(void);
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#ifdef CONFIG_M68360
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#define CPU_NAME "MC68360"
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#endif
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/*
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* The ColdFire CPU names are defined in their headers.
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*/
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#ifndef CPU_NAME
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#define CPU_NAME "UNKNOWN"
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#endif
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/*
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* Different cores have different instruction execution timings.
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* The old/traditional 68000 cores are basically all the same, at 16.
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* The ColdFire cores vary a little, their values are defined in their
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* headers. We default to the standard 68000 value here.
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*/
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#ifndef CPU_INSTR_PER_JIFFY
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#define CPU_INSTR_PER_JIFFY 16
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#endif
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extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end;
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extern int _ramstart, _ramend;
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@ -273,12 +280,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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cpu = CPU_NAME;
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mmu = "none";
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fpu = "none";
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#ifdef CONFIG_COLDFIRE
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clockfreq = (loops_per_jiffy * HZ) * 3;
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#else
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clockfreq = (loops_per_jiffy * HZ) * 16;
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#endif
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clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY;
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seq_printf(m, "CPU:\t\t%s\n"
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"MMU:\t\t%s\n"
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