powerpc: sysdev/xilinx_intc irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>hifive-unleashed-5.1
parent
42a07ae29a
commit
73909af736
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@ -69,17 +69,17 @@ static unsigned char xilinx_intc_map_senses[] = {
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*
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*
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* IRQ Chip common (across level and edge) operations
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* IRQ Chip common (across level and edge) operations
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*/
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*/
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static void xilinx_intc_mask(unsigned int virq)
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static void xilinx_intc_mask(struct irq_data *d)
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{
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{
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int irq = virq_to_hw(virq);
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int irq = virq_to_hw(d->irq);
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void * regs = get_irq_chip_data(virq);
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void * regs = irq_data_get_irq_chip_data(d);
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pr_debug("mask: %d\n", irq);
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pr_debug("mask: %d\n", irq);
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out_be32(regs + XINTC_CIE, 1 << irq);
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out_be32(regs + XINTC_CIE, 1 << irq);
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}
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}
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static int xilinx_intc_set_type(unsigned int virq, unsigned int flow_type)
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static int xilinx_intc_set_type(struct irq_data *d, unsigned int flow_type)
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{
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{
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struct irq_desc *desc = irq_to_desc(virq);
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struct irq_desc *desc = irq_to_desc(d->irq);
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desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
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desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
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desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
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desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
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@ -91,10 +91,10 @@ static int xilinx_intc_set_type(unsigned int virq, unsigned int flow_type)
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/*
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/*
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* IRQ Chip level operations
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* IRQ Chip level operations
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*/
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*/
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static void xilinx_intc_level_unmask(unsigned int virq)
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static void xilinx_intc_level_unmask(struct irq_data *d)
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{
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{
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int irq = virq_to_hw(virq);
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int irq = virq_to_hw(d->irq);
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void * regs = get_irq_chip_data(virq);
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void * regs = irq_data_get_irq_chip_data(d);
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pr_debug("unmask: %d\n", irq);
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pr_debug("unmask: %d\n", irq);
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out_be32(regs + XINTC_SIE, 1 << irq);
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out_be32(regs + XINTC_SIE, 1 << irq);
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@ -107,37 +107,37 @@ static void xilinx_intc_level_unmask(unsigned int virq)
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static struct irq_chip xilinx_intc_level_irqchip = {
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static struct irq_chip xilinx_intc_level_irqchip = {
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.name = "Xilinx Level INTC",
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.name = "Xilinx Level INTC",
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.mask = xilinx_intc_mask,
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.irq_mask = xilinx_intc_mask,
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.mask_ack = xilinx_intc_mask,
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.irq_mask_ack = xilinx_intc_mask,
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.unmask = xilinx_intc_level_unmask,
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.irq_unmask = xilinx_intc_level_unmask,
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.set_type = xilinx_intc_set_type,
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.irq_set_type = xilinx_intc_set_type,
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};
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};
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/*
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/*
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* IRQ Chip edge operations
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* IRQ Chip edge operations
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*/
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*/
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static void xilinx_intc_edge_unmask(unsigned int virq)
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static void xilinx_intc_edge_unmask(struct irq_data *d)
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{
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{
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int irq = virq_to_hw(virq);
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int irq = virq_to_hw(d->irq);
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void *regs = get_irq_chip_data(virq);
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void *regs = irq_data_get_irq_chip_data(d);
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pr_debug("unmask: %d\n", irq);
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pr_debug("unmask: %d\n", irq);
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out_be32(regs + XINTC_SIE, 1 << irq);
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out_be32(regs + XINTC_SIE, 1 << irq);
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}
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}
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static void xilinx_intc_edge_ack(unsigned int virq)
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static void xilinx_intc_edge_ack(struct irq_data *d)
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{
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{
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int irq = virq_to_hw(virq);
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int irq = virq_to_hw(d->irq);
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void * regs = get_irq_chip_data(virq);
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void * regs = irq_data_get_irq_chip_data(d);
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pr_debug("ack: %d\n", irq);
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pr_debug("ack: %d\n", irq);
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out_be32(regs + XINTC_IAR, 1 << irq);
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out_be32(regs + XINTC_IAR, 1 << irq);
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}
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}
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static struct irq_chip xilinx_intc_edge_irqchip = {
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static struct irq_chip xilinx_intc_edge_irqchip = {
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.name = "Xilinx Edge INTC",
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.name = "Xilinx Edge INTC",
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.mask = xilinx_intc_mask,
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.irq_mask = xilinx_intc_mask,
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.unmask = xilinx_intc_edge_unmask,
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.irq_unmask = xilinx_intc_edge_unmask,
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.ack = xilinx_intc_edge_ack,
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.irq_ack = xilinx_intc_edge_ack,
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.set_type = xilinx_intc_set_type,
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.irq_set_type = xilinx_intc_set_type,
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};
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};
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/*
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/*
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@ -229,12 +229,14 @@ int xilinx_intc_get_irq(void)
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*/
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*/
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static void xilinx_i8259_cascade(unsigned int irq, struct irq_desc *desc)
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static void xilinx_i8259_cascade(unsigned int irq, struct irq_desc *desc)
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{
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{
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struct irq_chip *chip = get_irq_desc_chip(desc);
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unsigned int cascade_irq = i8259_irq();
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unsigned int cascade_irq = i8259_irq();
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if (cascade_irq)
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if (cascade_irq)
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generic_handle_irq(cascade_irq);
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generic_handle_irq(cascade_irq);
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/* Let xilinx_intc end the interrupt */
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/* Let xilinx_intc end the interrupt */
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desc->chip->unmask(irq);
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chip->irq_unmask(&desc->irq_data);
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}
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}
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static void __init xilinx_i8259_setup_cascade(void)
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static void __init xilinx_i8259_setup_cascade(void)
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