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ARM: sun5i: Allow PLL3 2x fixed factor clock to change PLL3 rate 

In order to be able to properly generate its pixel clock, the pll3-2x fixed
factor needs to be able to change the PLL3 rate too.

Add the needed extra compatible so that it behaves that way.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
hifive-unleashed-5.1
Maxime Ripard 2016-06-22 11:15:55 +02:00
parent 6a706356b4
commit 73ba3a1c64
1 changed files with 1 additions and 1 deletions
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2
arch/arm/boot/dts/sun5i.dtsi
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@ -130,7 +130,7 @@
};
pll3x2: pll3x2_clk {
compatible = "fixed-factor-clock";
compatible = "allwinner,sun4i-a10-pll3-2x-clk", "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
clock-mult = <2>;