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irqchip: omap-intc: correct maximum number or MIR registers

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maximum number of MIR register is 4, rather than 3.
Fix that.

Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Felipe Balbi 2014-09-15 16:15:08 -05:00 committed by Tony Lindgren
parent b30791498a
commit 74b6c8ef54
1 changed files with 1 additions and 1 deletions
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drivers/irqchip/irq-omap-intc.c
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@ -49,7 +49,7 @@
#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
#define INTCPS_NR_ILR_REGS 128
#define INTCPS_NR_MIR_REGS 3
#define INTCPS_NR_MIR_REGS 4
#define INTC_IDLE_FUNCIDLE (1 << 0)
#define INTC_IDLE_TURBO (1 << 1)