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Merge drm-next into drm-intel-next-queued 

Pull 4.15 into drm-intel-next-queued for next feature pull.

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
hifive-unleashed-5.1
Joonas Lahtinen 2018-01-29 11:51:57 +02:00
parent 5db47e37b3 559f17bec5
commit 74c0167f8b
2431 changed files with 43625 additions and 25924 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
.mailmap
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@ -107,6 +107,7 @@ Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>
Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com>
Marcin Nowakowski <marcin.nowakowski@mips.com> <marcin.nowakowski@imgtec.com>
Mark Brown <broonie@sirena.org.uk>
Mark Yao <markyao0591@gmail.com> <mark.yao@rock-chips.com>
Martin Kepplinger <martink@posteo.de> <martin.kepplinger@theobroma-systems.com>
Martin Kepplinger <martink@posteo.de> <martin.kepplinger@ginzinger.com>
Matthieu CASTET <castet.matthieu@free.fr>

16
Documentation/ABI/testing/sysfs-devices-system-cpu
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@ -375,3 +375,19 @@ Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description: information about CPUs heterogeneity.
cpu_capacity: capacity of cpu#.
What: /sys/devices/system/cpu/vulnerabilities
/sys/devices/system/cpu/vulnerabilities/meltdown
/sys/devices/system/cpu/vulnerabilities/spectre_v1
/sys/devices/system/cpu/vulnerabilities/spectre_v2
Date: January 2018
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description: Information about CPU vulnerabilities
The files are named after the code names of CPU
vulnerabilities. The output of those files reflects the
state of the CPUs in the system. Possible output values:
"Not affected" CPU is not affected by the vulnerability
"Vulnerable" CPU is affected and no mitigation in effect
"Mitigation: $M" CPU is affected and mitigation $M is in effect

1
Documentation/admin-guide/kernel-parameters.rst
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@ -109,6 +109,7 @@ parameter is applicable::
IPV6 IPv6 support is enabled.
ISAPNP ISA PnP code is enabled.
ISDN Appropriate ISDN support is enabled.
ISOL CPU Isolation is enabled.
JOY Appropriate joystick support is enabled.
KGDB Kernel debugger support is enabled.
KVM Kernel Virtual Machine support is enabled.

62
Documentation/admin-guide/kernel-parameters.txt
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@ -328,11 +328,15 @@
not play well with APC CPU idle - disable it if you have
APC and your system crashes randomly.
apic= [APIC,X86-32] Advanced Programmable Interrupt Controller
apic= [APIC,X86] Advanced Programmable Interrupt Controller
Change the output verbosity whilst booting
Format: { quiet (default) | verbose | debug }
Change the amount of debugging information output
when initialising the APIC and IO-APIC components.
For X86-32, this can also be used to specify an APIC
driver name.
Format: apic=driver_name
Examples: apic=bigsmp
apic_extnmi= [APIC,X86] External NMI delivery setting
Format: { bsp (default) | all | none }
@ -709,9 +713,6 @@
It will be ignored when crashkernel=X,high is not used
or memory reserved is below 4G.
crossrelease_fullstack
[KNL] Allow to record full stack trace in cross-release
cryptomgr.notests
[KNL] Disable crypto self-tests
@ -1737,7 +1738,7 @@
isapnp= [ISAPNP]
Format: <RDP>,<reset>,<pci_scan>,<verbosity>
isolcpus= [KNL,SMP] Isolate a given set of CPUs from disturbance.
isolcpus= [KNL,SMP,ISOL] Isolate a given set of CPUs from disturbance.
[Deprecated - use cpusets instead]
Format: [flag-list,]<cpu-list>
@ -2622,6 +2623,11 @@
nosmt [KNL,S390] Disable symmetric multithreading (SMT).
Equivalent to smt=1.
nospectre_v2 [X86] Disable all mitigations for the Spectre variant 2
(indirect branch prediction) vulnerability. System may
allow data leaks with this option, which is equivalent
to spectre_v2=off.
noxsave [BUGS=X86] Disables x86 extended register state save
and restore using xsave. The kernel will fallback to
enabling legacy floating-point and sse state.
@ -2662,7 +2668,7 @@
Valid arguments: on, off
Default: on
nohz_full= [KNL,BOOT]
nohz_full= [KNL,BOOT,SMP,ISOL]
The argument is a cpu list, as described above.
In kernels built with CONFIG_NO_HZ_FULL=y, set
the specified list of CPUs whose tick will be stopped
@ -3094,6 +3100,12 @@
pcie_scan_all Scan all possible PCIe devices. Otherwise we
only look for one device below a PCIe downstream
port.
big_root_window Try to add a big 64bit memory window to the PCIe
root complex on AMD CPUs. Some GFX hardware
can resize a BAR to allow access to all VRAM.
Adding the window is slightly risky (it may
conflict with unreported devices), so this
taints the kernel.
pcie_aspm= [PCIE] Forcibly enable or disable PCIe Active State Power
Management.
@ -3282,6 +3294,21 @@
pt. [PARIDE]
See Documentation/blockdev/paride.txt.
pti= [X86_64] Control Page Table Isolation of user and
kernel address spaces. Disabling this feature
removes hardening, but improves performance of
system calls and interrupts.
on - unconditionally enable
off - unconditionally disable
auto - kernel detects whether your CPU model is
vulnerable to issues that PTI mitigates
Not specifying this option is equivalent to pti=auto.
nopti [X86_64]
Equivalent to pti=off
pty.legacy_count=
[KNL] Number of legacy pty's. Overwrites compiled-in
default number.
@ -3931,6 +3958,29 @@
sonypi.*= [HW] Sony Programmable I/O Control Device driver
See Documentation/laptops/sonypi.txt
spectre_v2= [X86] Control mitigation of Spectre variant 2
(indirect branch speculation) vulnerability.
on - unconditionally enable
off - unconditionally disable
auto - kernel detects whether your CPU model is
vulnerable
Selecting 'on' will, and 'auto' may, choose a
mitigation method at run time according to the
CPU, the available microcode, the setting of the
CONFIG_RETPOLINE configuration option, and the
compiler with which the kernel was built.
Specific mitigations can also be selected manually:
retpoline - replace indirect branches
retpoline,generic - google's original retpoline
retpoline,amd - AMD-specific minimal thunk
Not specifying this option is equivalent to
spectre_v2=auto.
spia_io_base= [HW,MTD]
spia_fio_base=
spia_pedr=

2
Documentation/admin-guide/thunderbolt.rst
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@ -230,7 +230,7 @@ If supported by your machine this will be exposed by the WMI bus with
a sysfs attribute called "force_power".
For example the intel-wmi-thunderbolt driver exposes this attribute in:
/sys/devices/platform/PNP0C14:00/wmi_bus/wmi_bus-PNP0C14:00/86CCFD48-205E-4A77-9C48-2021CBEDE341/force_power
/sys/bus/wmi/devices/86CCFD48-205E-4A77-9C48-2021CBEDE341/force_power
To force the power to on, write 1 to this attribute file.
To disable force power, write 0 to this attribute file.

1
Documentation/arm64/silicon-errata.txt
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@ -75,3 +75,4 @@ stable kernels.
| Qualcomm Tech. | Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
| Qualcomm Tech. | Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 |
| Qualcomm Tech. | QDF2400 ITS | E0065 | QCOM_QDF2400_ERRATUM_0065 |
| Qualcomm Tech. | Falkor v{1,2} | E1041 | QCOM_FALKOR_ERRATUM_1041 |

7
Documentation/cgroup-v2.txt
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@ -898,6 +898,13 @@ controller implements weight and absolute bandwidth limit models for
normal scheduling policy and absolute bandwidth allocation model for
realtime scheduling policy.
WARNING: cgroup2 doesn't yet support control of realtime processes and
the cpu controller can only be enabled when all RT processes are in
the root cgroup. Be aware that system management software may already
have placed RT processes into nonroot cgroups during the system boot
process, and these processes may need to be moved to the root cgroup
before the cpu controller can be enabled.
CPU Interface Files
~~~~~~~~~~~~~~~~~~~

16
Documentation/core-api/genericirq.rst
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@ -225,9 +225,9 @@ interrupts.
The following control flow is implemented (simplified excerpt)::
:c:func:`desc->irq_data.chip->irq_mask_ack`;
desc->irq_data.chip->irq_mask_ack();
handle_irq_event(desc->action);
:c:func:`desc->irq_data.chip->irq_unmask`;
desc->irq_data.chip->irq_unmask();
Default Fast EOI IRQ flow handler
@ -239,7 +239,7 @@ which only need an EOI at the end of the handler.
The following control flow is implemented (simplified excerpt)::
handle_irq_event(desc->action);
:c:func:`desc->irq_data.chip->irq_eoi`;
desc->irq_data.chip->irq_eoi();
Default Edge IRQ flow handler
@ -251,15 +251,15 @@ interrupts.
The following control flow is implemented (simplified excerpt)::
if (desc->status & running) {
:c:func:`desc->irq_data.chip->irq_mask_ack`;
desc->irq_data.chip->irq_mask_ack();
desc->status |= pending | masked;
return;
}
:c:func:`desc->irq_data.chip->irq_ack`;
desc->irq_data.chip->irq_ack();
desc->status |= running;
do {
if (desc->status & masked)
:c:func:`desc->irq_data.chip->irq_unmask`;
desc->irq_data.chip->irq_unmask();
desc->status &= ~pending;
handle_irq_event(desc->action);
} while (status & pending);
@ -293,10 +293,10 @@ simplified version without locking.
The following control flow is implemented (simplified excerpt)::
if (desc->irq_data.chip->irq_ack)
:c:func:`desc->irq_data.chip->irq_ack`;
desc->irq_data.chip->irq_ack();
handle_irq_event(desc->action);
if (desc->irq_data.chip->irq_eoi)
:c:func:`desc->irq_data.chip->irq_eoi`;
desc->irq_data.chip->irq_eoi();
EOI Edge IRQ flow handler

2
Documentation/devicetree/bindings/arm/ccn.txt
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@ -15,7 +15,7 @@ Required properties:
Example:
ccn@0x2000000000 {
ccn@2000000000 {
compatible = "arm,ccn-504";
reg = <0x20 0x00000000 0 0x1000000>;
interrupts = <0 181 4>;

2
Documentation/devicetree/bindings/arm/omap/crossbar.txt
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@ -49,7 +49,7 @@ An interrupt consumer on an SoC using crossbar will use:
interrupts = <GIC_SPI request_number interrupt_level>
Example:
device_x@0x4a023000 {
device_x@4a023000 {
/* Crossbar 8 used */
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
...

2
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt
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@ -8,7 +8,7 @@ Required properties:
- interrupts : Should contain MC General interrupt.
Example:
memory-controller@0x7000f000 {
memory-controller@7000f000 {
compatible = "nvidia,tegra20-mc";
reg = <0x7000f000 0x024
0x7000f03c 0x3c4>;

2
Documentation/devicetree/bindings/clock/axi-clkgen.txt
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@ -17,7 +17,7 @@ Optional properties:
- clock-output-names : From common clock binding.
Example:
clock@0xff000000 {
clock@ff000000 {
compatible = "adi,axi-clkgen";
#clock-cells = <0>;
reg = <0xff000000 0x1000>;

2
Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt
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@ -23,7 +23,7 @@ Example:
clocks = <&clk_osc>;
};
aux: aux@0x7e215004 {
aux: aux@7e215004 {
compatible = "brcm,bcm2835-aux";
#clock-cells = <1>;
reg = <0x7e215000 0x8>;

2
Documentation/devicetree/bindings/clock/exynos4-clock.txt
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@ -24,7 +24,7 @@ tree sources.
Example 1: An example of a clock controller node is listed below.
clock: clock-controller@0x10030000 {
clock: clock-controller@10030000 {
compatible = "samsung,exynos4210-clock";
reg = <0x10030000 0x20000>;
#clock-cells = <1>;

2
Documentation/devicetree/bindings/clock/exynos5250-clock.txt
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@ -22,7 +22,7 @@ tree sources.
Example 1: An example of a clock controller node is listed below.
clock: clock-controller@0x10010000 {
clock: clock-controller@10010000 {
compatible = "samsung,exynos5250-clock";
reg = <0x10010000 0x30000>;
#clock-cells = <1>;

2
Documentation/devicetree/bindings/clock/exynos5410-clock.txt
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@ -30,7 +30,7 @@ Example 1: An example of a clock controller node is listed below.
#clock-cells = <0>;
};
clock: clock-controller@0x10010000 {
clock: clock-controller@10010000 {
compatible = "samsung,exynos5410-clock";
reg = <0x10010000 0x30000>;
#clock-cells = <1>;

2
Documentation/devicetree/bindings/clock/exynos5420-clock.txt
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@ -23,7 +23,7 @@ tree sources.
Example 1: An example of a clock controller node is listed below.
clock: clock-controller@0x10010000 {
clock: clock-controller@10010000 {
compatible = "samsung,exynos5420-clock";
reg = <0x10010000 0x30000>;
#clock-cells = <1>;

2
Documentation/devicetree/bindings/clock/exynos5440-clock.txt
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@ -21,7 +21,7 @@ tree sources.
Example: An example of a clock controller node is listed below.
clock: clock-controller@0x10010000 {
clock: clock-controller@10010000 {
compatible = "samsung,exynos5440-clock";
reg = <0x160000 0x10000>;
#clock-cells = <1>;

2
Documentation/devicetree/bindings/clock/ti-keystone-pllctrl.txt
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@ -14,7 +14,7 @@ Required properties:
Example:
pllctrl: pll-controller@0x02310000 {
pllctrl: pll-controller@02310000 {
compatible = "ti,keystone-pllctrl", "syscon";
reg = <0x02310000 0x200>;
};

4
Documentation/devicetree/bindings/clock/zx296702-clk.txt
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@ -20,13 +20,13 @@ ID in its "clocks" phandle cell. See include/dt-bindings/clock/zx296702-clock.h
for the full list of zx296702 clock IDs.
topclk: topcrm@0x09800000 {
topclk: topcrm@09800000 {
compatible = "zte,zx296702-topcrm-clk";
reg = <0x09800000 0x1000>;
#clock-cells = <1>;
};
uart0: serial@0x09405000 {
uart0: serial@09405000 {
compatible = "zte,zx296702-uart";
reg = <0x09405000 0x1000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

4
Documentation/devicetree/bindings/crypto/fsl-sec4.txt
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@ -456,7 +456,7 @@ System ON/OFF key driver
Definition: this is phandle to the register map node.
EXAMPLE:
snvs-pwrkey@0x020cc000 {
snvs-pwrkey@020cc000 {
compatible = "fsl,sec-v4.0-pwrkey";
regmap = <&snvs>;
interrupts = <0 4 0x4>
@ -545,7 +545,7 @@ FULL EXAMPLE
interrupts = <93 2>;
};
snvs-pwrkey@0x020cc000 {
snvs-pwrkey@020cc000 {
compatible = "fsl,sec-v4.0-pwrkey";
regmap = <&sec_mon>;
interrupts = <0 4 0x4>;

2
Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt
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@ -9,7 +9,7 @@ Required properties:
- clock-names : the name of clock used by the DFI, must be "pclk_ddr_mon";
Example:
dfi: dfi@0xff630000 {
dfi: dfi@ff630000 {
compatible = "rockchip,rk3399-dfi";
reg = <0x00 0xff630000 0x00 0x4000>;
rockchip,pmu = <&pmugrf>;

4
Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.txt
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@ -48,6 +48,10 @@ Required properties:
Documentation/devicetree/bindings/reset/reset.txt,
the reset-names should be "hdmitx_apb", "hdmitx", "hdmitx_phy"
Optional properties:
- hdmi-supply: Optional phandle to an external 5V regulator to power the HDMI
logic, as described in the file ../regulator/regulator.txt
Required nodes:
The connections to the HDMI ports are modeled using the OF graph

4
Documentation/devicetree/bindings/display/amlogic,meson-vpu.txt
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@ -64,6 +64,10 @@ Required properties:
- reg-names: should contain the names of the previous memory regions
- interrupts: should contain the VENC Vsync interrupt number
Optional properties:
- power-domains: Optional phandle to associated power domain as described in
the file ../power/power_domain.txt
Required nodes:
The connections to the VPU output video ports are modeled using the OF graph

4
Documentation/devicetree/bindings/display/atmel,lcdc.txt
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@ -27,7 +27,7 @@ Optional properties:
Example:
fb0: fb@0x00500000 {
fb0: fb@00500000 {
compatible = "atmel,at91sam9g45-lcdc";
reg = <0x00500000 0x1000>;
interrupts = <23 3 0>;
@ -41,7 +41,7 @@ Example:
Example for fixed framebuffer memory:
fb0: fb@0x00500000 {
fb0: fb@00500000 {
compatible = "atmel,at91sam9263-lcdc";
reg = <0x00700000 0x1000 0x70000000 0x200000>;
[...]

4
Documentation/devicetree/bindings/display/ilitek,ili9225.txt
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@ -4,7 +4,7 @@ This binding is for display panels using an Ilitek ILI9225 controller in SPI
mode.
Required properties:
- compatible: "ilitek,ili9225-2.2in-176x220"
- compatible: "vot,v220hf01a-t", "ilitek,ili9225"
- rs-gpios: Register select signal
- reset-gpios: Reset pin
@ -16,7 +16,7 @@ Optional properties:
Example:
display@0{
compatible = "ilitek,ili9225-2.2in-176x220";
compatible = "vot,v220hf01a-t", "ilitek,ili9225";
reg = <0>;
spi-max-frequency = <12000000>;
rs-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;

49
Documentation/devicetree/bindings/display/panel/ilitek,ili9322.txt 100644
View File

@ -0,0 +1,49 @@
Ilitek ILI9322 TFT panel driver with SPI control bus
This is a driver for 320x240 TFT panels, accepting a variety of input
streams that get adapted and scaled to the panel. The panel output has
960 TFT source driver pins and 240 TFT gate driver pins, VCOM, VCOML and
VCOMH outputs.
Required properties:
- compatible: "dlink,dir-685-panel", "ilitek,ili9322"
(full system-specific compatible is always required to look up configuration)
- reg: address of the panel on the SPI bus
Optional properties:
- vcc-supply: core voltage supply, see regulator/regulator.txt
- iovcc-supply: voltage supply for the interface input/output signals,
see regulator/regulator.txt
- vci-supply: voltage supply for analog parts, see regulator/regulator.txt
- reset-gpios: a GPIO spec for the reset pin, see gpio/gpio.txt
The following optional properties only apply to RGB and YUV input modes and
can be omitted for BT.656 input modes:
- pixelclk-active: see display/panel/display-timing.txt
- de-active: see display/panel/display-timing.txt
- hsync-active: see display/panel/display-timing.txt
- vsync-active: see display/panel/display-timing.txt
The panel must obey the rules for a SPI slave device as specified in
spi/spi-bus.txt
The device node can contain one 'port' child node with one child
'endpoint' node, according to the bindings defined in
media/video-interfaces.txt. This node should describe panel's video bus.
Example:
panel: display@0 {
compatible = "dlink,dir-685-panel", "ilitek,ili9322";
reg = <0>;
vcc-supply = <&vdisp>;
iovcc-supply = <&vdisp>;
vci-supply = <&vdisp>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};

10
Documentation/devicetree/bindings/display/panel/panel-common.txt
View File

@ -78,6 +78,16 @@ used for panels that implement compatible control signals.
while active. Active high reset signals can be supported by inverting the
GPIO specifier polarity flag.
Power
-----
- power-supply: display panels require power to be supplied. While several
panels need more than one power supply with panel-specific constraints
governing the order and timings of the power supplies, in many cases a single
power supply is sufficient, either because the panel has a single power rail,
or because all its power rails can be driven by the same supply. In that case
the power-supply property specifies the supply powering the panel as a phandle
to a regulator.
Backlight
---------

1
Documentation/devicetree/bindings/display/panel/panel-lvds.txt
View File

@ -32,6 +32,7 @@ Optional properties:
- label: See panel-common.txt.
- gpios: See panel-common.txt.
- backlight: See panel-common.txt.
- power-supply: See panel-common.txt.
- data-mirror: If set, reverse the bit order described in the data mappings
below on all data lanes, transmitting bits for slots 6 to 0 instead of
0 to 6.

2
Documentation/devicetree/bindings/display/panel/simple-panel.txt
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@ -1,7 +1,7 @@
Simple display panel
Required properties:
- power-supply: regulator to provide the supply voltage
- power-supply: See panel-common.txt
Optional properties:
- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing

4
Documentation/devicetree/bindings/display/panel/toppoly,td028ttec1.txt → Documentation/devicetree/bindings/display/panel/tpo,td028ttec1.txt
View File

@ -2,7 +2,7 @@ Toppoly TD028TTEC1 Panel
========================
Required properties:
- compatible: "toppoly,td028ttec1"
- compatible: "tpo,td028ttec1"
Optional properties:
- label: a symbolic name for the panel
@ -14,7 +14,7 @@ Example
-------
lcd-panel: td028ttec1@0 {
compatible = "toppoly,td028ttec1";
compatible = "tpo,td028ttec1";
reg = <0>;
spi-max-frequency = <100000>;
spi-cpol;

35
Documentation/devicetree/bindings/display/sitronix,st7735r.txt 100644
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@ -0,0 +1,35 @@
Sitronix ST7735R display panels
This binding is for display panels using a Sitronix ST7735R controller in SPI
mode.
Required properties:
- compatible: "jianda,jd-t18003-t01", "sitronix,st7735r"
- dc-gpios: Display data/command selection (D/CX)
- reset-gpios: Reset signal (RSTX)
The node for this driver must be a child node of a SPI controller, hence
all mandatory properties described in ../spi/spi-bus.txt must be specified.
Optional properties:
- rotation: panel rotation in degrees counter clockwise (0,90,180,270)
- backlight: phandle of the backlight device attached to the panel
Example:
backlight: backlight {
compatible = "gpio-backlight";
gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
}
...
display@0{
compatible = "jianda,jd-t18003-t01", "sitronix,st7735r";
reg = <0>;
spi-max-frequency = <32000000>;
dc-gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio 80 GPIO_ACTIVE_HIGH>;
rotation = <270>;
backlight = &backlight;
};

11
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
View File

@ -93,6 +93,7 @@ Required properties:
* allwinner,sun6i-a31s-tcon
* allwinner,sun7i-a20-tcon
* allwinner,sun8i-a33-tcon
* allwinner,sun8i-a83t-tcon-lcd
* allwinner,sun8i-v3s-tcon
- reg: base address and size of memory-mapped region
- interrupts: interrupt associated to this IP
@ -121,6 +122,14 @@ Required properties:
On SoCs other than the A33 and V3s, there is one more clock required:
- 'tcon-ch1': The clock driving the TCON channel 1
On SoCs that support LVDS (all SoCs but the A13, H3, H5 and V3s), you
need one more reset line:
- 'lvds': The reset line driving the LVDS logic
And on the A23, A31, A31s and A33, you need one more clock line:
- 'lvds-alt': An alternative clock source, separate from the TCON channel 0
clock, that can be used to drive the LVDS clock
DRC
---
@ -216,6 +225,7 @@ supported.
Required properties:
- compatible: value must be one of:
* allwinner,sun8i-a83t-de2-mixer-0
* allwinner,sun8i-v3s-de2-mixer
- reg: base address and size of the memory-mapped region.
- clocks: phandles to the clocks feeding the mixer
@ -245,6 +255,7 @@ Required properties:
* allwinner,sun6i-a31s-display-engine
* allwinner,sun7i-a20-display-engine
* allwinner,sun8i-a33-display-engine
* allwinner,sun8i-a83t-display-engine
* allwinner,sun8i-v3s-display-engine
- allwinner,pipelines: list of phandle to the display engine

14
Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
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@ -206,21 +206,33 @@ of the following host1x client modules:
- "nvidia,tegra132-sor": for Tegra132
- "nvidia,tegra210-sor": for Tegra210
- "nvidia,tegra210-sor1": for Tegra210
- "nvidia,tegra186-sor": for Tegra186
- "nvidia,tegra186-sor1": for Tegra186
- reg: Physical base address and length of the controller's registers.
- interrupts: The interrupt outputs from the controller.
- clocks: Must contain an entry for each entry in clock-names.
See ../clocks/clock-bindings.txt for details.
- clock-names: Must include the following entries:
- sor: clock input for the SOR hardware
- source: source clock for the SOR clock
- out: SOR output clock
- parent: input for the pixel clock
- dp: reference clock for the SOR clock
- safe: safe reference for the SOR clock during power up
For Tegra186 and later:
- pad: SOR pad output clock (on Tegra186 and later)
Obsolete:
- source: source clock for the SOR clock (obsolete, use "out" instead)
- resets: Must contain an entry for each entry in reset-names.
See ../reset/reset.txt for details.
- reset-names: Must include the following entries:
- sor
Required properties on Tegra186 and later:
- nvidia,interface: index of the SOR interface
Optional properties:
- nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
- nvidia,hpd-gpio: specifies a GPIO used for hotplug detection

5
Documentation/devicetree/bindings/display/ti/ti,dra7-dss.txt
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@ -47,6 +47,11 @@ Required properties:
- clocks: handle to fclk
- clock-names: "fck"
Optional properties:
- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
in bytes per second
HDMI
----

4
Documentation/devicetree/bindings/display/ti/ti,omap2-dss.txt
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@ -28,6 +28,10 @@ Required properties:
- ti,hwmods: "dss_dispc"
- interrupts: the DISPC interrupt
Optional properties:
- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
in bytes per second
RFBI
----

4
Documentation/devicetree/bindings/display/ti/ti,omap3-dss.txt
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@ -37,6 +37,10 @@ Required properties:
- clocks: handle to fclk
- clock-names: "fck"
Optional properties:
- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
in bytes per second
RFBI
----

4
Documentation/devicetree/bindings/display/ti/ti,omap4-dss.txt
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@ -36,6 +36,10 @@ Required properties:
- clocks: handle to fclk
- clock-names: "fck"
Optional properties:
- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
in bytes per second
RFBI
----

4
Documentation/devicetree/bindings/display/ti/ti,omap5-dss.txt
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@ -36,6 +36,10 @@ Required properties:
- clocks: handle to fclk
- clock-names: "fck"
Optional properties:
- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
in bytes per second
RFBI
----

4
Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt
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@ -73,7 +73,7 @@ Hypervisor OS configuration:
max-read-transactions = <31>;
channel-reset-timeout-cycles = <0x500>;
hidma_24: dma-controller@0x5c050000 {
hidma_24: dma-controller@5c050000 {
compatible = "qcom,hidma-1.0";
reg = <0 0x5c050000 0x0 0x1000>,
<0 0x5c0b0000 0x0 0x1000>;
@ -85,7 +85,7 @@ Hypervisor OS configuration:
Guest OS configuration:
hidma_24: dma-controller@0x5c050000 {
hidma_24: dma-controller@5c050000 {
compatible = "qcom,hidma-1.0";
reg = <0 0x5c050000 0x0 0x1000>,
<0 0x5c0b0000 0x0 0x1000>;

2
Documentation/devicetree/bindings/dma/zxdma.txt
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@ -13,7 +13,7 @@ Required properties:
Example:
Controller:
dma: dma-controller@0x09c00000{
dma: dma-controller@09c00000{
compatible = "zte,zx296702-dma";
reg = <0x09c00000 0x1000>;
clocks = <&topclk ZX296702_DMA_ACLK>;

13
Documentation/devicetree/bindings/eeprom/at25.txt
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@ -1,7 +1,12 @@
EEPROMs (SPI) compatible with Atmel at25.
Required properties:
- compatible : "atmel,at25".
- compatible : Should be "<vendor>,<type>", and generic value "atmel,at25".
Example "<vendor>,<type>" values:
"microchip,25lc040"
"st,m95m02"
"st,m95256"
- reg : chip select number
- spi-max-frequency : max spi frequency to use
- pagesize : size of the eeprom page
@ -13,7 +18,7 @@ Optional properties:
- spi-cpol : SPI inverse clock polarity, as per spi-bus bindings.
- read-only : this parameter-less property disables writes to the eeprom
Obsolete legacy properties are can be used in place of "size", "pagesize",
Obsolete legacy properties can be used in place of "size", "pagesize",
"address-width", and "read-only":
- at25,byte-len : total eeprom size in bytes
- at25,addr-mode : addr-mode flags, as defined in include/linux/spi/eeprom.h
@ -22,8 +27,8 @@ Obsolete legacy properties are can be used in place of "size", "pagesize",
Additional compatible properties are also allowed.
Example:
at25@0 {
compatible = "atmel,at25", "st,m95256";
eeprom@0 {
compatible = "st,m95256", "atmel,at25";
reg = <0>
spi-max-frequency = <5000000>;
spi-cpha;

2
Documentation/devicetree/bindings/gpio/gpio-altera.txt
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@ -30,7 +30,7 @@ Optional properties:
Example:
gpio_altr: gpio@0xff200000 {
gpio_altr: gpio@ff200000 {
compatible = "altr,pio-1.0";
reg = <0xff200000 0x10>;
interrupts = <0 45 4>;

2
Documentation/devicetree/bindings/gpio/gpio-pca953x.txt
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@ -27,7 +27,7 @@ Required properties:
ti,tca6424
ti,tca9539
ti,tca9554
onsemi,pca9654
onnn,pca9654
exar,xra1202
Optional properties:

2
Documentation/devicetree/bindings/i2c/i2c-jz4780.txt
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@ -18,7 +18,7 @@ Optional properties:
Example
/ {
i2c4: i2c4@0x10054000 {
i2c4: i2c4@10054000 {
compatible = "ingenic,jz4780-i2c";
reg = <0x10054000 0x1000>;

2
Documentation/devicetree/bindings/iio/pressure/hp03.txt
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@ -10,7 +10,7 @@ Required properties:
Example:
hp03@0x77 {
hp03@77 {
compatible = "hoperf,hp03";
reg = <0x77>;
xclr-gpio = <&portc 0 0x0>;

2
Documentation/devicetree/bindings/input/touchscreen/bu21013.txt
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@ -15,7 +15,7 @@ Optional properties:
Example:
i2c@80110000 {
bu21013_tp@0x5c {
bu21013_tp@5c {
compatible = "rohm,bu21013_tp";
reg = <0x5c>;
touch-gpio = <&gpio2 20 0x4>;

4
Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
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@ -155,7 +155,7 @@ Example:
<0x0 0xe112f000 0 0x02000>,
<0x0 0xe1140000 0 0x10000>,
<0x0 0xe1160000 0 0x10000>;
v2m0: v2m@0x8000 {
v2m0: v2m@8000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
reg = <0x0 0x80000 0 0x1000>;
@ -163,7 +163,7 @@ Example:
....
v2mN: v2m@0x9000 {
v2mN: v2m@9000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
reg = <0x0 0x90000 0 0x1000>;

2
Documentation/devicetree/bindings/interrupt-controller/img,meta-intc.txt
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@ -71,7 +71,7 @@ Example 2:
* An interrupt generating device that is wired to a Meta external
* trigger block.
*/
uart1: uart@0x02004c00 {
uart1: uart@02004c00 {
// Interrupt source '5' that is level-sensitive.
// Note that there are only two cells as specified in the
// interrupt parent's '#interrupt-cells' property.

2
Documentation/devicetree/bindings/interrupt-controller/img,pdc-intc.txt
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@ -51,7 +51,7 @@ Example 1:
/*
* TZ1090 PDC block
*/
pdc: pdc@0x02006000 {
pdc: pdc@02006000 {
// This is an interrupt controller node.
interrupt-controller;

2
Documentation/devicetree/bindings/interrupt-controller/st,spear3xx-shirq.txt
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@ -39,7 +39,7 @@ Example:
The following is an example from the SPEAr320 SoC dtsi file.
shirq: interrupt-controller@0xb3000000 {
shirq: interrupt-controller@b3000000 {
compatible = "st,spear320-shirq";
reg = <0xb3000000 0x1000>;
interrupts = <28 29 30 1>;

6
Documentation/devicetree/bindings/mailbox/altera-mailbox.txt
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@ -14,7 +14,7 @@ Optional properties:
depends on the interrupt controller parent.
Example:
mbox_tx: mailbox@0x100 {
mbox_tx: mailbox@100 {
compatible = "altr,mailbox-1.0";
reg = <0x100 0x8>;
interrupt-parent = < &gic_0 >;
@ -22,7 +22,7 @@ Example:
#mbox-cells = <1>;
};
mbox_rx: mailbox@0x200 {
mbox_rx: mailbox@200 {
compatible = "altr,mailbox-1.0";
reg = <0x200 0x8>;
interrupt-parent = < &gic_0 >;
@ -40,7 +40,7 @@ support only one channel).The equivalent "mbox-names" property value can be
used to give a name to the communication channel to be used by the client user.
Example:
mclient0: mclient0@0x400 {
mclient0: mclient0@400 {
compatible = "client-1.0";
reg = <0x400 0x10>;
mbox-names = "mbox-tx", "mbox-rx";

2
Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt
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@ -15,7 +15,7 @@ Optional properties:
- brcm,use-bcm-hdr: present if a BCM header precedes each frame.
Example:
pdc0: iproc-pdc0@0x612c0000 {
pdc0: iproc-pdc0@612c0000 {
compatible = "brcm,iproc-pdc-mbox";
reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;

2
Documentation/devicetree/bindings/media/exynos5-gsc.txt
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@ -17,7 +17,7 @@ Optional properties:
Example:
gsc_0: gsc@0x13e00000 {
gsc_0: gsc@13e00000 {
compatible = "samsung,exynos5250-gsc";
reg = <0x13e00000 0x1000>;
interrupts = <0 85 0>;

2
Documentation/devicetree/bindings/media/mediatek-vcodec.txt
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@ -68,7 +68,7 @@ vcodec_dec: vcodec@16000000 {
"vdec_bus_clk_src";
};
vcodec_enc: vcodec@0x18002000 {
vcodec_enc: vcodec@18002000 {
compatible = "mediatek,mt8173-vcodec-enc";
reg = <0 0x18002000 0 0x1000>, /*VENC_SYS*/
<0 0x19002000 0 0x1000>; /*VENC_LT_SYS*/

2
Documentation/devicetree/bindings/media/rcar_vin.txt
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@ -44,7 +44,7 @@ Device node example
vin0 = &vin0;
};
vin0: vin@0xe6ef0000 {
vin0: vin@e6ef0000 {
compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
reg = <0 0xe6ef0000 0 0x1000>;

2
Documentation/devicetree/bindings/media/samsung-fimc.txt
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@ -138,7 +138,7 @@ Example:
};
/* MIPI CSI-2 bus IF sensor */
s5c73m3: sensor@0x1a {
s5c73m3: sensor@1a {
compatible = "samsung,s5c73m3";
reg = <0x1a>;
vddio-supply = <...>;

2
Documentation/devicetree/bindings/media/sh_mobile_ceu.txt
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@ -8,7 +8,7 @@ Bindings, specific for the sh_mobile_ceu_camera.c driver:
Example:
ceu0: ceu@0xfe910000 {
ceu0: ceu@fe910000 {
compatible = "renesas,sh-mobile-ceu";
reg = <0xfe910000 0xa0>;
interrupt-parent = <&intcs>;

10
Documentation/devicetree/bindings/media/video-interfaces.txt
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@ -154,7 +154,7 @@ imx074 is linked to ceu0 through the MIPI CSI-2 receiver (csi2). ceu0 has a
'port' node which may indicate that at any time only one of the following data
pipelines can be active: ov772x -> ceu0 or imx074 -> csi2 -> ceu0.
ceu0: ceu@0xfe910000 {
ceu0: ceu@fe910000 {
compatible = "renesas,sh-mobile-ceu";
reg = <0xfe910000 0xa0>;
interrupts = <0x880>;
@ -193,9 +193,9 @@ pipelines can be active: ov772x -> ceu0 or imx074 -> csi2 -> ceu0.
};
};
i2c0: i2c@0xfff20000 {
i2c0: i2c@fff20000 {
...
ov772x_1: camera@0x21 {
ov772x_1: camera@21 {
compatible = "ovti,ov772x";
reg = <0x21>;
vddio-supply = <&regulator1>;
@ -219,7 +219,7 @@ pipelines can be active: ov772x -> ceu0 or imx074 -> csi2 -> ceu0.
};
};
imx074: camera@0x1a {
imx074: camera@1a {
compatible = "sony,imx074";
reg = <0x1a>;
vddio-supply = <&regulator1>;
@ -239,7 +239,7 @@ pipelines can be active: ov772x -> ceu0 or imx074 -> csi2 -> ceu0.
};
};
csi2: csi2@0xffc90000 {
csi2: csi2@ffc90000 {
compatible = "renesas,sh-mobile-csi2";
reg = <0xffc90000 0x1000>;
interrupts = <0x17a0>;

2
Documentation/devicetree/bindings/memory-controllers/ti/emif.txt
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@ -46,7 +46,7 @@ Optional properties:
Example:
emif1: emif@0x4c000000 {
emif1: emif@4c000000 {
compatible = "ti,emif-4d";
ti,hwmods = "emif2";
phy-type = <1>;

2
Documentation/devicetree/bindings/mfd/ti-keystone-devctrl.txt
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@ -13,7 +13,7 @@ Required properties:
Example:
devctrl: device-state-control@0x02620000 {
devctrl: device-state-control@02620000 {
compatible = "ti,keystone-devctrl", "syscon";
reg = <0x02620000 0x1000>;
};

2
Documentation/devicetree/bindings/misc/brcm,kona-smc.txt
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@ -9,7 +9,7 @@ Required properties:
- reg : Location and size of bounce buffer
Example:
smc@0x3404c000 {
smc@3404c000 {
compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
reg = <0x3404c000 0x400>; //1 KiB in SRAM
};

2
Documentation/devicetree/bindings/mmc/brcm,kona-sdhci.txt
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@ -12,7 +12,7 @@ Refer to clocks/clock-bindings.txt for generic clock consumer properties.
Example:
sdio2: sdio@0x3f1a0000 {
sdio2: sdio@3f1a0000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f1a0000 0x10000>;
clocks = <&sdio3_clk>;

2
Documentation/devicetree/bindings/mmc/brcm,sdhci-iproc.txt
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@ -24,7 +24,7 @@ Optional properties:
Example:
sdhci0: sdhci@0x18041000 {
sdhci0: sdhci@18041000 {
compatible = "brcm,sdhci-iproc-cygnus";
reg = <0x18041000 0x100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;

4
Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
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@ -55,7 +55,7 @@ Examples:
[hwmod populated DMA resources]
mmc1: mmc@0x4809c000 {
mmc1: mmc@4809c000 {
compatible = "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
ti,hwmods = "mmc1";
@ -67,7 +67,7 @@ Examples:
[generic DMA request binding]
mmc1: mmc@0x4809c000 {
mmc1: mmc@4809c000 {
compatible = "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
ti,hwmods = "mmc1";

6
Documentation/devicetree/bindings/mtd/gpmc-nor.txt
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@ -82,15 +82,15 @@ gpmc: gpmc@6e000000 {
label = "bootloader-nor";
reg = <0 0x40000>;
};
partition@0x40000 {
partition@40000 {
label = "params-nor";
reg = <0x40000 0x40000>;
};
partition@0x80000 {
partition@80000 {
label = "kernel-nor";
reg = <0x80000 0x200000>;
};
partition@0x280000 {
partition@280000 {
label = "filesystem-nor";
reg = <0x240000 0x7d80000>;
};

2
Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
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@ -13,7 +13,6 @@ Required properties:
at25df321a
at25df641
at26df081a
en25s64
mr25h128
mr25h256
mr25h10
@ -33,7 +32,6 @@ Required properties:
s25fl008k
s25fl064k
sst25vf040b
sst25wf040b
m25p40
m25p80
m25p16

2
Documentation/devicetree/bindings/mtd/mtk-nand.txt
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@ -131,7 +131,7 @@ Example:
read-only;
reg = <0x00000000 0x00400000>;
};
android@0x00400000 {
android@00400000 {
label = "android";
reg = <0x00400000 0x12c00000>;
};

4
Documentation/devicetree/bindings/net/altera_tse.txt
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@ -52,7 +52,7 @@ Optional properties:
Example:
tse_sub_0_eth_tse_0: ethernet@0x1,00000000 {
tse_sub_0_eth_tse_0: ethernet@1,00000000 {
compatible = "altr,tse-msgdma-1.0";
reg = <0x00000001 0x00000000 0x00000400>,
<0x00000001 0x00000460 0x00000020>,
@ -90,7 +90,7 @@ Example:
};
};
tse_sub_1_eth_tse_0: ethernet@0x1,00001000 {
tse_sub_1_eth_tse_0: ethernet@1,00001000 {
compatible = "altr,tse-msgdma-1.0";
reg = <0x00000001 0x00001000 0x00000400>,
<0x00000001 0x00001460 0x00000020>,

2
Documentation/devicetree/bindings/net/mdio.txt
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@ -18,7 +18,7 @@ Example :
This example shows these optional properties, plus other properties
required for the TI Davinci MDIO driver.
davinci_mdio: ethernet@0x5c030000 {
davinci_mdio: ethernet@5c030000 {
compatible = "ti,davinci_mdio";
reg = <0x5c030000 0x1000>;
#address-cells = <1>;

2
Documentation/devicetree/bindings/net/socfpga-dwmac.txt
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@ -28,7 +28,7 @@ Required properties:
Example:
gmii_to_sgmii_converter: phy@0x100000240 {
gmii_to_sgmii_converter: phy@100000240 {
compatible = "altr,gmii-to-sgmii-2.0";
reg = <0x00000001 0x00000240 0x00000008>,
<0x00000001 0x00000200 0x00000040>;

2
Documentation/devicetree/bindings/nios2/nios2.txt
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@ -36,7 +36,7 @@ Optional properties:
Example:
cpu@0x0 {
cpu@0 {
device_type = "cpu";
compatible = "altr,nios2-1.0";
reg = <0>;

2
Documentation/devicetree/bindings/pci/altera-pcie.txt
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@ -25,7 +25,7 @@ Optional properties:
- bus-range: PCI bus numbers covered
Example
pcie_0: pcie@0xc00000000 {
pcie_0: pcie@c00000000 {
compatible = "altr,pcie-root-port-1.0";
reg = <0xc0000000 0x20000000>,
<0xff220000 0x00004000>;

2
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
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@ -52,7 +52,7 @@ Additional required properties for imx7d-pcie:
Example:
pcie@0x01000000 {
pcie@01000000 {
compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
reg = <0x01ffc000 0x04000>,
<0x01f00000 0x80000>;

2
Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
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@ -21,7 +21,7 @@ Optional properties:
- dma-coherent: Present if DMA operations are coherent.
Hip05 Example (note that Hip06 is the same except compatible):
pcie@0xb0080000 {
pcie@b0080000 {
compatible = "hisilicon,hip05-pcie", "snps,dw-pcie";
reg = <0 0xb0080000 0 0x10000>, <0x220 0x00000000 0 0x2000>;
reg-names = "rc_dbi", "config";

2
Documentation/devicetree/bindings/phy/sun4i-usb-phy.txt
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@ -45,7 +45,7 @@ Optional properties:
- usb3_vbus-supply : regulator phandle for controller usb3 vbus
Example:
usbphy: phy@0x01c13400 {
usbphy: phy@01c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun4i-a10-usb-phy";
/* phy base regs, phy1 pmu reg, phy2 pmu reg */

2
Documentation/devicetree/bindings/pinctrl/brcm,cygnus-pinmux.txt
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@ -25,7 +25,7 @@ Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
For example:
pinmux: pinmux@0x0301d0c8 {
pinmux: pinmux@0301d0c8 {
compatible = "brcm,cygnus-pinmux";
reg = <0x0301d0c8 0x1b0>;

4
Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt
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@ -96,14 +96,14 @@ For example, pinctrl might have subnodes like the following:
For a specific board, if it wants to use sd1,
it can add the following to its board-specific .dts file.
sd1: sd@0x12340000 {
sd1: sd@12340000 {
pinctrl-names = "default";
pinctrl-0 = <&sd1_pmx0>;
}
or
sd1: sd@0x12340000 {
sd1: sd@12340000 {
pinctrl-names = "default";
pinctrl-0 = <&sd1_pmx1>;
}

2
Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt
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@ -41,7 +41,7 @@ For example, pinctrl might have subnodes like the following:
For a specific board, if it wants to use uart2 without hardware flow control,
it can add the following to its board-specific .dts file.
uart2: uart@0xb0070000 {
uart2: uart@b0070000 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_noflow_pins_a>;
}

4
Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.txt
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@ -136,7 +136,7 @@ Example for rk3188:
#size-cells = <1>;
ranges;
gpio0: gpio0@0x2000a000 {
gpio0: gpio0@2000a000 {
compatible = "rockchip,rk3188-gpio-bank0";
reg = <0x2000a000 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
@ -149,7 +149,7 @@ Example for rk3188:
#interrupt-cells = <2>;
};
gpio1: gpio1@0x2003c000 {
gpio1: gpio1@2003c000 {
compatible = "rockchip,gpio-bank";
reg = <0x2003c000 0x100>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

2
Documentation/devicetree/bindings/regulator/regulator.txt
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@ -107,7 +107,7 @@ regulators (twl_reg1 and twl_reg2),
...
};
mmc: mmc@0x0 {
mmc: mmc@0 {
...
...
vmmc-supply = <&twl_reg1>;

2
Documentation/devicetree/bindings/serial/efm32-uart.txt
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@ -12,7 +12,7 @@ Optional properties:
Example:
uart@0x4000c400 {
uart@4000c400 {
compatible = "energymicro,efm32-uart";
reg = <0x4000c400 0x400>;
interrupts = <15>;

2
Documentation/devicetree/bindings/serio/allwinner,sun4i-ps2.txt
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@ -14,7 +14,7 @@ Required properties:
Example:
ps20: ps2@0x01c2a000 {
ps20: ps2@01c2a000 {
compatible = "allwinner,sun4i-a10-ps2";
reg = <0x01c2a000 0x400>;
interrupts = <0 62 4>;

2
Documentation/devicetree/bindings/soc/ti/keystone-navigator-qmss.txt
View File

@ -220,7 +220,7 @@ qmss: qmss@2a40000 {
#address-cells = <1>;
#size-cells = <1>;
ranges;
pdsp0@0x2a10000 {
pdsp0@2a10000 {
reg = <0x2a10000 0x1000>,
<0x2a0f000 0x100>,
<0x2a0c000 0x3c8>,

2
Documentation/devicetree/bindings/sound/adi,axi-i2s.txt
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@ -21,7 +21,7 @@ please check:
Example:
i2s: i2s@0x77600000 {
i2s: i2s@77600000 {
compatible = "adi,axi-i2s-1.00.a";
reg = <0x77600000 0x1000>;
clocks = <&clk 15>, <&audio_clock>;

2
Documentation/devicetree/bindings/sound/adi,axi-spdif-tx.txt
View File

@ -20,7 +20,7 @@ please check:
Example:
spdif: spdif@0x77400000 {
spdif: spdif@77400000 {
compatible = "adi,axi-spdif-tx-1.00.a";
reg = <0x77600000 0x1000>;
clocks = <&clk 15>, <&audio_clock>;

2
Documentation/devicetree/bindings/sound/ak4613.txt
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@ -20,7 +20,7 @@ Optional properties:
Example:
&i2c {
ak4613: ak4613@0x10 {
ak4613: ak4613@10 {
compatible = "asahi-kasei,ak4613";
reg = <0x10>;
};

2
Documentation/devicetree/bindings/sound/ak4642.txt
View File

@ -17,7 +17,7 @@ Optional properties:
Example 1:
&i2c {
ak4648: ak4648@0x12 {
ak4648: ak4648@12 {
compatible = "asahi-kasei,ak4642";
reg = <0x12>;
};

2
Documentation/devicetree/bindings/sound/da7218.txt
View File

@ -73,7 +73,7 @@ Example:
compatible = "dlg,da7218";
reg = <0x1a>;
interrupt-parent = <&gpio6>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
wakeup-source;
VDD-supply = <&reg_audio>;

2
Documentation/devicetree/bindings/sound/da7219.txt
View File

@ -77,7 +77,7 @@ Example:
reg = <0x1a>;
interrupt-parent = <&gpio6>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
VDD-supply = <&reg_audio>;
VDDMIC-supply = <&reg_audio>;

2
Documentation/devicetree/bindings/sound/max98371.txt
View File

@ -10,7 +10,7 @@ Required properties:
Example:
&i2c {
max98371: max98371@0x31 {
max98371: max98371@31 {
compatible = "maxim,max98371";
reg = <0x31>;
};

2
Documentation/devicetree/bindings/sound/max9867.txt
View File

@ -10,7 +10,7 @@ Required properties:
Example:
&i2c {
max9867: max9867@0x18 {
max9867: max9867@18 {
compatible = "maxim,max9867";
reg = <0x18>;
};

2
Documentation/devicetree/bindings/sound/renesas,fsi.txt
View File

@ -20,7 +20,7 @@ Required properties:
Example:
sh_fsi2: sh_fsi2@0xec230000 {
sh_fsi2: sh_fsi2@ec230000 {
compatible = "renesas,sh_fsi2";
reg = <0xec230000 0x400>;
interrupts = <0 146 0x4>;

2
Documentation/devicetree/bindings/sound/rockchip-spdif.txt
View File

@ -33,7 +33,7 @@ Required properties on RK3288:
Example for the rk3188 SPDIF controller:
spdif: spdif@0x1011e000 {
spdif: spdif@1011e000 {
compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
reg = <0x1011e000 0x2000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;

8
Documentation/devicetree/bindings/sound/st,sti-asoc-card.txt
View File

@ -51,7 +51,7 @@ Optional properties:
Example:
sti_uni_player1: sti-uni-player@0x8D81000 {
sti_uni_player1: sti-uni-player@8D81000 {
compatible = "st,stih407-uni-player-hdmi";
#sound-dai-cells = <0>;
st,syscfg = <&syscfg_core>;
@ -63,7 +63,7 @@ Example:
st,tdm-mode = <1>;
};
sti_uni_player2: sti-uni-player@0x8D82000 {
sti_uni_player2: sti-uni-player@8D82000 {
compatible = "st,stih407-uni-player-pcm-out";
#sound-dai-cells = <0>;
st,syscfg = <&syscfg_core>;
@ -74,7 +74,7 @@ Example:
dma-names = "tx";
};
sti_uni_player3: sti-uni-player@0x8D85000 {
sti_uni_player3: sti-uni-player@8D85000 {
compatible = "st,stih407-uni-player-spdif";
#sound-dai-cells = <0>;
st,syscfg = <&syscfg_core>;
@ -85,7 +85,7 @@ Example:
dma-names = "tx";
};
sti_uni_reader1: sti-uni-reader@0x8D84000 {
sti_uni_reader1: sti-uni-reader@8D84000 {
compatible = "st,stih407-uni-reader-hdmi";
#sound-dai-cells = <0>;
st,syscfg = <&syscfg_core>;

2
Documentation/devicetree/bindings/spi/efm32-spi.txt
View File

@ -19,7 +19,7 @@ Recommended properties :
Example:
spi1: spi@0x4000c400 { /* USART1 */
spi1: spi@4000c400 { /* USART1 */
#address-cells = <1>;
#size-cells = <0>;
compatible = "energymicro,efm32-spi";

18
Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
View File

@ -12,24 +12,30 @@ Required properties:
- "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc
- reg : Offset and length of the register set for the device
- interrupts : Should contain CSPI/eCSPI interrupt
- cs-gpios : Specifies the gpio pins to be used for chipselects.
- clocks : Clock specifiers for both ipg and per clocks.
- clock-names : Clock names should include both "ipg" and "per"
See the clock consumer binding,
Documentation/devicetree/bindings/clock/clock-bindings.txt
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request names should include "tx" and "rx" if present.
Obsolete properties:
- fsl,spi-num-chipselects : Contains the number of the chipselect
Recommended properties:
- cs-gpios : GPIOs to use as chip selects, see spi-bus.txt. While the native chip
select lines can be used, they appear to always generate a pulse between each
word of a transfer. Most use cases will require GPIO based chip selects to
generate a valid transaction.
Optional properties:
- num-cs : Number of total chip selects, see spi-bus.txt.
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
Documentation/devicetree/bindings/dma/dma.txt.
- dma-names: DMA request names, if present, should include "tx" and "rx".
- fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register
controlling the SPI_READY handling. Note that to enable the DRCTL consideration,
the SPI_READY mode-flag needs to be set too.
Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
Obsolete properties:
- fsl,spi-num-chipselects : Contains the number of the chipselect
Example:
ecspi@70010000 {

12
Documentation/devicetree/bindings/thermal/thermal.txt
View File

@ -239,7 +239,7 @@ cpus {
* A simple fan controller which supports 10 speeds of operation
* (represented as 0-9).
*/
fan0: fan@0x48 {
fan0: fan@48 {
...
cooling-min-level = <0>;
cooling-max-level = <9>;
@ -252,7 +252,7 @@ ocp {
/*
* A simple IC with a single bandgap temperature sensor.
*/
bandgap0: bandgap@0x0000ED00 {
bandgap0: bandgap@0000ED00 {
...
#thermal-sensor-cells = <0>;
};
@ -330,7 +330,7 @@ ocp {
/*
* A simple IC with several bandgap temperature sensors.
*/
bandgap0: bandgap@0x0000ED00 {
bandgap0: bandgap@0000ED00 {
...
#thermal-sensor-cells = <1>;
};
@ -447,7 +447,7 @@ one thermal zone.
/*
* A simple IC with a single temperature sensor.
*/
adc: sensor@0x49 {
adc: sensor@49 {
...
#thermal-sensor-cells = <0>;
};
@ -458,7 +458,7 @@ ocp {
/*
* A simple IC with a single bandgap temperature sensor.
*/
bandgap0: bandgap@0x0000ED00 {
bandgap0: bandgap@0000ED00 {
...
#thermal-sensor-cells = <0>;
};
@ -516,7 +516,7 @@ with many sensors and many cooling devices.
/*
* An IC with several temperature sensor.
*/
adc_dummy: sensor@0x50 {
adc_dummy: sensor@50 {
...
#thermal-sensor-cells = <1>; /* sensor internal ID */
};

4
Documentation/devicetree/bindings/ufs/ufs-qcom.txt
View File

@ -32,7 +32,7 @@ Optional properties:
Example:
ufsphy1: ufsphy@0xfc597000 {
ufsphy1: ufsphy@fc597000 {
compatible = "qcom,ufs-phy-qmp-20nm";
reg = <0xfc597000 0x800>;
reg-names = "phy_mem";
@ -53,7 +53,7 @@ Example:
<&clock_gcc clk_gcc_ufs_rx_cfg_clk>;
};
ufshc@0xfc598000 {
ufshc@fc598000 {
...
phys = <&ufsphy1>;
phy-names = "ufsphy";

2
Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
View File

@ -46,7 +46,7 @@ Note: If above properties are not defined it can be assumed that the supply
regulators or clocks are always on.
Example:
ufshc@0xfc598000 {
ufshc@fc598000 {
compatible = "jedec,ufs-1.1";
reg = <0xfc598000 0x800>;
interrupts = <0 28 0>;

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