pinctrl: rockchip: use regmaps instead of raw mappings
This allows us to use syscons in the future. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Max Schwarz <max.schwarz@online.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>hifive-unleashed-5.1
Heiko Stübner
Linus Walleij
parent
bfc7a42a0e
commit
751a99aba4
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@ -275,6 +275,7 @@ config PINCTRL_ROCKCHIP
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select PINMUX
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select GENERIC_PINCONF
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select GENERIC_IRQ_CHIP
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select MFD_SYSCON
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config PINCTRL_SINGLE
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tristate "One-register-per-pin type device tree based pinctrl driver"
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@ -37,6 +37,7 @@
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/clk.h>
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#include <linux/regmap.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include "core.h"
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@ -86,7 +87,7 @@ enum rockchip_pin_bank_type {
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*/
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struct rockchip_pin_bank {
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void __iomem *reg_base;
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void __iomem *reg_pull;
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struct regmap *regmap_pull;
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struct clk *clk;
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int irq;
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u32 pin_base;
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@ -120,8 +121,9 @@ struct rockchip_pin_ctrl {
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char *label;
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enum rockchip_pinctrl_type type;
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int mux_offset;
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void (*pull_calc_reg)(struct rockchip_pin_bank *bank, int pin_num,
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void __iomem **reg, u8 *bit);
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void (*pull_calc_reg)(struct rockchip_pin_bank *bank,
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int pin_num, struct regmap **regmap,
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int *reg, u8 *bit);
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};
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struct rockchip_pin_config {
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@ -159,9 +161,9 @@ struct rockchip_pmx_func {
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};
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struct rockchip_pinctrl {
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void __iomem *reg_base;
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struct regmap *regmap_base;
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int reg_size;
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void __iomem *reg_pull;
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struct regmap *regmap_pull;
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struct device *dev;
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struct rockchip_pin_ctrl *ctrl;
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struct pinctrl_desc pctl;
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@ -172,6 +174,12 @@ struct rockchip_pinctrl {
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unsigned int nfunctions;
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};
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static struct regmap_config rockchip_regmap_config = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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};
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static inline struct rockchip_pin_bank *gc_to_pin_bank(struct gpio_chip *gc)
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{
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return container_of(gc, struct rockchip_pin_bank, gpio_chip);
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@ -333,18 +341,24 @@ static const struct pinctrl_ops rockchip_pctrl_ops = {
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static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
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{
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struct rockchip_pinctrl *info = bank->drvdata;
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void __iomem *reg = info->reg_base + info->ctrl->mux_offset;
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unsigned int val;
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int reg, ret;
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u8 bit;
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if (bank->bank_type == RK3188_BANK0 && pin < 16)
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return RK_FUNC_GPIO;
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/* get basic quadrupel of mux registers and the correct reg inside */
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reg = info->ctrl->mux_offset;
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reg += bank->bank_num * 0x10;
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reg += (pin / 8) * 4;
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bit = (pin % 8) * 2;
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return ((readl(reg) >> bit) & 3);
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ret = regmap_read(info->regmap_base, reg, &val);
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if (ret)
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return ret;
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return ((val >> bit) & 3);
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}
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/*
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@ -363,7 +377,7 @@ static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
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static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
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{
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struct rockchip_pinctrl *info = bank->drvdata;
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void __iomem *reg = info->reg_base + info->ctrl->mux_offset;
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int reg, ret;
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unsigned long flags;
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u8 bit;
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u32 data;
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@ -386,6 +400,7 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
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bank->bank_num, pin, mux);
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/* get basic quadrupel of mux registers and the correct reg inside */
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reg = info->ctrl->mux_offset;
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reg += bank->bank_num * 0x10;
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reg += (pin / 8) * 4;
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bit = (pin % 8) * 2;
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@ -394,11 +409,11 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
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data = (3 << (bit + 16));
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data |= (mux & 3) << bit;
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writel(data, reg);
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ret = regmap_write(info->regmap_base, reg, data);
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spin_unlock_irqrestore(&bank->slock, flags);
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return 0;
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return ret;
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}
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#define RK2928_PULL_OFFSET 0x118
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@ -406,11 +421,13 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
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#define RK2928_PULL_BANK_STRIDE 8
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static void rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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int pin_num, void __iomem **reg, u8 *bit)
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int pin_num, struct regmap **regmap,
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int *reg, u8 *bit)
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{
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struct rockchip_pinctrl *info = bank->drvdata;
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*reg = info->reg_base + RK2928_PULL_OFFSET;
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*regmap = info->regmap_base;
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*reg = RK2928_PULL_OFFSET;
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*reg += bank->bank_num * RK2928_PULL_BANK_STRIDE;
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*reg += (pin_num / RK2928_PULL_PINS_PER_REG) * 4;
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@ -423,19 +440,23 @@ static void rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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#define RK3188_PULL_BANK_STRIDE 16
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static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
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int pin_num, void __iomem **reg, u8 *bit)
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int pin_num, struct regmap **regmap,
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int *reg, u8 *bit)
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{
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struct rockchip_pinctrl *info = bank->drvdata;
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/* The first 12 pins of the first bank are located elsewhere */
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if (bank->bank_type == RK3188_BANK0 && pin_num < 12) {
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*reg = bank->reg_pull +
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((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
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*regmap = bank->regmap_pull;
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*reg = 0;
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*reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4);
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*bit = pin_num % RK3188_PULL_PINS_PER_REG;
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*bit *= RK3188_PULL_BITS_PER_PIN;
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} else {
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*reg = info->reg_pull ? info->reg_pull
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: info->reg_base + RK3188_PULL_OFFSET;
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*regmap = info->regmap_pull ? info->regmap_pull
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: info->regmap_base;
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*reg = info->regmap_pull ? 0 : RK3188_PULL_OFFSET;
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/* correct the offset, as it is the 2nd pull register */
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*reg -= 4;
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*reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
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@ -455,7 +476,8 @@ static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num)
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{
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struct rockchip_pinctrl *info = bank->drvdata;
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struct rockchip_pin_ctrl *ctrl = info->ctrl;
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void __iomem *reg;
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struct regmap *regmap;
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int reg, ret;
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u8 bit;
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u32 data;
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@ -463,15 +485,19 @@ static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num)
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if (ctrl->type == RK3066B)
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return PIN_CONFIG_BIAS_DISABLE;
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ctrl->pull_calc_reg(bank, pin_num, ®, &bit);
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ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit);
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ret = regmap_read(regmap, reg, &data);
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if (ret)
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return ret;
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switch (ctrl->type) {
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case RK2928:
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return !(readl_relaxed(reg) & BIT(bit))
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return !(data & BIT(bit))
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? PIN_CONFIG_BIAS_PULL_PIN_DEFAULT
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: PIN_CONFIG_BIAS_DISABLE;
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case RK3188:
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data = readl_relaxed(reg) >> bit;
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data >>= bit;
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data &= (1 << RK3188_PULL_BITS_PER_PIN) - 1;
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switch (data) {
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@ -498,7 +524,8 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
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{
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struct rockchip_pinctrl *info = bank->drvdata;
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struct rockchip_pin_ctrl *ctrl = info->ctrl;
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void __iomem *reg;
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struct regmap *regmap;
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int reg, ret;
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unsigned long flags;
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u8 bit;
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u32 data;
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@ -510,7 +537,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
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if (ctrl->type == RK3066B)
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return pull ? -EINVAL : 0;
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ctrl->pull_calc_reg(bank, pin_num, ®, &bit);
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ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit);
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switch (ctrl->type) {
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case RK2928:
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@ -519,7 +546,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
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data = BIT(bit + 16);
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if (pull == PIN_CONFIG_BIAS_DISABLE)
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data |= BIT(bit);
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writel(data, reg);
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ret = regmap_write(regmap, reg, data);
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spin_unlock_irqrestore(&bank->slock, flags);
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break;
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@ -548,7 +575,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
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return -EINVAL;
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}
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writel(data, reg);
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ret = regmap_write(regmap, reg, data);
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spin_unlock_irqrestore(&bank->slock, flags);
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break;
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@ -557,7 +584,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
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return -EINVAL;
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}
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return 0;
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return ret;
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}
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/*
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@ -1416,6 +1443,7 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank,
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struct device *dev)
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{
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struct resource res;
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void __iomem *base;
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if (of_address_to_resource(bank->of_node, 0, &res)) {
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dev_err(dev, "cannot find IO resource for bank\n");
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@ -1440,9 +1468,14 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank,
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return -ENOENT;
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}
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bank->reg_pull = devm_ioremap_resource(dev, &res);
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if (IS_ERR(bank->reg_pull))
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return PTR_ERR(bank->reg_pull);
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base = devm_ioremap_resource(dev, &res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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rockchip_regmap_config.max_register = resource_size(&res) - 4;
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rockchip_regmap_config.name = "rockchip,rk3188-gpio-bank0-pull";
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bank->regmap_pull = devm_regmap_init_mmio(dev, base,
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&rockchip_regmap_config);
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} else {
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bank->bank_type = COMMON_BANK;
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}
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@ -1507,6 +1540,7 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev)
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struct device *dev = &pdev->dev;
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struct rockchip_pin_ctrl *ctrl;
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struct resource *res;
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void __iomem *base;
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int ret;
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if (!dev->of_node) {
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@ -1527,19 +1561,29 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev)
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info->dev = dev;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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info->reg_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(info->reg_base))
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return PTR_ERR(info->reg_base);
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base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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rockchip_regmap_config.max_register = resource_size(res) - 4;
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rockchip_regmap_config.name = "rockchip,pinctrl";
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info->regmap_base = devm_regmap_init_mmio(&pdev->dev, base,
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&rockchip_regmap_config);
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/* to check for the old dt-bindings */
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info->reg_size = resource_size(res);
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/* Honor the old binding, with pull registers as 2nd resource */
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if (ctrl->type == RK3188 && info->reg_size < 0x200) {
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if (ctrl->type == RK3188 && info->reg_size < 0x200) {
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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info->reg_pull = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(info->reg_pull))
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return PTR_ERR(info->reg_pull);
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base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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rockchip_regmap_config.max_register = resource_size(res) - 4;
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rockchip_regmap_config.name = "rockchip,pinctrl-pull";
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info->regmap_pull = devm_regmap_init_mmio(&pdev->dev, base,
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&rockchip_regmap_config);
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}
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ret = rockchip_gpiolib_register(pdev, info);
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