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ucc_geth: Fix interrupt coalescing size and alignment 

The rx interrupt coalescing table alignment was "guessed" to be 4,
but should be 64. The size should be 8 * number of queues + 4.
Verified in the MPC8323E manual.

Signed-off-by: Michael Barkowski <Michael.Barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
hifive-unleashed-5.1
Michael Barkowski 2007-04-13 01:26:15 -05:00 committed by Jeff Garzik
parent 702ff12ce7
commit 7563907eb8
2 changed files with 3 additions and 4 deletions
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4
drivers/net/ucc_geth.c
View File

@ -2958,8 +2958,8 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
/* Size varies with number of Rx queues */
ugeth->rx_irq_coalescing_tbl_offset =
qe_muram_alloc(ug_info->numQueuesRx *
sizeof(struct ucc_geth_rx_interrupt_coalescing_entry),
UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT);
sizeof(struct ucc_geth_rx_interrupt_coalescing_entry)
+ 4, UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT);
if (IS_MURAM_ERR(ugeth->rx_irq_coalescing_tbl_offset)) {
ugeth_err
("%s: Can not allocate DPRAM memory for"

3
drivers/net/ucc_geth.h
View File

@ -867,8 +867,7 @@ struct ucc_geth_hardware_statistics {
#define UCC_GETH_SCHEDULER_ALIGNMENT 4 /* This is a guess */
#define UCC_GETH_TX_STATISTICS_ALIGNMENT 4 /* This is a guess */
#define UCC_GETH_RX_STATISTICS_ALIGNMENT 4 /* This is a guess */
#define UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT 4 /* This is a
guess */
#define UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT 64
#define UCC_GETH_RX_BD_QUEUES_ALIGNMENT 8 /* This is a guess */
#define UCC_GETH_RX_PREFETCHED_BDS_ALIGNMENT 128 /* This is a guess */
#define UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT 4 /* This