regmap: cache: Write consecutive registers in a single block write
When syncing blocks of data using raw writes combine the writes into a single block write, saving us bus overhead for setup, addressing and teardown. Currently the block write is done unconditionally as it is expected that hardware which has a register format which can support raw writes will support auto incrementing writes, this decision may need to be revised in future. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
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@ -579,42 +579,72 @@ static int regcache_sync_block_single(struct regmap *map, void *block,
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return 0;
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}
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static int regcache_sync_block_raw_flush(struct regmap *map, const void **data,
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unsigned int base, unsigned int cur)
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{
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size_t val_bytes = map->format.val_bytes;
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int ret, count;
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if (*data == NULL)
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return 0;
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count = cur - base;
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dev_dbg(map->dev, "Writing %d bytes for %d registers from 0x%x-0x%x\n",
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count * val_bytes, count, base, cur - 1);
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map->cache_bypass = 1;
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ret = _regmap_raw_write(map, base, *data, count * val_bytes,
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false);
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map->cache_bypass = 0;
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*data = NULL;
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return ret;
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}
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int regcache_sync_block_raw(struct regmap *map, void *block,
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unsigned int block_base, unsigned int start,
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unsigned int end)
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{
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unsigned int i, regtmp, val;
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const void *addr;
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unsigned int i, val;
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unsigned int regtmp = 0;
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unsigned int base = 0;
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const void *data = NULL;
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int ret;
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for (i = start; i < end; i++) {
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regtmp = block_base + (i * map->reg_stride);
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if (!regcache_reg_present(map, regtmp))
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if (!regcache_reg_present(map, regtmp)) {
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ret = regcache_sync_block_raw_flush(map, &data,
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base, regtmp);
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if (ret != 0)
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return ret;
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continue;
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}
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val = regcache_get_val(map, block, i);
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/* Is this the hardware default? If so skip. */
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ret = regcache_lookup_reg(map, regtmp);
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if (ret >= 0 && val == map->reg_defaults[ret].def)
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continue;
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map->cache_bypass = 1;
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addr = regcache_get_val_addr(map, block, i);
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ret = _regmap_raw_write(map, regtmp, addr,
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map->format.val_bytes,
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false);
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map->cache_bypass = 0;
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if (ret >= 0 && val == map->reg_defaults[ret].def) {
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ret = regcache_sync_block_raw_flush(map, &data,
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base, regtmp);
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if (ret != 0)
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return ret;
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dev_dbg(map->dev, "Synced register %#x, value %#x\n",
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regtmp, val);
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continue;
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}
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return 0;
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if (!data) {
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data = regcache_get_val_addr(map, block, i);
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base = regtmp;
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}
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}
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return regcache_sync_block_raw_flush(map, &data, base, regtmp);
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}
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int regcache_sync_block(struct regmap *map, void *block,
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