net: stmmac: Implement RSS and enable it in XGMAC core
Implement the RSS functionality and add the corresponding callbacks in XGMAC core. Changes from v1: - Do not use magic constants (Jakub) - Use ethtool_rxfh_indir_default() (Jakub) Signed-off-by: Jose Abreu <joabreu@synopsys.com> Signed-off-by: David S. Miller <davem@davemloft.net>alistair/sunxi64-5.4-dsi
Jose Abreu
David S. Miller
parent
7035aad875
commit
76067459c6
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@ -354,6 +354,7 @@ struct dma_features {
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unsigned int frpbs;
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unsigned int frpes;
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unsigned int addr64;
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unsigned int rssen;
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};
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/* GMAC TX FIFO is 8K, Rx FIFO is 16K */
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@ -381,6 +382,10 @@ struct dma_features {
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#define JUMBO_LEN 9000
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/* Receive Side Scaling */
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#define STMMAC_RSS_HASH_KEY_SIZE 40
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#define STMMAC_RSS_MAX_TABLE_SIZE 256
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extern const struct stmmac_desc_ops enh_desc_ops;
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extern const struct stmmac_desc_ops ndesc_ops;
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@ -89,6 +89,7 @@
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#define XGMAC_HWFEAT_RWKSEL BIT(6)
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#define XGMAC_HWFEAT_GMIISEL BIT(1)
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#define XGMAC_HW_FEATURE1 0x00000120
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#define XGMAC_HWFEAT_RSSEN BIT(20)
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#define XGMAC_HWFEAT_TSOEN BIT(18)
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#define XGMAC_HWFEAT_ADDR64 GENMASK(15, 14)
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#define XGMAC_HWFEAT_TXFIFOSIZE GENMASK(10, 6)
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@ -109,6 +110,17 @@
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#define XGMAC_DCS_SHIFT 16
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#define XGMAC_ADDRx_LOW(x) (0x00000304 + (x) * 0x8)
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#define XGMAC_ARP_ADDR 0x00000c10
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#define XGMAC_RSS_CTRL 0x00000c80
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#define XGMAC_UDP4TE BIT(3)
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#define XGMAC_TCP4TE BIT(2)
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#define XGMAC_IP2TE BIT(1)
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#define XGMAC_RSSE BIT(0)
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#define XGMAC_RSS_ADDR 0x00000c88
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#define XGMAC_RSSIA_SHIFT 8
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#define XGMAC_ADDRT BIT(2)
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#define XGMAC_CT BIT(1)
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#define XGMAC_OB BIT(0)
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#define XGMAC_RSS_DATA 0x00000c8c
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#define XGMAC_TIMESTAMP_STATUS 0x00000d20
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#define XGMAC_TXTSC BIT(15)
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#define XGMAC_TXTIMESTAMP_NSEC 0x00000d30
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@ -125,8 +137,9 @@
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#define XGMAC_MTL_INT_STATUS 0x00001020
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#define XGMAC_MTL_RXQ_DMA_MAP0 0x00001030
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#define XGMAC_MTL_RXQ_DMA_MAP1 0x00001034
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#define XGMAC_QxMDMACH(x) GENMASK((x) * 8 + 3, (x) * 8)
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#define XGMAC_QxMDMACH(x) GENMASK((x) * 8 + 7, (x) * 8)
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#define XGMAC_QxMDMACH_SHIFT(x) ((x) * 8)
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#define XGMAC_QDDMACH BIT(7)
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#define XGMAC_TC_PRTY_MAP0 0x00001040
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#define XGMAC_TC_PRTY_MAP1 0x00001044
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#define XGMAC_PSTC(x) GENMASK((x) * 8 + 7, (x) * 8)
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@ -261,6 +274,13 @@
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#define XGMAC_RDES3_IOC BIT(30)
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#define XGMAC_RDES3_LD BIT(28)
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#define XGMAC_RDES3_CDA BIT(27)
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#define XGMAC_RDES3_RSV BIT(26)
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#define XGMAC_RDES3_L34T GENMASK(23, 20)
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#define XGMAC_RDES3_L34T_SHIFT 20
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#define XGMAC_L34T_IP4TCP 0x1
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#define XGMAC_L34T_IP4UDP 0x2
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#define XGMAC_L34T_IP6TCP 0x9
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#define XGMAC_L34T_IP6UDP 0xA
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#define XGMAC_RDES3_ES BIT(15)
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#define XGMAC_RDES3_PL GENMASK(13, 0)
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#define XGMAC_RDES3_TSD BIT(6)
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@ -6,6 +6,7 @@
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#include <linux/bitrev.h>
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#include <linux/crc32.h>
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#include <linux/iopoll.h>
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#include "stmmac.h"
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#include "dwxgmac2.h"
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@ -439,6 +440,56 @@ static void dwxgmac2_set_mac_loopback(void __iomem *ioaddr, bool enable)
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writel(value, ioaddr + XGMAC_RX_CONFIG);
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}
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static int dwxgmac2_rss_write_reg(void __iomem *ioaddr, bool is_key, int idx,
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u32 val)
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{
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u32 ctrl = 0;
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writel(val, ioaddr + XGMAC_RSS_DATA);
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ctrl |= idx << XGMAC_RSSIA_SHIFT;
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ctrl |= is_key ? XGMAC_ADDRT : 0x0;
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ctrl |= XGMAC_OB;
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writel(ctrl, ioaddr + XGMAC_RSS_ADDR);
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return readl_poll_timeout(ioaddr + XGMAC_RSS_ADDR, ctrl,
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!(ctrl & XGMAC_OB), 100, 10000);
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}
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static int dwxgmac2_rss_configure(struct mac_device_info *hw,
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struct stmmac_rss *cfg, u32 num_rxq)
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{
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void __iomem *ioaddr = hw->pcsr;
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u32 *key = (u32 *)cfg->key;
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int i, ret;
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u32 value;
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value = readl(ioaddr + XGMAC_RSS_CTRL);
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if (!cfg->enable) {
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value &= ~XGMAC_RSSE;
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writel(value, ioaddr + XGMAC_RSS_CTRL);
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return 0;
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}
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for (i = 0; i < (sizeof(cfg->key) / sizeof(u32)); i++) {
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ret = dwxgmac2_rss_write_reg(ioaddr, true, i, *key++);
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if (ret)
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return ret;
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}
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for (i = 0; i < ARRAY_SIZE(cfg->table); i++) {
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ret = dwxgmac2_rss_write_reg(ioaddr, false, i, cfg->table[i]);
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if (ret)
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return ret;
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}
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for (i = 0; i < num_rxq; i++)
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dwxgmac2_map_mtl_to_dma(hw, i, XGMAC_QDDMACH);
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value |= XGMAC_UDP4TE | XGMAC_TCP4TE | XGMAC_IP2TE | XGMAC_RSSE;
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writel(value, ioaddr + XGMAC_RSS_CTRL);
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return 0;
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}
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const struct stmmac_ops dwxgmac210_ops = {
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.core_init = dwxgmac2_core_init,
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.set_mac = dwxgmac2_set_mac,
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@ -469,6 +520,7 @@ const struct stmmac_ops dwxgmac210_ops = {
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.debug = NULL,
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.set_filter = dwxgmac2_set_filter,
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.set_mac_loopback = dwxgmac2_set_mac_loopback,
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.rss_configure = dwxgmac2_rss_configure,
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};
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int dwxgmac2_setup(struct stmmac_priv *priv)
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@ -254,6 +254,34 @@ static void dwxgmac2_clear(struct dma_desc *p)
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p->des3 = 0;
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}
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static int dwxgmac2_get_rx_hash(struct dma_desc *p, u32 *hash,
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enum pkt_hash_types *type)
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{
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unsigned int rdes3 = le32_to_cpu(p->des3);
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u32 ptype;
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if (rdes3 & XGMAC_RDES3_RSV) {
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ptype = (rdes3 & XGMAC_RDES3_L34T) >> XGMAC_RDES3_L34T_SHIFT;
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switch (ptype) {
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case XGMAC_L34T_IP4TCP:
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case XGMAC_L34T_IP4UDP:
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case XGMAC_L34T_IP6TCP:
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case XGMAC_L34T_IP6UDP:
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*type = PKT_HASH_TYPE_L4;
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break;
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default:
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*type = PKT_HASH_TYPE_L3;
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break;
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}
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*hash = le32_to_cpu(p->des1);
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return 0;
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}
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return -EINVAL;
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}
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const struct stmmac_desc_ops dwxgmac210_desc_ops = {
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.tx_status = dwxgmac2_get_tx_status,
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.rx_status = dwxgmac2_get_rx_status,
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@ -277,4 +305,5 @@ const struct stmmac_desc_ops dwxgmac210_desc_ops = {
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.get_addr = dwxgmac2_get_addr,
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.set_addr = dwxgmac2_set_addr,
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.clear = dwxgmac2_clear,
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.get_rx_hash = dwxgmac2_get_rx_hash,
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};
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@ -363,6 +363,7 @@ static void dwxgmac2_get_hw_feature(void __iomem *ioaddr,
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/* MAC HW feature 1 */
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hw_cap = readl(ioaddr + XGMAC_HW_FEATURE1);
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dma_cap->rssen = (hw_cap & XGMAC_HWFEAT_RSSEN) >> 20;
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dma_cap->tsoen = (hw_cap & XGMAC_HWFEAT_TSOEN) >> 18;
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dma_cap->addr64 = (hw_cap & XGMAC_HWFEAT_ADDR64) >> 14;
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@ -86,6 +86,9 @@ struct stmmac_desc_ops {
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void (*set_addr)(struct dma_desc *p, dma_addr_t addr);
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/* clear descriptor */
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void (*clear)(struct dma_desc *p);
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/* RSS */
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int (*get_rx_hash)(struct dma_desc *p, u32 *hash,
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enum pkt_hash_types *type);
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};
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#define stmmac_init_rx_desc(__priv, __args...) \
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@ -136,6 +139,8 @@ struct stmmac_desc_ops {
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stmmac_do_void_callback(__priv, desc, set_addr, __args)
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#define stmmac_clear_desc(__priv, __args...) \
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stmmac_do_void_callback(__priv, desc, clear, __args)
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#define stmmac_get_rx_hash(__priv, __args...) \
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stmmac_do_callback(__priv, desc, get_rx_hash, __args)
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struct stmmac_dma_cfg;
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struct dma_features;
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@ -249,6 +254,7 @@ struct rgmii_adv;
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struct stmmac_safety_stats;
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struct stmmac_tc_entry;
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struct stmmac_pps_cfg;
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struct stmmac_rss;
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/* Helpers to program the MAC core */
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struct stmmac_ops {
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@ -327,6 +333,9 @@ struct stmmac_ops {
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u32 sub_second_inc, u32 systime_flags);
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/* Loopback for selftests */
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void (*set_mac_loopback)(void __iomem *ioaddr, bool enable);
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/* RSS */
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int (*rss_configure)(struct mac_device_info *hw,
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struct stmmac_rss *cfg, u32 num_rxq);
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};
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#define stmmac_core_init(__priv, __args...) \
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@ -397,6 +406,8 @@ struct stmmac_ops {
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stmmac_do_callback(__priv, mac, flex_pps_config, __args)
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#define stmmac_set_mac_loopback(__priv, __args...) \
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stmmac_do_void_callback(__priv, mac, set_mac_loopback, __args)
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#define stmmac_rss_configure(__priv, __args...) \
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stmmac_do_callback(__priv, mac, rss_configure, __args)
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/* PTP and HW Timer helpers */
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struct stmmac_hwtimestamp {
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@ -113,6 +113,12 @@ struct stmmac_pps_cfg {
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struct timespec64 period;
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};
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struct stmmac_rss {
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int enable;
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u8 key[STMMAC_RSS_HASH_KEY_SIZE];
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u32 table[STMMAC_RSS_MAX_TABLE_SIZE];
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};
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struct stmmac_priv {
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/* Frequently used values are kept adjacent for cache effect */
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u32 tx_coal_frames;
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@ -203,6 +209,9 @@ struct stmmac_priv {
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/* Pulse Per Second output */
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struct stmmac_pps_cfg pps[STMMAC_PPS_MAX];
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/* Receive Side Scaling */
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struct stmmac_rss rss;
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};
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enum stmmac_state {
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@ -764,6 +764,76 @@ static int stmmac_set_coalesce(struct net_device *dev,
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return 0;
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}
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static int stmmac_get_rxnfc(struct net_device *dev,
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struct ethtool_rxnfc *rxnfc, u32 *rule_locs)
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{
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struct stmmac_priv *priv = netdev_priv(dev);
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switch (rxnfc->cmd) {
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case ETHTOOL_GRXRINGS:
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rxnfc->data = priv->plat->rx_queues_to_use;
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break;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static u32 stmmac_get_rxfh_key_size(struct net_device *dev)
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{
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struct stmmac_priv *priv = netdev_priv(dev);
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return sizeof(priv->rss.key);
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}
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static u32 stmmac_get_rxfh_indir_size(struct net_device *dev)
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{
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struct stmmac_priv *priv = netdev_priv(dev);
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return ARRAY_SIZE(priv->rss.table);
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}
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static int stmmac_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
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u8 *hfunc)
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{
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struct stmmac_priv *priv = netdev_priv(dev);
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int i;
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if (indir) {
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for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
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indir[i] = priv->rss.table[i];
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}
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if (key)
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memcpy(key, priv->rss.key, sizeof(priv->rss.key));
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if (hfunc)
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*hfunc = ETH_RSS_HASH_TOP;
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return 0;
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}
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static int stmmac_set_rxfh(struct net_device *dev, const u32 *indir,
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const u8 *key, const u8 hfunc)
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{
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struct stmmac_priv *priv = netdev_priv(dev);
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int i;
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if ((hfunc != ETH_RSS_HASH_NO_CHANGE) && (hfunc != ETH_RSS_HASH_TOP))
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return -EOPNOTSUPP;
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if (indir) {
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for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
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priv->rss.table[i] = indir[i];
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}
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if (key)
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memcpy(priv->rss.key, key, sizeof(priv->rss.key));
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return stmmac_rss_configure(priv, priv->hw, &priv->rss,
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priv->plat->rx_queues_to_use);
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}
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static int stmmac_get_ts_info(struct net_device *dev,
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struct ethtool_ts_info *info)
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{
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@ -855,6 +925,11 @@ static const struct ethtool_ops stmmac_ethtool_ops = {
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.get_eee = stmmac_ethtool_op_get_eee,
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.set_eee = stmmac_ethtool_op_set_eee,
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.get_sset_count = stmmac_get_sset_count,
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.get_rxnfc = stmmac_get_rxnfc,
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.get_rxfh_key_size = stmmac_get_rxfh_key_size,
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.get_rxfh_indir_size = stmmac_get_rxfh_indir_size,
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.get_rxfh = stmmac_get_rxfh,
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.set_rxfh = stmmac_set_rxfh,
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.get_ts_info = stmmac_get_ts_info,
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.get_coalesce = stmmac_get_coalesce,
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.set_coalesce = stmmac_set_coalesce,
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@ -2417,6 +2417,22 @@ static void stmmac_mac_config_rx_queues_routing(struct stmmac_priv *priv)
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}
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}
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static void stmmac_mac_config_rss(struct stmmac_priv *priv)
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{
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if (!priv->dma_cap.rssen || !priv->plat->rss_en) {
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priv->rss.enable = false;
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return;
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}
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if (priv->dev->features & NETIF_F_RXHASH)
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priv->rss.enable = true;
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else
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priv->rss.enable = false;
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stmmac_rss_configure(priv, priv->hw, &priv->rss,
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priv->plat->rx_queues_to_use);
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}
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/**
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* stmmac_mtl_configuration - Configure MTL
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* @priv: driver private structure
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@ -2461,6 +2477,10 @@ static void stmmac_mtl_configuration(struct stmmac_priv *priv)
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/* Set RX routing */
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if (rx_queues_count > 1)
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stmmac_mac_config_rx_queues_routing(priv);
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/* Receive Side Scaling */
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if (rx_queues_count > 1)
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stmmac_mac_config_rss(priv);
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}
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static void stmmac_safety_feat_configuration(struct stmmac_priv *priv)
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@ -3385,9 +3405,11 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
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priv->dev->stats.rx_errors++;
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buf->page = NULL;
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} else {
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enum pkt_hash_types hash_type;
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struct sk_buff *skb;
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int frame_len;
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unsigned int des;
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int frame_len;
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u32 hash;
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stmmac_get_desc_addr(priv, p, &des);
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frame_len = stmmac_get_rx_frame_len(priv, p, coe);
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|
@ -3452,6 +3474,10 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
|
|||
else
|
||||
skb->ip_summed = CHECKSUM_UNNECESSARY;
|
||||
|
||||
if (!stmmac_get_rx_hash(priv, p, &hash, &hash_type))
|
||||
skb_set_hash(skb, hash, hash_type);
|
||||
|
||||
skb_record_rx_queue(skb, queue);
|
||||
napi_gro_receive(&ch->rx_napi, skb);
|
||||
|
||||
/* Data payload copied into SKB, page ready for recycle */
|
||||
|
|
@ -4175,8 +4201,8 @@ int stmmac_dvr_probe(struct device *device,
|
|||
{
|
||||
struct net_device *ndev = NULL;
|
||||
struct stmmac_priv *priv;
|
||||
u32 queue, maxq;
|
||||
int ret = 0;
|
||||
u32 queue, rxq, maxq;
|
||||
int i, ret = 0;
|
||||
|
||||
ndev = devm_alloc_etherdev_mqs(device, sizeof(struct stmmac_priv),
|
||||
MTL_MAX_TX_QUEUES, MTL_MAX_RX_QUEUES);
|
||||
|
|
@ -4284,6 +4310,15 @@ int stmmac_dvr_probe(struct device *device,
|
|||
#endif
|
||||
priv->msg_enable = netif_msg_init(debug, default_msg_level);
|
||||
|
||||
/* Initialize RSS */
|
||||
rxq = priv->plat->rx_queues_to_use;
|
||||
netdev_rss_key_fill(priv->rss.key, sizeof(priv->rss.key));
|
||||
for (i = 0; i < ARRAY_SIZE(priv->rss.table); i++)
|
||||
priv->rss.table[i] = ethtool_rxfh_indir_default(i, rxq);
|
||||
|
||||
if (priv->dma_cap.rssen && priv->plat->rss_en)
|
||||
ndev->features |= NETIF_F_RXHASH;
|
||||
|
||||
/* MTU range: 46 - hw-specific max */
|
||||
ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
|
||||
if ((priv->plat->enh_desc) || (priv->synopsys_id >= DWMAC_CORE_4_00))
|
||||
|
|
|
|||
|
|
@ -173,6 +173,7 @@ struct plat_stmmacenet_data {
|
|||
int has_gmac4;
|
||||
bool has_sun8i;
|
||||
bool tso_en;
|
||||
int rss_en;
|
||||
int mac_port_sel_speed;
|
||||
bool en_tx_lpi_clockgating;
|
||||
int has_xgmac;
|
||||
|
|
|
|||
Loading…
Reference in New Issue