ASoC: ti: davinci-mcasp: Support for auxclk-fs-ratio
When McASP is bus master and it's AUXCLK clock is not static, but it is a multiple of the frame sync the constraint rules should take it account when validating possible stream formats. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -100,6 +100,7 @@ struct davinci_mcasp {
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int sysclk_freq;
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bool bclk_master;
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u32 auxclk_fs_ratio;
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unsigned long pdir; /* Pin direction bitfield */
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@ -1064,13 +1065,13 @@ static int mcasp_dit_hw_param(struct davinci_mcasp *mcasp,
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}
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static int davinci_mcasp_calc_clk_div(struct davinci_mcasp *mcasp,
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unsigned int sysclk_freq,
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unsigned int bclk_freq, bool set)
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{
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int error_ppm;
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unsigned int sysclk_freq = mcasp->sysclk_freq;
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u32 reg = mcasp_get_reg(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG);
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int div = sysclk_freq / bclk_freq;
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int rem = sysclk_freq % bclk_freq;
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int error_ppm;
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int aux_div = 1;
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if (div > (ACLKXDIV_MASK + 1)) {
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@ -1175,7 +1176,8 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
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if (mcasp->slot_width)
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sbits = mcasp->slot_width;
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davinci_mcasp_calc_clk_div(mcasp, rate * sbits * slots, true);
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davinci_mcasp_calc_clk_div(mcasp, mcasp->sysclk_freq,
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rate * sbits * slots, true);
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}
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ret = mcasp_common_hw_param(mcasp, substream->stream,
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@ -1282,12 +1284,19 @@ static int davinci_mcasp_hw_rule_rate(struct snd_pcm_hw_params *params,
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for (i = 0; i < ARRAY_SIZE(davinci_mcasp_dai_rates); i++) {
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if (snd_interval_test(ri, davinci_mcasp_dai_rates[i])) {
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uint bclk_freq = sbits*slots*
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davinci_mcasp_dai_rates[i];
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uint bclk_freq = sbits * slots *
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davinci_mcasp_dai_rates[i];
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unsigned int sysclk_freq;
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int ppm;
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ppm = davinci_mcasp_calc_clk_div(rd->mcasp, bclk_freq,
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false);
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if (rd->mcasp->auxclk_fs_ratio)
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sysclk_freq = davinci_mcasp_dai_rates[i] *
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rd->mcasp->auxclk_fs_ratio;
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else
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sysclk_freq = rd->mcasp->sysclk_freq;
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ppm = davinci_mcasp_calc_clk_div(rd->mcasp, sysclk_freq,
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bclk_freq, false);
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if (abs(ppm) < DAVINCI_MAX_RATE_ERROR_PPM) {
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if (range.empty) {
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range.min = davinci_mcasp_dai_rates[i];
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@ -1321,12 +1330,19 @@ static int davinci_mcasp_hw_rule_format(struct snd_pcm_hw_params *params,
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for (i = 0; i <= SNDRV_PCM_FORMAT_LAST; i++) {
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if (snd_mask_test(fmt, i)) {
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uint sbits = snd_pcm_format_width(i);
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unsigned int sysclk_freq;
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int ppm;
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if (rd->mcasp->auxclk_fs_ratio)
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sysclk_freq = rate *
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rd->mcasp->auxclk_fs_ratio;
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else
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sysclk_freq = rd->mcasp->sysclk_freq;
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if (rd->mcasp->slot_width)
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sbits = rd->mcasp->slot_width;
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ppm = davinci_mcasp_calc_clk_div(rd->mcasp,
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ppm = davinci_mcasp_calc_clk_div(rd->mcasp, sysclk_freq,
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sbits * slots * rate,
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false);
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if (abs(ppm) < DAVINCI_MAX_RATE_ERROR_PPM) {
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@ -1991,6 +2007,22 @@ static inline int davinci_mcasp_init_gpiochip(struct davinci_mcasp *mcasp)
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}
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#endif /* CONFIG_GPIOLIB */
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static int davinci_mcasp_get_dt_params(struct davinci_mcasp *mcasp)
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{
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struct device_node *np = mcasp->dev->of_node;
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int ret;
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u32 val;
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if (!np)
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return 0;
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ret = of_property_read_u32(np, "auxclk-fs-ratio", &val);
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if (ret >= 0)
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mcasp->auxclk_fs_ratio = val;
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return 0;
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}
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static int davinci_mcasp_probe(struct platform_device *pdev)
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{
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struct snd_dmaengine_dai_dma_data *dma_data;
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@ -2224,6 +2256,10 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
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if (ret)
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goto err;
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ret = davinci_mcasp_get_dt_params(mcasp);
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if (ret)
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return -EINVAL;
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ret = devm_snd_soc_register_component(&pdev->dev,
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&davinci_mcasp_component,
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&davinci_mcasp_dai[pdata->op_mode], 1);
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