net: ethernet: stmmac: Fix altr_tse_pcs SGMII Initialization
Fix NETDEV WATCHDOG timeout on startup by adding missing register writes that properly setup SGMII. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -37,6 +37,7 @@
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#define TSE_PCS_CONTROL_AN_EN_MASK BIT(12)
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#define TSE_PCS_CONTROL_REG 0x00
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#define TSE_PCS_CONTROL_RESTART_AN_MASK BIT(9)
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#define TSE_PCS_CTRL_AUTONEG_SGMII 0x1140
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#define TSE_PCS_IF_MODE_REG 0x28
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#define TSE_PCS_LINK_TIMER_0_REG 0x24
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#define TSE_PCS_LINK_TIMER_1_REG 0x26
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@ -65,6 +66,7 @@
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#define TSE_PCS_SW_RESET_TIMEOUT 100
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#define TSE_PCS_USE_SGMII_AN_MASK BIT(1)
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#define TSE_PCS_USE_SGMII_ENA BIT(0)
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#define TSE_PCS_IF_USE_SGMII 0x03
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#define SGMII_ADAPTER_CTRL_REG 0x00
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#define SGMII_ADAPTER_DISABLE 0x0001
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@ -101,7 +103,9 @@ int tse_pcs_init(void __iomem *base, struct tse_pcs *pcs)
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{
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int ret = 0;
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writew(TSE_PCS_USE_SGMII_ENA, base + TSE_PCS_IF_MODE_REG);
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writew(TSE_PCS_IF_USE_SGMII, base + TSE_PCS_IF_MODE_REG);
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writew(TSE_PCS_CTRL_AUTONEG_SGMII, base + TSE_PCS_CONTROL_REG);
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writew(TSE_PCS_SGMII_LINK_TIMER_0, base + TSE_PCS_LINK_TIMER_0_REG);
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writew(TSE_PCS_SGMII_LINK_TIMER_1, base + TSE_PCS_LINK_TIMER_1_REG);
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