drm/i915: Don't set the 8to6 dither flag when not scaling
Apparently we really only need this when the pfit is enabled, at least I couldn't dicern any difference here. Furthermore the hacks we have to reconstruct this bit is a bit glaring, and probably only works because we can't move the lvds port to any other pipe than pipe B on gen2/3. So let's just rip this out. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77137 (the LVDS WARNING log, not the main "VGA can't be turned on" issue). Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -111,13 +111,6 @@ static void intel_lvds_get_config(struct intel_encoder *encoder,
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pipe_config->adjusted_mode.flags |= flags;
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/* gen2/3 store dither state in pfit control, needs to match */
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if (INTEL_INFO(dev)->gen < 4) {
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tmp = I915_READ(PFIT_CONTROL);
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pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
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}
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dotclock = pipe_config->port_clock;
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if (HAS_PCH_SPLIT(dev_priv->dev))
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@ -308,16 +308,16 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
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pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
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PFIT_FILTER_FUZZY);
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/* Make sure pre-965 set dither correctly for 18bpp panels. */
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if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
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pfit_control |= PANEL_8TO6_DITHER_ENABLE;
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out:
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if ((pfit_control & PFIT_ENABLE) == 0) {
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pfit_control = 0;
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pfit_pgm_ratios = 0;
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}
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/* Make sure pre-965 set dither correctly for 18bpp panels. */
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if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
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pfit_control |= PANEL_8TO6_DITHER_ENABLE;
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pipe_config->gmch_pfit.control = pfit_control;
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pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
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pipe_config->gmch_pfit.lvds_border_bits = border;
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