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Merge branch 'pci/resource'

- Protect pci_reassign_bridge_resources() against concurrent
    addition/removal (Benjamin Herrenschmidt)

  - Fix bridge dma_ranges resource list cleanup (Rob Herring)

  - Add PCI_STD_NUM_BARS for the number of standard BARs (Denis Efremov)

  - Add "pci=hpmmiosize" and "pci=hpmmioprefsize" parameters to control the
    MMIO and prefetchable MMIO window sizes of hotplug bridges
    independently (Nicholas Johnson)

  - Fix MMIO/MMIO_PREF window assignment that assigned more space than
    desired (Nicholas Johnson)

  - Only enforce bus numbers from bridge EA if the bridge has EA devices
    downstream (Subbaraya Sundeep)

* pci/resource:
  PCI: Do not use bus number zero from EA capability
  PCI: Avoid double hpmemsize MMIO window assignment
  PCI: Add "pci=hpmmiosize" and "pci=hpmmioprefsize" parameters
  PCI: Add PCI_STD_NUM_BARS for the number of standard BARs
  PCI: Fix missing bridge dma_ranges resource list cleanup
  PCI: Protect pci_reassign_bridge_resources() against concurrent addition/removal
alistair/sunxi64-5.5-dsi
Bjorn Helgaas 2019-11-28 08:54:36 -06:00
commit 774800cb09
50 changed files with 195 additions and 147 deletions

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@ -3492,8 +3492,15 @@
hpiosize=nn[KMG] The fixed amount of bus space which is hpiosize=nn[KMG] The fixed amount of bus space which is
reserved for hotplug bridge's IO window. reserved for hotplug bridge's IO window.
Default size is 256 bytes. Default size is 256 bytes.
hpmmiosize=nn[KMG] The fixed amount of bus space which is
reserved for hotplug bridge's MMIO window.
Default size is 2 megabytes.
hpmmioprefsize=nn[KMG] The fixed amount of bus space which is
reserved for hotplug bridge's MMIO_PREF window.
Default size is 2 megabytes.
hpmemsize=nn[KMG] The fixed amount of bus space which is hpmemsize=nn[KMG] The fixed amount of bus space which is
reserved for hotplug bridge's memory window. reserved for hotplug bridge's MMIO and
MMIO_PREF window.
Default size is 2 megabytes. Default size is 2 megabytes.
hpbussize=nn The minimum amount of additional bus numbers hpbussize=nn The minimum amount of additional bus numbers
reserved for buses below a hotplug bridge. reserved for buses below a hotplug bridge.

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@ -71,10 +71,10 @@ static int pci_mmap_resource(struct kobject *kobj,
struct pci_bus_region bar; struct pci_bus_region bar;
int i; int i;
for (i = 0; i < PCI_ROM_RESOURCE; i++) for (i = 0; i < PCI_STD_NUM_BARS; i++)
if (res == &pdev->resource[i]) if (res == &pdev->resource[i])
break; break;
if (i >= PCI_ROM_RESOURCE) if (i >= PCI_STD_NUM_BARS)
return -ENODEV; return -ENODEV;
if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start)) if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
@ -115,7 +115,7 @@ void pci_remove_resource_files(struct pci_dev *pdev)
{ {
int i; int i;
for (i = 0; i < PCI_ROM_RESOURCE; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
struct bin_attribute *res_attr; struct bin_attribute *res_attr;
res_attr = pdev->res_attr[i]; res_attr = pdev->res_attr[i];
@ -232,7 +232,7 @@ int pci_create_resource_files(struct pci_dev *pdev)
int retval; int retval;
/* Expose the PCI resources from this device as files */ /* Expose the PCI resources from this device as files */
for (i = 0; i < PCI_ROM_RESOURCE; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
/* skip empty resources */ /* skip empty resources */
if (!pci_resource_len(pdev, i)) if (!pci_resource_len(pdev, i))

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@ -2,9 +2,6 @@
#ifndef __ASM_S390_PCI_H #ifndef __ASM_S390_PCI_H
#define __ASM_S390_PCI_H #define __ASM_S390_PCI_H
/* must be set before including pci_clp.h */
#define PCI_BAR_COUNT 6
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/mutex.h> #include <linux/mutex.h>
#include <linux/iommu.h> #include <linux/iommu.h>
@ -138,7 +135,7 @@ struct zpci_dev {
char res_name[16]; char res_name[16];
bool mio_capable; bool mio_capable;
struct zpci_bar_struct bars[PCI_BAR_COUNT]; struct zpci_bar_struct bars[PCI_STD_NUM_BARS];
u64 start_dma; /* Start of available DMA addresses */ u64 start_dma; /* Start of available DMA addresses */
u64 end_dma; /* End of available DMA addresses */ u64 end_dma; /* End of available DMA addresses */

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@ -77,7 +77,7 @@ struct mio_info {
struct { struct {
u64 wb; u64 wb;
u64 wt; u64 wt;
} addr[PCI_BAR_COUNT]; } addr[PCI_STD_NUM_BARS];
u32 reserved[6]; u32 reserved[6];
} __packed; } __packed;
@ -98,9 +98,9 @@ struct clp_rsp_query_pci {
u16 util_str_avail : 1; /* utility string available? */ u16 util_str_avail : 1; /* utility string available? */
u16 pfgid : 8; /* pci function group id */ u16 pfgid : 8; /* pci function group id */
u32 fid; /* pci function id */ u32 fid; /* pci function id */
u8 bar_size[PCI_BAR_COUNT]; u8 bar_size[PCI_STD_NUM_BARS];
u16 pchid; u16 pchid;
__le32 bar[PCI_BAR_COUNT]; __le32 bar[PCI_STD_NUM_BARS];
u8 pfip[CLP_PFIP_NR_SEGMENTS]; /* pci function internal path */ u8 pfip[CLP_PFIP_NR_SEGMENTS]; /* pci function internal path */
u32 : 16; u32 : 16;
u8 fmb_len; u8 fmb_len;

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@ -43,7 +43,7 @@ static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
static DEFINE_SPINLOCK(zpci_domain_lock); static DEFINE_SPINLOCK(zpci_domain_lock);
#define ZPCI_IOMAP_ENTRIES \ #define ZPCI_IOMAP_ENTRIES \
min(((unsigned long) ZPCI_NR_DEVICES * PCI_BAR_COUNT / 2), \ min(((unsigned long) ZPCI_NR_DEVICES * PCI_STD_NUM_BARS / 2), \
ZPCI_IOMAP_MAX_ENTRIES) ZPCI_IOMAP_MAX_ENTRIES)
static DEFINE_SPINLOCK(zpci_iomap_lock); static DEFINE_SPINLOCK(zpci_iomap_lock);
@ -294,7 +294,7 @@ static void __iomem *pci_iomap_range_mio(struct pci_dev *pdev, int bar,
void __iomem *pci_iomap_range(struct pci_dev *pdev, int bar, void __iomem *pci_iomap_range(struct pci_dev *pdev, int bar,
unsigned long offset, unsigned long max) unsigned long offset, unsigned long max)
{ {
if (!pci_resource_len(pdev, bar) || bar >= PCI_BAR_COUNT) if (bar >= PCI_STD_NUM_BARS || !pci_resource_len(pdev, bar))
return NULL; return NULL;
if (static_branch_likely(&have_mio)) if (static_branch_likely(&have_mio))
@ -324,7 +324,7 @@ static void __iomem *pci_iomap_wc_range_mio(struct pci_dev *pdev, int bar,
void __iomem *pci_iomap_wc_range(struct pci_dev *pdev, int bar, void __iomem *pci_iomap_wc_range(struct pci_dev *pdev, int bar,
unsigned long offset, unsigned long max) unsigned long offset, unsigned long max)
{ {
if (!pci_resource_len(pdev, bar) || bar >= PCI_BAR_COUNT) if (bar >= PCI_STD_NUM_BARS || !pci_resource_len(pdev, bar))
return NULL; return NULL;
if (static_branch_likely(&have_mio)) if (static_branch_likely(&have_mio))
@ -416,7 +416,7 @@ static void zpci_map_resources(struct pci_dev *pdev)
resource_size_t len; resource_size_t len;
int i; int i;
for (i = 0; i < PCI_BAR_COUNT; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
len = pci_resource_len(pdev, i); len = pci_resource_len(pdev, i);
if (!len) if (!len)
continue; continue;
@ -451,7 +451,7 @@ static void zpci_unmap_resources(struct pci_dev *pdev)
if (zpci_use_mio(zdev)) if (zpci_use_mio(zdev))
return; return;
for (i = 0; i < PCI_BAR_COUNT; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
len = pci_resource_len(pdev, i); len = pci_resource_len(pdev, i);
if (!len) if (!len)
continue; continue;
@ -514,7 +514,7 @@ static int zpci_setup_bus_resources(struct zpci_dev *zdev,
snprintf(zdev->res_name, sizeof(zdev->res_name), snprintf(zdev->res_name, sizeof(zdev->res_name),
"PCI Bus %04x:%02x", zdev->domain, ZPCI_BUS_NR); "PCI Bus %04x:%02x", zdev->domain, ZPCI_BUS_NR);
for (i = 0; i < PCI_BAR_COUNT; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
if (!zdev->bars[i].size) if (!zdev->bars[i].size)
continue; continue;
entry = zpci_alloc_iomap(zdev); entry = zpci_alloc_iomap(zdev);
@ -551,7 +551,7 @@ static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
{ {
int i; int i;
for (i = 0; i < PCI_BAR_COUNT; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
if (!zdev->bars[i].size || !zdev->bars[i].res) if (!zdev->bars[i].size || !zdev->bars[i].res)
continue; continue;
@ -573,7 +573,7 @@ int pcibios_add_device(struct pci_dev *pdev)
pdev->dev.dma_ops = &s390_pci_dma_ops; pdev->dev.dma_ops = &s390_pci_dma_ops;
zpci_map_resources(pdev); zpci_map_resources(pdev);
for (i = 0; i < PCI_BAR_COUNT; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
res = &pdev->resource[i]; res = &pdev->resource[i];
if (res->parent || !res->flags) if (res->parent || !res->flags)
continue; continue;

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@ -145,7 +145,7 @@ static int clp_store_query_pci_fn(struct zpci_dev *zdev,
{ {
int i; int i;
for (i = 0; i < PCI_BAR_COUNT; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
zdev->bars[i].val = le32_to_cpu(response->bar[i]); zdev->bars[i].val = le32_to_cpu(response->bar[i]);
zdev->bars[i].size = response->bar_size[i]; zdev->bars[i].size = response->bar_size[i];
} }
@ -164,8 +164,8 @@ static int clp_store_query_pci_fn(struct zpci_dev *zdev,
sizeof(zdev->util_str)); sizeof(zdev->util_str));
} }
zdev->mio_capable = response->mio_addr_avail; zdev->mio_capable = response->mio_addr_avail;
for (i = 0; i < PCI_BAR_COUNT; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
if (!(response->mio.valid & (1 << (PCI_BAR_COUNT - i - 1)))) if (!(response->mio.valid & (1 << (PCI_STD_NUM_BARS - i - 1))))
continue; continue;
zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb; zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb;

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@ -135,7 +135,7 @@ static void pcibios_fixup_device_resources(struct pci_dev *dev)
* resource so the kernel doesn't attempt to assign * resource so the kernel doesn't attempt to assign
* it later on in pci_assign_unassigned_resources * it later on in pci_assign_unassigned_resources
*/ */
for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) { for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
bar_r = &dev->resource[bar]; bar_r = &dev->resource[bar];
if (bar_r->start == 0 && bar_r->end != 0) { if (bar_r->start == 0 && bar_r->end != 0) {
bar_r->flags = 0; bar_r->flags = 0;

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@ -382,7 +382,7 @@ static void pci_fixed_bar_fixup(struct pci_dev *dev)
PCI_DEVFN(2, 2) == dev->devfn) PCI_DEVFN(2, 2) == dev->devfn)
return; return;
for (i = 0; i < PCI_ROM_RESOURCE; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
pci_read_config_dword(dev, offset + 8 + (i * 4), &size); pci_read_config_dword(dev, offset + 8 + (i * 4), &size);
dev->resource[i].end = dev->resource[i].start + size - 1; dev->resource[i].end = dev->resource[i].start + size - 1;
dev->resource[i].flags |= IORESOURCE_PCI_FIXED; dev->resource[i].flags |= IORESOURCE_PCI_FIXED;

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@ -422,7 +422,7 @@ static int atp867x_ata_pci_sff_init_host(struct ata_host *host)
#ifdef ATP867X_DEBUG #ifdef ATP867X_DEBUG
atp867x_check_res(pdev); atp867x_check_res(pdev);
for (i = 0; i < PCI_ROM_RESOURCE; i++) for (i = 0; i < PCI_STD_NUM_BARS; i++)
printk(KERN_DEBUG "ATP867X: iomap[%d]=0x%llx\n", i, printk(KERN_DEBUG "ATP867X: iomap[%d]=0x%llx\n", i,
(unsigned long long)(host->iomap[i])); (unsigned long long)(host->iomap[i]));
#endif #endif

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@ -2325,7 +2325,7 @@ static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
// Make sure this is a SATA controller by counting the number of bars // Make sure this is a SATA controller by counting the number of bars
// (NVIDIA SATA controllers will always have six bars). Otherwise, // (NVIDIA SATA controllers will always have six bars). Otherwise,
// it's an IDE controller and we ignore it. // it's an IDE controller and we ignore it.
for (bar = 0; bar < 6; bar++) for (bar = 0; bar < PCI_STD_NUM_BARS; bar++)
if (pci_resource_start(pdev, bar) == 0) if (pci_resource_start(pdev, bar) == 0)
return -ENODEV; return -ENODEV;

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@ -848,7 +848,7 @@ static int jmb38x_ms_count_slots(struct pci_dev *pdev)
{ {
int cnt, rc = 0; int cnt, rc = 0;
for (cnt = 0; cnt < PCI_ROM_RESOURCE; ++cnt) { for (cnt = 0; cnt < PCI_STD_NUM_BARS; ++cnt) {
if (!(IORESOURCE_MEM & pci_resource_flags(pdev, cnt))) if (!(IORESOURCE_MEM & pci_resource_flags(pdev, cnt)))
break; break;

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@ -94,7 +94,7 @@ enum pci_barno {
struct pci_endpoint_test { struct pci_endpoint_test {
struct pci_dev *pdev; struct pci_dev *pdev;
void __iomem *base; void __iomem *base;
void __iomem *bar[6]; void __iomem *bar[PCI_STD_NUM_BARS];
struct completion irq_raised; struct completion irq_raised;
int last_irq; int last_irq;
int num_irqs; int num_irqs;
@ -687,7 +687,7 @@ static int pci_endpoint_test_probe(struct pci_dev *pdev,
if (!pci_endpoint_test_request_irq(test)) if (!pci_endpoint_test_request_irq(test))
goto err_disable_irq; goto err_disable_irq;
for (bar = BAR_0; bar <= BAR_5; bar++) { for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) { if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {
base = pci_ioremap_bar(pdev, bar); base = pci_ioremap_bar(pdev, bar);
if (!base) { if (!base) {
@ -740,7 +740,7 @@ err_ida_remove:
ida_simple_remove(&pci_endpoint_test_ida, id); ida_simple_remove(&pci_endpoint_test_ida, id);
err_iounmap: err_iounmap:
for (bar = BAR_0; bar <= BAR_5; bar++) { for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
if (test->bar[bar]) if (test->bar[bar])
pci_iounmap(pdev, test->bar[bar]); pci_iounmap(pdev, test->bar[bar]);
} }
@ -771,7 +771,7 @@ static void pci_endpoint_test_remove(struct pci_dev *pdev)
misc_deregister(&test->miscdev); misc_deregister(&test->miscdev);
kfree(misc_device->name); kfree(misc_device->name);
ida_simple_remove(&pci_endpoint_test_ida, id); ida_simple_remove(&pci_endpoint_test_ida, id);
for (bar = BAR_0; bar <= BAR_5; bar++) { for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
if (test->bar[bar]) if (test->bar[bar])
pci_iounmap(pdev, test->bar[bar]); pci_iounmap(pdev, test->bar[bar]);
} }

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@ -45,7 +45,6 @@
#define BAR_0 0 #define BAR_0 0
#define BAR_1 1 #define BAR_1 1
#define BAR_5 5
#define INTEL_E1000_ETHERNET_DEVICE(device_id) {\ #define INTEL_E1000_ETHERNET_DEVICE(device_id) {\
PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)} PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}

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@ -977,7 +977,7 @@ static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
goto err_ioremap; goto err_ioremap;
if (adapter->need_ioport) { if (adapter->need_ioport) {
for (i = BAR_1; i <= BAR_5; i++) { for (i = BAR_1; i < PCI_STD_NUM_BARS; i++) {
if (pci_resource_len(pdev, i) == 0) if (pci_resource_len(pdev, i) == 0)
continue; continue;
if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {

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@ -42,7 +42,6 @@
#define BAR_0 0 #define BAR_0 0
#define BAR_1 1 #define BAR_1 1
#define BAR_5 5
struct ixgb_adapter; struct ixgb_adapter;
#include "ixgb_hw.h" #include "ixgb_hw.h"

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@ -412,7 +412,7 @@ ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
goto err_ioremap; goto err_ioremap;
} }
for (i = BAR_1; i <= BAR_5; i++) { for (i = BAR_1; i < PCI_STD_NUM_BARS; i++) {
if (pci_resource_len(pdev, i) == 0) if (pci_resource_len(pdev, i) == 0)
continue; continue;
if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {

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@ -489,7 +489,7 @@ static int stmmac_pci_probe(struct pci_dev *pdev,
} }
/* Get the base address of device */ /* Get the base address of device */
for (i = 0; i <= PCI_STD_RESOURCE_END; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
if (pci_resource_len(pdev, i) == 0) if (pci_resource_len(pdev, i) == 0)
continue; continue;
ret = pcim_iomap_regions(pdev, BIT(i), pci_name(pdev)); ret = pcim_iomap_regions(pdev, BIT(i), pci_name(pdev));
@ -532,7 +532,7 @@ static void stmmac_pci_remove(struct pci_dev *pdev)
if (priv->plat->stmmac_clk) if (priv->plat->stmmac_clk)
clk_unregister_fixed_rate(priv->plat->stmmac_clk); clk_unregister_fixed_rate(priv->plat->stmmac_clk);
for (i = 0; i <= PCI_STD_RESOURCE_END; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
if (pci_resource_len(pdev, i) == 0) if (pci_resource_len(pdev, i) == 0)
continue; continue;
pcim_iounmap_regions(pdev, BIT(i)); pcim_iounmap_regions(pdev, BIT(i));

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@ -34,7 +34,7 @@ static int xlgmac_probe(struct pci_dev *pcidev, const struct pci_device_id *id)
return ret; return ret;
} }
for (i = 0; i <= PCI_STD_RESOURCE_END; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
if (pci_resource_len(pcidev, i) == 0) if (pci_resource_len(pcidev, i) == 0)
continue; continue;
ret = pcim_iomap_regions(pcidev, BIT(i), XLGMAC_DRV_NAME); ret = pcim_iomap_regions(pcidev, BIT(i), XLGMAC_DRV_NAME);

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@ -353,7 +353,7 @@ static void dra7xx_pcie_ep_init(struct dw_pcie_ep *ep)
struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci); struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci);
enum pci_barno bar; enum pci_barno bar;
for (bar = BAR_0; bar <= BAR_5; bar++) for (bar = 0; bar < PCI_STD_NUM_BARS; bar++)
dw_pcie_ep_reset_bar(pci, bar); dw_pcie_ep_reset_bar(pci, bar);
dra7xx_pcie_enable_wrapper_interrupts(dra7xx); dra7xx_pcie_enable_wrapper_interrupts(dra7xx);

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@ -58,7 +58,7 @@ static void ls_pcie_ep_init(struct dw_pcie_ep *ep)
struct dw_pcie *pci = to_dw_pcie_from_ep(ep); struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
enum pci_barno bar; enum pci_barno bar;
for (bar = BAR_0; bar <= BAR_5; bar++) for (bar = 0; bar < PCI_STD_NUM_BARS; bar++)
dw_pcie_ep_reset_bar(pci, bar); dw_pcie_ep_reset_bar(pci, bar);
} }

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@ -422,7 +422,7 @@ static void artpec6_pcie_ep_init(struct dw_pcie_ep *ep)
artpec6_pcie_wait_for_phy(artpec6_pcie); artpec6_pcie_wait_for_phy(artpec6_pcie);
artpec6_pcie_set_nfts(artpec6_pcie); artpec6_pcie_set_nfts(artpec6_pcie);
for (bar = BAR_0; bar <= BAR_5; bar++) for (bar = 0; bar < PCI_STD_NUM_BARS; bar++)
dw_pcie_ep_reset_bar(pci, bar); dw_pcie_ep_reset_bar(pci, bar);
} }

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@ -70,7 +70,7 @@ static void dw_plat_pcie_ep_init(struct dw_pcie_ep *ep)
struct dw_pcie *pci = to_dw_pcie_from_ep(ep); struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
enum pci_barno bar; enum pci_barno bar;
for (bar = BAR_0; bar <= BAR_5; bar++) for (bar = 0; bar < PCI_STD_NUM_BARS; bar++)
dw_pcie_ep_reset_bar(pci, bar); dw_pcie_ep_reset_bar(pci, bar);
} }

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@ -214,7 +214,7 @@ struct dw_pcie_ep {
phys_addr_t phys_base; phys_addr_t phys_base;
size_t addr_size; size_t addr_size;
size_t page_size; size_t page_size;
u8 bar_to_atu[6]; u8 bar_to_atu[PCI_STD_NUM_BARS];
phys_addr_t *outbound_addr; phys_addr_t *outbound_addr;
unsigned long *ib_window_map; unsigned long *ib_window_map;
unsigned long *ob_window_map; unsigned long *ob_window_map;

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@ -307,7 +307,7 @@ struct pci_bus_relations {
struct pci_q_res_req_response { struct pci_q_res_req_response {
struct vmpacket_descriptor hdr; struct vmpacket_descriptor hdr;
s32 status; /* negative values are failures */ s32 status; /* negative values are failures */
u32 probed_bar[6]; u32 probed_bar[PCI_STD_NUM_BARS];
} __packed; } __packed;
struct pci_set_power { struct pci_set_power {
@ -539,7 +539,7 @@ struct hv_pci_dev {
* What would be observed if one wrote 0xFFFFFFFF to a BAR and then * What would be observed if one wrote 0xFFFFFFFF to a BAR and then
* read it back, for each of the BAR offsets within config space. * read it back, for each of the BAR offsets within config space.
*/ */
u32 probed_bar[6]; u32 probed_bar[PCI_STD_NUM_BARS];
}; };
struct hv_pci_compl { struct hv_pci_compl {
@ -1610,7 +1610,7 @@ static void survey_child_resources(struct hv_pcibus_device *hbus)
* so it's sufficient to just add them up without tracking alignment. * so it's sufficient to just add them up without tracking alignment.
*/ */
list_for_each_entry(hpdev, &hbus->children, list_entry) { list_for_each_entry(hpdev, &hbus->children, list_entry) {
for (i = 0; i < 6; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO) if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO)
dev_err(&hbus->hdev->device, dev_err(&hbus->hdev->device,
"There's an I/O BAR in this list!\n"); "There's an I/O BAR in this list!\n");
@ -1684,7 +1684,7 @@ static void prepopulate_bars(struct hv_pcibus_device *hbus)
/* Pick addresses for the BARs. */ /* Pick addresses for the BARs. */
do { do {
list_for_each_entry(hpdev, &hbus->children, list_entry) { list_for_each_entry(hpdev, &hbus->children, list_entry) {
for (i = 0; i < 6; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
bar_val = hpdev->probed_bar[i]; bar_val = hpdev->probed_bar[i];
if (bar_val == 0) if (bar_val == 0)
continue; continue;
@ -1841,7 +1841,7 @@ static void q_resource_requirements(void *context, struct pci_response *resp,
"query resource requirements failed: %x\n", "query resource requirements failed: %x\n",
resp->status); resp->status);
} else { } else {
for (i = 0; i < 6; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
completion->hpdev->probed_bar[i] = completion->hpdev->probed_bar[i] =
q_res_req->probed_bar[i]; q_res_req->probed_bar[i];
} }

View File

@ -44,7 +44,7 @@
static struct workqueue_struct *kpcitest_workqueue; static struct workqueue_struct *kpcitest_workqueue;
struct pci_epf_test { struct pci_epf_test {
void *reg[6]; void *reg[PCI_STD_NUM_BARS];
struct pci_epf *epf; struct pci_epf *epf;
enum pci_barno test_reg_bar; enum pci_barno test_reg_bar;
struct delayed_work cmd_handler; struct delayed_work cmd_handler;
@ -377,7 +377,7 @@ static void pci_epf_test_unbind(struct pci_epf *epf)
cancel_delayed_work(&epf_test->cmd_handler); cancel_delayed_work(&epf_test->cmd_handler);
pci_epc_stop(epc); pci_epc_stop(epc);
for (bar = BAR_0; bar <= BAR_5; bar++) { for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
epf_bar = &epf->bar[bar]; epf_bar = &epf->bar[bar];
if (epf_test->reg[bar]) { if (epf_test->reg[bar]) {
@ -400,7 +400,7 @@ static int pci_epf_test_set_bar(struct pci_epf *epf)
epc_features = epf_test->epc_features; epc_features = epf_test->epc_features;
for (bar = BAR_0; bar <= BAR_5; bar += add) { for (bar = 0; bar < PCI_STD_NUM_BARS; bar += add) {
epf_bar = &epf->bar[bar]; epf_bar = &epf->bar[bar];
/* /*
* pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64 * pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64
@ -450,7 +450,7 @@ static int pci_epf_test_alloc_space(struct pci_epf *epf)
} }
epf_test->reg[test_reg_bar] = base; epf_test->reg[test_reg_bar] = base;
for (bar = BAR_0; bar <= BAR_5; bar += add) { for (bar = 0; bar < PCI_STD_NUM_BARS; bar += add) {
epf_bar = &epf->bar[bar]; epf_bar = &epf->bar[bar];
add = (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) ? 2 : 1; add = (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64) ? 2 : 1;
@ -478,7 +478,7 @@ static void pci_epf_configure_bar(struct pci_epf *epf,
bool bar_fixed_64bit; bool bar_fixed_64bit;
int i; int i;
for (i = BAR_0; i <= BAR_5; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
epf_bar = &epf->bar[i]; epf_bar = &epf->bar[i];
bar_fixed_64bit = !!(epc_features->bar_fixed_64bit & (1 << i)); bar_fixed_64bit = !!(epc_features->bar_fixed_64bit & (1 << i));
if (bar_fixed_64bit) if (bar_fixed_64bit)

View File

@ -1122,7 +1122,7 @@ static void pci_remove_resource_files(struct pci_dev *pdev)
{ {
int i; int i;
for (i = 0; i < PCI_ROM_RESOURCE; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
struct bin_attribute *res_attr; struct bin_attribute *res_attr;
res_attr = pdev->res_attr[i]; res_attr = pdev->res_attr[i];
@ -1193,7 +1193,7 @@ static int pci_create_resource_files(struct pci_dev *pdev)
int retval; int retval;
/* Expose the PCI resources from this device as files */ /* Expose the PCI resources from this device as files */
for (i = 0; i < PCI_ROM_RESOURCE; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
/* skip empty resources */ /* skip empty resources */
if (!pci_resource_len(pdev, i)) if (!pci_resource_len(pdev, i))

View File

@ -86,10 +86,17 @@ unsigned long pci_cardbus_io_size = DEFAULT_CARDBUS_IO_SIZE;
unsigned long pci_cardbus_mem_size = DEFAULT_CARDBUS_MEM_SIZE; unsigned long pci_cardbus_mem_size = DEFAULT_CARDBUS_MEM_SIZE;
#define DEFAULT_HOTPLUG_IO_SIZE (256) #define DEFAULT_HOTPLUG_IO_SIZE (256)
#define DEFAULT_HOTPLUG_MEM_SIZE (2*1024*1024) #define DEFAULT_HOTPLUG_MMIO_SIZE (2*1024*1024)
/* pci=hpmemsize=nnM,hpiosize=nn can override this */ #define DEFAULT_HOTPLUG_MMIO_PREF_SIZE (2*1024*1024)
/* hpiosize=nn can override this */
unsigned long pci_hotplug_io_size = DEFAULT_HOTPLUG_IO_SIZE; unsigned long pci_hotplug_io_size = DEFAULT_HOTPLUG_IO_SIZE;
unsigned long pci_hotplug_mem_size = DEFAULT_HOTPLUG_MEM_SIZE; /*
* pci=hpmmiosize=nnM overrides non-prefetchable MMIO size,
* pci=hpmmioprefsize=nnM overrides prefetchable MMIO size;
* pci=hpmemsize=nnM overrides both
*/
unsigned long pci_hotplug_mmio_size = DEFAULT_HOTPLUG_MMIO_SIZE;
unsigned long pci_hotplug_mmio_pref_size = DEFAULT_HOTPLUG_MMIO_PREF_SIZE;
#define DEFAULT_HOTPLUG_BUS_SIZE 1 #define DEFAULT_HOTPLUG_BUS_SIZE 1
unsigned long pci_hotplug_bus_size = DEFAULT_HOTPLUG_BUS_SIZE; unsigned long pci_hotplug_bus_size = DEFAULT_HOTPLUG_BUS_SIZE;
@ -675,7 +682,7 @@ struct resource *pci_find_resource(struct pci_dev *dev, struct resource *res)
{ {
int i; int i;
for (i = 0; i < PCI_ROM_RESOURCE; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
struct resource *r = &dev->resource[i]; struct resource *r = &dev->resource[i];
if (r->start && resource_contains(r, res)) if (r->start && resource_contains(r, res))
@ -3788,7 +3795,7 @@ void pci_release_selected_regions(struct pci_dev *pdev, int bars)
{ {
int i; int i;
for (i = 0; i < 6; i++) for (i = 0; i < PCI_STD_NUM_BARS; i++)
if (bars & (1 << i)) if (bars & (1 << i))
pci_release_region(pdev, i); pci_release_region(pdev, i);
} }
@ -3799,7 +3806,7 @@ static int __pci_request_selected_regions(struct pci_dev *pdev, int bars,
{ {
int i; int i;
for (i = 0; i < 6; i++) for (i = 0; i < PCI_STD_NUM_BARS; i++)
if (bars & (1 << i)) if (bars & (1 << i))
if (__pci_request_region(pdev, i, res_name, excl)) if (__pci_request_region(pdev, i, res_name, excl))
goto err_out; goto err_out;
@ -3847,7 +3854,7 @@ EXPORT_SYMBOL(pci_request_selected_regions_exclusive);
void pci_release_regions(struct pci_dev *pdev) void pci_release_regions(struct pci_dev *pdev)
{ {
pci_release_selected_regions(pdev, (1 << 6) - 1); pci_release_selected_regions(pdev, (1 << PCI_STD_NUM_BARS) - 1);
} }
EXPORT_SYMBOL(pci_release_regions); EXPORT_SYMBOL(pci_release_regions);
@ -3866,7 +3873,8 @@ EXPORT_SYMBOL(pci_release_regions);
*/ */
int pci_request_regions(struct pci_dev *pdev, const char *res_name) int pci_request_regions(struct pci_dev *pdev, const char *res_name)
{ {
return pci_request_selected_regions(pdev, ((1 << 6) - 1), res_name); return pci_request_selected_regions(pdev,
((1 << PCI_STD_NUM_BARS) - 1), res_name);
} }
EXPORT_SYMBOL(pci_request_regions); EXPORT_SYMBOL(pci_request_regions);
@ -3888,7 +3896,7 @@ EXPORT_SYMBOL(pci_request_regions);
int pci_request_regions_exclusive(struct pci_dev *pdev, const char *res_name) int pci_request_regions_exclusive(struct pci_dev *pdev, const char *res_name)
{ {
return pci_request_selected_regions_exclusive(pdev, return pci_request_selected_regions_exclusive(pdev,
((1 << 6) - 1), res_name); ((1 << PCI_STD_NUM_BARS) - 1), res_name);
} }
EXPORT_SYMBOL(pci_request_regions_exclusive); EXPORT_SYMBOL(pci_request_regions_exclusive);
@ -6401,8 +6409,13 @@ static int __init pci_setup(char *str)
pcie_ecrc_get_policy(str + 5); pcie_ecrc_get_policy(str + 5);
} else if (!strncmp(str, "hpiosize=", 9)) { } else if (!strncmp(str, "hpiosize=", 9)) {
pci_hotplug_io_size = memparse(str + 9, &str); pci_hotplug_io_size = memparse(str + 9, &str);
} else if (!strncmp(str, "hpmmiosize=", 11)) {
pci_hotplug_mmio_size = memparse(str + 11, &str);
} else if (!strncmp(str, "hpmmioprefsize=", 15)) {
pci_hotplug_mmio_pref_size = memparse(str + 15, &str);
} else if (!strncmp(str, "hpmemsize=", 10)) { } else if (!strncmp(str, "hpmemsize=", 10)) {
pci_hotplug_mem_size = memparse(str + 10, &str); pci_hotplug_mmio_size = memparse(str + 10, &str);
pci_hotplug_mmio_pref_size = pci_hotplug_mmio_size;
} else if (!strncmp(str, "hpbussize=", 10)) { } else if (!strncmp(str, "hpbussize=", 10)) {
pci_hotplug_bus_size = pci_hotplug_bus_size =
simple_strtoul(str + 10, &str, 0); simple_strtoul(str + 10, &str, 0);

View File

@ -220,7 +220,8 @@ extern const struct device_type pci_dev_type;
extern const struct attribute_group *pci_bus_groups[]; extern const struct attribute_group *pci_bus_groups[];
extern unsigned long pci_hotplug_io_size; extern unsigned long pci_hotplug_io_size;
extern unsigned long pci_hotplug_mem_size; extern unsigned long pci_hotplug_mmio_size;
extern unsigned long pci_hotplug_mmio_pref_size;
extern unsigned long pci_hotplug_bus_size; extern unsigned long pci_hotplug_bus_size;
/** /**

View File

@ -573,6 +573,7 @@ static void devm_pci_release_host_bridge_dev(struct device *dev)
bridge->release_fn(bridge); bridge->release_fn(bridge);
pci_free_resource_list(&bridge->windows); pci_free_resource_list(&bridge->windows);
pci_free_resource_list(&bridge->dma_ranges);
} }
static void pci_release_host_bridge_dev(struct device *dev) static void pci_release_host_bridge_dev(struct device *dev)
@ -1093,14 +1094,15 @@ static unsigned int pci_scan_child_bus_extend(struct pci_bus *bus,
* @sec: updated with secondary bus number from EA * @sec: updated with secondary bus number from EA
* @sub: updated with subordinate bus number from EA * @sub: updated with subordinate bus number from EA
* *
* If @dev is a bridge with EA capability, update @sec and @sub with * If @dev is a bridge with EA capability that specifies valid secondary
* fixed bus numbers from the capability and return true. Otherwise, * and subordinate bus numbers, return true with the bus numbers in @sec
* return false. * and @sub. Otherwise return false.
*/ */
static bool pci_ea_fixed_busnrs(struct pci_dev *dev, u8 *sec, u8 *sub) static bool pci_ea_fixed_busnrs(struct pci_dev *dev, u8 *sec, u8 *sub)
{ {
int ea, offset; int ea, offset;
u32 dw; u32 dw;
u8 ea_sec, ea_sub;
if (dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) if (dev->hdr_type != PCI_HEADER_TYPE_BRIDGE)
return false; return false;
@ -1112,8 +1114,13 @@ static bool pci_ea_fixed_busnrs(struct pci_dev *dev, u8 *sec, u8 *sub)
offset = ea + PCI_EA_FIRST_ENT; offset = ea + PCI_EA_FIRST_ENT;
pci_read_config_dword(dev, offset, &dw); pci_read_config_dword(dev, offset, &dw);
*sec = dw & PCI_EA_SEC_BUS_MASK; ea_sec = dw & PCI_EA_SEC_BUS_MASK;
*sub = (dw & PCI_EA_SUB_BUS_MASK) >> PCI_EA_SUB_BUS_SHIFT; ea_sub = (dw & PCI_EA_SUB_BUS_MASK) >> PCI_EA_SUB_BUS_SHIFT;
if (ea_sec == 0 || ea_sub < ea_sec)
return false;
*sec = ea_sec;
*sub = ea_sub;
return true; return true;
} }

View File

@ -258,13 +258,13 @@ static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
} }
/* Make sure the caller is mapping a real resource for this device */ /* Make sure the caller is mapping a real resource for this device */
for (i = 0; i < PCI_ROM_RESOURCE; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
if (dev->resource[i].flags & res_bit && if (dev->resource[i].flags & res_bit &&
pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS)) pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS))
break; break;
} }
if (i >= PCI_ROM_RESOURCE) if (i >= PCI_STD_NUM_BARS)
return -ENODEV; return -ENODEV;
if (fpriv->mmap_state == pci_mmap_mem && if (fpriv->mmap_state == pci_mmap_mem &&

View File

@ -474,7 +474,7 @@ static void quirk_extend_bar_to_page(struct pci_dev *dev)
{ {
int i; int i;
for (i = 0; i <= PCI_STD_RESOURCE_END; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
struct resource *r = &dev->resource[i]; struct resource *r = &dev->resource[i];
if (r->flags & IORESOURCE_MEM && resource_size(r) < PAGE_SIZE) { if (r->flags & IORESOURCE_MEM && resource_size(r) < PAGE_SIZE) {
@ -1809,7 +1809,7 @@ static void quirk_alder_ioapic(struct pci_dev *pdev)
* The next five BARs all seem to be rubbish, so just clean * The next five BARs all seem to be rubbish, so just clean
* them out. * them out.
*/ */
for (i = 1; i < 6; i++) for (i = 1; i < PCI_STD_NUM_BARS; i++)
memset(&pdev->resource[i], 0, sizeof(pdev->resource[i])); memset(&pdev->resource[i], 0, sizeof(pdev->resource[i]));
} }
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EESSC, quirk_alder_ioapic); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EESSC, quirk_alder_ioapic);

View File

@ -752,24 +752,32 @@ static void pci_bridge_check_ranges(struct pci_bus *bus)
} }
/* /*
* Helper function for sizing routines: find first available bus resource * Helper function for sizing routines. Assigned resources have non-NULL
* of a given type. Note: we intentionally skip the bus resources which * parent resource.
* have already been assigned (that is, have non-NULL parent resource). *
* Return first unassigned resource of the correct type. If there is none,
* return first assigned resource of the correct type. If none of the
* above, return NULL.
*
* Returning an assigned resource of the correct type allows the caller to
* distinguish between already assigned and no resource of the correct type.
*/ */
static struct resource *find_free_bus_resource(struct pci_bus *bus, static struct resource *find_bus_resource_of_type(struct pci_bus *bus,
unsigned long type_mask, unsigned long type_mask,
unsigned long type) unsigned long type)
{ {
struct resource *r, *r_assigned = NULL;
int i; int i;
struct resource *r;
pci_bus_for_each_resource(bus, r, i) { pci_bus_for_each_resource(bus, r, i) {
if (r == &ioport_resource || r == &iomem_resource) if (r == &ioport_resource || r == &iomem_resource)
continue; continue;
if (r && (r->flags & type_mask) == type && !r->parent) if (r && (r->flags & type_mask) == type && !r->parent)
return r; return r;
if (r && (r->flags & type_mask) == type && !r_assigned)
r_assigned = r;
} }
return NULL; return r_assigned;
} }
static resource_size_t calculate_iosize(resource_size_t size, static resource_size_t calculate_iosize(resource_size_t size,
@ -866,8 +874,8 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
struct list_head *realloc_head) struct list_head *realloc_head)
{ {
struct pci_dev *dev; struct pci_dev *dev;
struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO, struct resource *b_res = find_bus_resource_of_type(bus, IORESOURCE_IO,
IORESOURCE_IO); IORESOURCE_IO);
resource_size_t size = 0, size0 = 0, size1 = 0; resource_size_t size = 0, size0 = 0, size1 = 0;
resource_size_t children_add_size = 0; resource_size_t children_add_size = 0;
resource_size_t min_align, align; resource_size_t min_align, align;
@ -875,6 +883,10 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
if (!b_res) if (!b_res)
return; return;
/* If resource is already assigned, nothing more to do */
if (b_res->parent)
return;
min_align = window_alignment(bus, IORESOURCE_IO); min_align = window_alignment(bus, IORESOURCE_IO);
list_for_each_entry(dev, &bus->devices, bus_list) { list_for_each_entry(dev, &bus->devices, bus_list) {
int i; int i;
@ -978,7 +990,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
resource_size_t min_align, align, size, size0, size1; resource_size_t min_align, align, size, size0, size1;
resource_size_t aligns[18]; /* Alignments from 1MB to 128GB */ resource_size_t aligns[18]; /* Alignments from 1MB to 128GB */
int order, max_order; int order, max_order;
struct resource *b_res = find_free_bus_resource(bus, struct resource *b_res = find_bus_resource_of_type(bus,
mask | IORESOURCE_PREFETCH, type); mask | IORESOURCE_PREFETCH, type);
resource_size_t children_add_size = 0; resource_size_t children_add_size = 0;
resource_size_t children_add_align = 0; resource_size_t children_add_align = 0;
@ -987,6 +999,10 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
if (!b_res) if (!b_res)
return -ENOSPC; return -ENOSPC;
/* If resource is already assigned, nothing more to do */
if (b_res->parent)
return 0;
memset(aligns, 0, sizeof(aligns)); memset(aligns, 0, sizeof(aligns));
max_order = 0; max_order = 0;
size = 0; size = 0;
@ -1178,7 +1194,8 @@ void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head)
{ {
struct pci_dev *dev; struct pci_dev *dev;
unsigned long mask, prefmask, type2 = 0, type3 = 0; unsigned long mask, prefmask, type2 = 0, type3 = 0;
resource_size_t additional_mem_size = 0, additional_io_size = 0; resource_size_t additional_io_size = 0, additional_mmio_size = 0,
additional_mmio_pref_size = 0;
struct resource *b_res; struct resource *b_res;
int ret; int ret;
@ -1212,7 +1229,8 @@ void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head)
pci_bridge_check_ranges(bus); pci_bridge_check_ranges(bus);
if (bus->self->is_hotplug_bridge) { if (bus->self->is_hotplug_bridge) {
additional_io_size = pci_hotplug_io_size; additional_io_size = pci_hotplug_io_size;
additional_mem_size = pci_hotplug_mem_size; additional_mmio_size = pci_hotplug_mmio_size;
additional_mmio_pref_size = pci_hotplug_mmio_pref_size;
} }
/* Fall through */ /* Fall through */
default: default:
@ -1230,9 +1248,9 @@ void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head)
if (b_res[2].flags & IORESOURCE_MEM_64) { if (b_res[2].flags & IORESOURCE_MEM_64) {
prefmask |= IORESOURCE_MEM_64; prefmask |= IORESOURCE_MEM_64;
ret = pbus_size_mem(bus, prefmask, prefmask, ret = pbus_size_mem(bus, prefmask, prefmask,
prefmask, prefmask, prefmask, prefmask,
realloc_head ? 0 : additional_mem_size, realloc_head ? 0 : additional_mmio_pref_size,
additional_mem_size, realloc_head); additional_mmio_pref_size, realloc_head);
/* /*
* If successful, all non-prefetchable resources * If successful, all non-prefetchable resources
@ -1254,9 +1272,9 @@ void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head)
if (!type2) { if (!type2) {
prefmask &= ~IORESOURCE_MEM_64; prefmask &= ~IORESOURCE_MEM_64;
ret = pbus_size_mem(bus, prefmask, prefmask, ret = pbus_size_mem(bus, prefmask, prefmask,
prefmask, prefmask, prefmask, prefmask,
realloc_head ? 0 : additional_mem_size, realloc_head ? 0 : additional_mmio_pref_size,
additional_mem_size, realloc_head); additional_mmio_pref_size, realloc_head);
/* /*
* If successful, only non-prefetchable resources * If successful, only non-prefetchable resources
@ -1265,7 +1283,7 @@ void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head)
if (ret == 0) if (ret == 0)
mask = prefmask; mask = prefmask;
else else
additional_mem_size += additional_mem_size; additional_mmio_size += additional_mmio_pref_size;
type2 = type3 = IORESOURCE_MEM; type2 = type3 = IORESOURCE_MEM;
} }
@ -1285,8 +1303,8 @@ void __pci_bus_size_bridges(struct pci_bus *bus, struct list_head *realloc_head)
* prefetchable resource in a 64-bit prefetchable window. * prefetchable resource in a 64-bit prefetchable window.
*/ */
pbus_size_mem(bus, mask, IORESOURCE_MEM, type2, type3, pbus_size_mem(bus, mask, IORESOURCE_MEM, type2, type3,
realloc_head ? 0 : additional_mem_size, realloc_head ? 0 : additional_mmio_size,
additional_mem_size, realloc_head); additional_mmio_size, realloc_head);
break; break;
} }
} }
@ -2066,6 +2084,8 @@ int pci_reassign_bridge_resources(struct pci_dev *bridge, unsigned long type)
unsigned int i; unsigned int i;
int ret; int ret;
down_read(&pci_bus_sem);
/* Walk to the root hub, releasing bridge BARs when possible */ /* Walk to the root hub, releasing bridge BARs when possible */
next = bridge; next = bridge;
do { do {
@ -2100,8 +2120,10 @@ int pci_reassign_bridge_resources(struct pci_dev *bridge, unsigned long type)
next = bridge->bus ? bridge->bus->self : NULL; next = bridge->bus ? bridge->bus->self : NULL;
} while (next); } while (next);
if (list_empty(&saved)) if (list_empty(&saved)) {
up_read(&pci_bus_sem);
return -ENOENT; return -ENOENT;
}
__pci_bus_size_bridges(bridge->subordinate, &added); __pci_bus_size_bridges(bridge->subordinate, &added);
__pci_bridge_assign_resources(bridge, &added, &failed); __pci_bridge_assign_resources(bridge, &added, &failed);
@ -2122,6 +2144,7 @@ int pci_reassign_bridge_resources(struct pci_dev *bridge, unsigned long type)
} }
free_list(&saved); free_list(&saved);
up_read(&pci_bus_sem);
return 0; return 0;
cleanup: cleanup:
@ -2150,6 +2173,7 @@ cleanup:
pci_setup_bridge(bridge->subordinate); pci_setup_bridge(bridge->subordinate);
} }
free_list(&saved); free_list(&saved);
up_read(&pci_bus_sem);
return ret; return ret;
} }

View File

@ -2755,7 +2755,7 @@ static int tsi721_probe(struct pci_dev *pdev,
{ {
int i; int i;
for (i = 0; i <= PCI_STD_RESOURCE_END; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
tsi_debug(INIT, &pdev->dev, "res%d %pR", tsi_debug(INIT, &pdev->dev, "res%d %pR",
i, &pdev->resource[i]); i, &pdev->resource[i]);
} }

View File

@ -1186,7 +1186,7 @@ static void pm8001_hw_chip_rst(struct pm8001_hba_info *pm8001_ha)
void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha) void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha)
{ {
s8 bar, logical = 0; s8 bar, logical = 0;
for (bar = 0; bar < 6; bar++) { for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
/* /*
** logical BARs for SPC: ** logical BARs for SPC:
** bar 0 and 1 - logical BAR0 ** bar 0 and 1 - logical BAR0

View File

@ -401,7 +401,7 @@ static int pm8001_ioremap(struct pm8001_hba_info *pm8001_ha)
pdev = pm8001_ha->pdev; pdev = pm8001_ha->pdev;
/* map pci mem (PMC pci base 0-3)*/ /* map pci mem (PMC pci base 0-3)*/
for (bar = 0; bar < 6; bar++) { for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
/* /*
** logical BARs for SPC: ** logical BARs for SPC:
** bar 0 and 1 - logical BAR0 ** bar 0 and 1 - logical BAR0

View File

@ -13,9 +13,6 @@
/* The maximum devices per each type. */ /* The maximum devices per each type. */
#define GASKET_DEV_MAX 256 #define GASKET_DEV_MAX 256
/* The number of supported (and possible) PCI BARs. */
#define GASKET_NUM_BARS 6
/* The number of supported Gasket page tables per device. */ /* The number of supported Gasket page tables per device. */
#define GASKET_MAX_NUM_PAGE_TABLES 1 #define GASKET_MAX_NUM_PAGE_TABLES 1

View File

@ -371,7 +371,7 @@ static int gasket_setup_pci(struct pci_dev *pci_dev,
{ {
int i, mapped_bars, ret; int i, mapped_bars, ret;
for (i = 0; i < GASKET_NUM_BARS; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
ret = gasket_map_pci_bar(gasket_dev, i); ret = gasket_map_pci_bar(gasket_dev, i);
if (ret) { if (ret) {
mapped_bars = i; mapped_bars = i;
@ -393,7 +393,7 @@ static void gasket_cleanup_pci(struct gasket_dev *gasket_dev)
{ {
int i; int i;
for (i = 0; i < GASKET_NUM_BARS; i++) for (i = 0; i < PCI_STD_NUM_BARS; i++)
gasket_unmap_pci_bar(gasket_dev, i); gasket_unmap_pci_bar(gasket_dev, i);
} }
@ -493,7 +493,7 @@ static ssize_t gasket_sysfs_data_show(struct device *device,
(enum gasket_sysfs_attribute_type)gasket_attr->data.attr_type; (enum gasket_sysfs_attribute_type)gasket_attr->data.attr_type;
switch (sysfs_type) { switch (sysfs_type) {
case ATTR_BAR_OFFSETS: case ATTR_BAR_OFFSETS:
for (i = 0; i < GASKET_NUM_BARS; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
bar_desc = &driver_desc->bar_descriptions[i]; bar_desc = &driver_desc->bar_descriptions[i];
if (bar_desc->size == 0) if (bar_desc->size == 0)
continue; continue;
@ -505,7 +505,7 @@ static ssize_t gasket_sysfs_data_show(struct device *device,
} }
break; break;
case ATTR_BAR_SIZES: case ATTR_BAR_SIZES:
for (i = 0; i < GASKET_NUM_BARS; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
bar_desc = &driver_desc->bar_descriptions[i]; bar_desc = &driver_desc->bar_descriptions[i];
if (bar_desc->size == 0) if (bar_desc->size == 0)
continue; continue;
@ -556,7 +556,7 @@ static ssize_t gasket_sysfs_data_show(struct device *device,
ret = snprintf(buf, PAGE_SIZE, "%d\n", gasket_dev->reset_count); ret = snprintf(buf, PAGE_SIZE, "%d\n", gasket_dev->reset_count);
break; break;
case ATTR_USER_MEM_RANGES: case ATTR_USER_MEM_RANGES:
for (i = 0; i < GASKET_NUM_BARS; ++i) { for (i = 0; i < PCI_STD_NUM_BARS; ++i) {
current_written = current_written =
gasket_write_mappable_regions(buf, driver_desc, gasket_write_mappable_regions(buf, driver_desc,
i); i);
@ -736,7 +736,7 @@ static int gasket_get_bar_index(const struct gasket_dev *gasket_dev,
const struct gasket_driver_desc *driver_desc; const struct gasket_driver_desc *driver_desc;
driver_desc = gasket_dev->internal_desc->driver_desc; driver_desc = gasket_dev->internal_desc->driver_desc;
for (i = 0; i < GASKET_NUM_BARS; ++i) { for (i = 0; i < PCI_STD_NUM_BARS; ++i) {
struct gasket_bar_desc bar_desc = struct gasket_bar_desc bar_desc =
driver_desc->bar_descriptions[i]; driver_desc->bar_descriptions[i];

View File

@ -268,7 +268,7 @@ struct gasket_dev {
char kobj_name[GASKET_NAME_MAX]; char kobj_name[GASKET_NAME_MAX];
/* Virtual address of mapped BAR memory range. */ /* Virtual address of mapped BAR memory range. */
struct gasket_bar_data bar_data[GASKET_NUM_BARS]; struct gasket_bar_data bar_data[PCI_STD_NUM_BARS];
/* Coherent buffer. */ /* Coherent buffer. */
struct gasket_coherent_buffer coherent_buffer; struct gasket_coherent_buffer coherent_buffer;
@ -369,7 +369,7 @@ struct gasket_driver_desc {
/* Set of 6 bar descriptions that describe all PCIe bars. /* Set of 6 bar descriptions that describe all PCIe bars.
* Note that BUS/AXI devices (i.e. non PCI devices) use those. * Note that BUS/AXI devices (i.e. non PCI devices) use those.
*/ */
struct gasket_bar_desc bar_descriptions[GASKET_NUM_BARS]; struct gasket_bar_desc bar_descriptions[PCI_STD_NUM_BARS];
/* /*
* Coherent buffer description. * Coherent buffer description.

View File

@ -48,8 +48,6 @@ struct f815xxa_data {
int idx; int idx;
}; };
#define PCI_NUM_BAR_RESOURCES 6
struct serial_private { struct serial_private {
struct pci_dev *dev; struct pci_dev *dev;
unsigned int nr; unsigned int nr;
@ -89,7 +87,7 @@ setup_port(struct serial_private *priv, struct uart_8250_port *port,
{ {
struct pci_dev *dev = priv->dev; struct pci_dev *dev = priv->dev;
if (bar >= PCI_NUM_BAR_RESOURCES) if (bar >= PCI_STD_NUM_BARS)
return -EINVAL; return -EINVAL;
if (pci_resource_flags(dev, bar) & IORESOURCE_MEM) { if (pci_resource_flags(dev, bar) & IORESOURCE_MEM) {
@ -4060,7 +4058,7 @@ serial_pci_guess_board(struct pci_dev *dev, struct pciserial_board *board)
return -ENODEV; return -ENODEV;
num_iomem = num_port = 0; num_iomem = num_port = 0;
for (i = 0; i < PCI_NUM_BAR_RESOURCES; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
if (pci_resource_flags(dev, i) & IORESOURCE_IO) { if (pci_resource_flags(dev, i) & IORESOURCE_IO) {
num_port++; num_port++;
if (first_port == -1) if (first_port == -1)
@ -4088,7 +4086,7 @@ serial_pci_guess_board(struct pci_dev *dev, struct pciserial_board *board)
*/ */
first_port = -1; first_port = -1;
num_port = 0; num_port = 0;
for (i = 0; i < PCI_NUM_BAR_RESOURCES; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
if (pci_resource_flags(dev, i) & IORESOURCE_IO && if (pci_resource_flags(dev, i) & IORESOURCE_IO &&
pci_resource_len(dev, i) == 8 && pci_resource_len(dev, i) == 8 &&
(first_port == -1 || (first_port + num_port) == i)) { (first_port == -1 || (first_port + num_port) == i)) {

View File

@ -234,7 +234,7 @@ int usb_hcd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
/* UHCI */ /* UHCI */
int region; int region;
for (region = 0; region < PCI_ROM_RESOURCE; region++) { for (region = 0; region < PCI_STD_NUM_BARS; region++) {
if (!(pci_resource_flags(dev, region) & if (!(pci_resource_flags(dev, region) &
IORESOURCE_IO)) IORESOURCE_IO))
continue; continue;

View File

@ -728,7 +728,7 @@ static void quirk_usb_handoff_uhci(struct pci_dev *pdev)
if (!pio_enabled(pdev)) if (!pio_enabled(pdev))
return; return;
for (i = 0; i < PCI_ROM_RESOURCE; i++) for (i = 0; i < PCI_STD_NUM_BARS; i++)
if ((pci_resource_flags(pdev, i) & IORESOURCE_IO)) { if ((pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
base = pci_resource_start(pdev, i); base = pci_resource_start(pdev, i);
break; break;

View File

@ -110,13 +110,15 @@ static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
static void vfio_pci_probe_mmaps(struct vfio_pci_device *vdev) static void vfio_pci_probe_mmaps(struct vfio_pci_device *vdev)
{ {
struct resource *res; struct resource *res;
int bar; int i;
struct vfio_pci_dummy_resource *dummy_res; struct vfio_pci_dummy_resource *dummy_res;
INIT_LIST_HEAD(&vdev->dummy_resources_list); INIT_LIST_HEAD(&vdev->dummy_resources_list);
for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
res = vdev->pdev->resource + bar; int bar = i + PCI_STD_RESOURCES;
res = &vdev->pdev->resource[bar];
if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP)) if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP))
goto no_mmap; goto no_mmap;
@ -399,7 +401,8 @@ static void vfio_pci_disable(struct vfio_pci_device *vdev)
vfio_config_free(vdev); vfio_config_free(vdev);
for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
bar = i + PCI_STD_RESOURCES;
if (!vdev->barmap[bar]) if (!vdev->barmap[bar])
continue; continue;
pci_iounmap(pdev, vdev->barmap[bar]); pci_iounmap(pdev, vdev->barmap[bar]);

View File

@ -450,30 +450,32 @@ static void vfio_bar_fixup(struct vfio_pci_device *vdev)
{ {
struct pci_dev *pdev = vdev->pdev; struct pci_dev *pdev = vdev->pdev;
int i; int i;
__le32 *bar; __le32 *vbar;
u64 mask; u64 mask;
bar = (__le32 *)&vdev->vconfig[PCI_BASE_ADDRESS_0]; vbar = (__le32 *)&vdev->vconfig[PCI_BASE_ADDRESS_0];
for (i = PCI_STD_RESOURCES; i <= PCI_STD_RESOURCE_END; i++, bar++) { for (i = 0; i < PCI_STD_NUM_BARS; i++, vbar++) {
if (!pci_resource_start(pdev, i)) { int bar = i + PCI_STD_RESOURCES;
*bar = 0; /* Unmapped by host = unimplemented to user */
if (!pci_resource_start(pdev, bar)) {
*vbar = 0; /* Unmapped by host = unimplemented to user */
continue; continue;
} }
mask = ~(pci_resource_len(pdev, i) - 1); mask = ~(pci_resource_len(pdev, bar) - 1);
*bar &= cpu_to_le32((u32)mask); *vbar &= cpu_to_le32((u32)mask);
*bar |= vfio_generate_bar_flags(pdev, i); *vbar |= vfio_generate_bar_flags(pdev, bar);
if (*bar & cpu_to_le32(PCI_BASE_ADDRESS_MEM_TYPE_64)) { if (*vbar & cpu_to_le32(PCI_BASE_ADDRESS_MEM_TYPE_64)) {
bar++; vbar++;
*bar &= cpu_to_le32((u32)(mask >> 32)); *vbar &= cpu_to_le32((u32)(mask >> 32));
i++; i++;
} }
} }
bar = (__le32 *)&vdev->vconfig[PCI_ROM_ADDRESS]; vbar = (__le32 *)&vdev->vconfig[PCI_ROM_ADDRESS];
/* /*
* NB. REGION_INFO will have reported zero size if we weren't able * NB. REGION_INFO will have reported zero size if we weren't able
@ -483,14 +485,14 @@ static void vfio_bar_fixup(struct vfio_pci_device *vdev)
if (pci_resource_start(pdev, PCI_ROM_RESOURCE)) { if (pci_resource_start(pdev, PCI_ROM_RESOURCE)) {
mask = ~(pci_resource_len(pdev, PCI_ROM_RESOURCE) - 1); mask = ~(pci_resource_len(pdev, PCI_ROM_RESOURCE) - 1);
mask |= PCI_ROM_ADDRESS_ENABLE; mask |= PCI_ROM_ADDRESS_ENABLE;
*bar &= cpu_to_le32((u32)mask); *vbar &= cpu_to_le32((u32)mask);
} else if (pdev->resource[PCI_ROM_RESOURCE].flags & } else if (pdev->resource[PCI_ROM_RESOURCE].flags &
IORESOURCE_ROM_SHADOW) { IORESOURCE_ROM_SHADOW) {
mask = ~(0x20000 - 1); mask = ~(0x20000 - 1);
mask |= PCI_ROM_ADDRESS_ENABLE; mask |= PCI_ROM_ADDRESS_ENABLE;
*bar &= cpu_to_le32((u32)mask); *vbar &= cpu_to_le32((u32)mask);
} else } else
*bar = 0; *vbar = 0;
vdev->bardirty = false; vdev->bardirty = false;
} }

View File

@ -86,8 +86,8 @@ struct vfio_pci_reflck {
struct vfio_pci_device { struct vfio_pci_device {
struct pci_dev *pdev; struct pci_dev *pdev;
void __iomem *barmap[PCI_STD_RESOURCE_END + 1]; void __iomem *barmap[PCI_STD_NUM_BARS];
bool bar_mmap_supported[PCI_STD_RESOURCE_END + 1]; bool bar_mmap_supported[PCI_STD_NUM_BARS];
u8 *pci_config_map; u8 *pci_config_map;
u8 *vconfig; u8 *vconfig;
struct perm_bits *msi_perm; struct perm_bits *msi_perm;

View File

@ -1774,7 +1774,7 @@ int remove_conflicting_pci_framebuffers(struct pci_dev *pdev, int res_id, const
int err, idx, bar; int err, idx, bar;
bool res_id_found = false; bool res_id_found = false;
for (idx = 0, bar = 0; bar < PCI_ROM_RESOURCE; bar++) { for (idx = 0, bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM))
continue; continue;
idx++; idx++;
@ -1784,7 +1784,7 @@ int remove_conflicting_pci_framebuffers(struct pci_dev *pdev, int res_id, const
if (!ap) if (!ap)
return -ENOMEM; return -ENOMEM;
for (idx = 0, bar = 0; bar < PCI_ROM_RESOURCE; bar++) { for (idx = 0, bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM))
continue; continue;
ap->ranges[idx].base = pci_resource_start(pdev, bar); ap->ranges[idx].base = pci_resource_start(pdev, bar);

View File

@ -653,7 +653,7 @@ static void efifb_fixup_resources(struct pci_dev *dev)
if (!base) if (!base)
return; return;
for (i = 0; i <= PCI_STD_RESOURCE_END; i++) { for (i = 0; i < PCI_STD_NUM_BARS; i++) {
struct resource *res = &dev->resource[i]; struct resource *res = &dev->resource[i];
if (!(res->flags & IORESOURCE_MEM)) if (!(res->flags & IORESOURCE_MEM))

View File

@ -117,7 +117,7 @@ struct pci_epc_features {
unsigned int msix_capable : 1; unsigned int msix_capable : 1;
u8 reserved_bar; u8 reserved_bar;
u8 bar_fixed_64bit; u8 bar_fixed_64bit;
u64 bar_fixed_size[BAR_5 + 1]; u64 bar_fixed_size[PCI_STD_NUM_BARS];
size_t align; size_t align;
}; };

View File

@ -82,7 +82,7 @@ enum pci_mmap_state {
enum { enum {
/* #0-5: standard PCI resources */ /* #0-5: standard PCI resources */
PCI_STD_RESOURCES, PCI_STD_RESOURCES,
PCI_STD_RESOURCE_END = 5, PCI_STD_RESOURCE_END = PCI_STD_RESOURCES + PCI_STD_NUM_BARS - 1,
/* #6: expansion ROM resource */ /* #6: expansion ROM resource */
PCI_ROM_RESOURCE, PCI_ROM_RESOURCE,

View File

@ -34,6 +34,7 @@
* of which the first 64 bytes are standardized as follows: * of which the first 64 bytes are standardized as follows:
*/ */
#define PCI_STD_HEADER_SIZEOF 64 #define PCI_STD_HEADER_SIZEOF 64
#define PCI_STD_NUM_BARS 6 /* Number of standard BARs */
#define PCI_VENDOR_ID 0x00 /* 16 bits */ #define PCI_VENDOR_ID 0x00 /* 16 bits */
#define PCI_DEVICE_ID 0x02 /* 16 bits */ #define PCI_DEVICE_ID 0x02 /* 16 bits */
#define PCI_COMMAND 0x04 /* 16 bits */ #define PCI_COMMAND 0x04 /* 16 bits */

View File

@ -262,7 +262,7 @@ EXPORT_SYMBOL(devm_ioport_unmap);
/* /*
* PCI iomap devres * PCI iomap devres
*/ */
#define PCIM_IOMAP_MAX PCI_ROM_RESOURCE #define PCIM_IOMAP_MAX PCI_STD_NUM_BARS
struct pcim_iomap_devres { struct pcim_iomap_devres {
void __iomem *table[PCIM_IOMAP_MAX]; void __iomem *table[PCIM_IOMAP_MAX];