drm/amdkfd: Implement queue priority controls for gfx9
Ported from gfx8, no changes in register setup. Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -67,6 +67,12 @@ static void update_cu_mask(struct mqd_manager *mm, void *mqd,
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m->compute_static_thread_mgmt_se3);
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}
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static void set_priority(struct v9_mqd *m, struct queue_properties *q)
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{
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m->cp_hqd_pipe_priority = pipe_priority_map[q->priority];
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m->cp_hqd_queue_priority = q->priority;
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}
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static struct kfd_mem_obj *allocate_mqd(struct kfd_dev *kfd,
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struct queue_properties *q)
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{
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@ -141,9 +147,6 @@ static int init_mqd(struct mqd_manager *mm, void **mqd,
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1 << CP_HQD_QUANTUM__QUANTUM_SCALE__SHIFT |
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10 << CP_HQD_QUANTUM__QUANTUM_DURATION__SHIFT;
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m->cp_hqd_pipe_priority = 1;
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m->cp_hqd_queue_priority = 15;
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if (q->format == KFD_QUEUE_FORMAT_AQL) {
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m->cp_hqd_aql_control =
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1 << CP_HQD_AQL_CONTROL__CONTROL0__SHIFT;
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@ -246,6 +249,7 @@ static int update_mqd(struct mqd_manager *mm, void *mqd,
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m->cp_hqd_ctx_save_control = 0;
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update_cu_mask(mm, mqd, q);
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set_priority(m, q);
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q->is_active = QUEUE_IS_ACTIVE(*q);
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