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clocksource: use clockevents_config_and_register() where possible 

The clockevent core is able to figure out the best mult and shift,
calculate min_delta_ns and max_delta_ns, with the necessary info passed
into clockevents_config_and_register().  Use this combined configure
and register function where possible to make the codes less error prone
and gain some positive diff stat.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Andres Salomon <dilinger@queued.net>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
hifive-unleashed-5.1
Shawn Guo 2013-01-12 11:50:06 +00:00 committed by Olof Johansson
parent 838a2ae80a
commit 77cc982f6a
3 changed files with 5 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
drivers/clocksource/cs5535-clockevt.c
View File

@ -100,7 +100,6 @@ static struct clock_event_device cs5535_clockevent = {
.set_mode = mfgpt_set_mode,
.set_next_event = mfgpt_next_event,
.rating = 250,
.shift = 32
};
static irqreturn_t mfgpt_tick(int irq, void *dev_id)
@ -169,17 +168,11 @@ static int __init cs5535_mfgpt_init(void)
cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP, val);
/* Set up the clock event */
cs5535_clockevent.mult = div_sc(MFGPT_HZ, NSEC_PER_SEC,
cs5535_clockevent.shift);
cs5535_clockevent.min_delta_ns = clockevent_delta2ns(0xF,
&cs5535_clockevent);
cs5535_clockevent.max_delta_ns = clockevent_delta2ns(0xFFFE,
&cs5535_clockevent);
printk(KERN_INFO DRV_NAME
": Registering MFGPT timer as a clock event, using IRQ %d\n",
timer_irq);
clockevents_register_device(&cs5535_clockevent);
clockevents_config_and_register(&cs5535_clockevent, MFGPT_HZ,
0xF, 0xFFFE);
return 0;

11
drivers/clocksource/sunxi_timer.c
View File

@ -74,7 +74,6 @@ static int sunxi_clkevt_next_event(unsigned long evt,
static struct clock_event_device sunxi_clockevent = {
.name = "sunxi_tick",
.shift = 32,
.rating = 300,
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.set_mode = sunxi_clkevt_mode,
@ -154,16 +153,10 @@ static void __init sunxi_timer_init(void)
val = readl(timer_base + TIMER_CTL_REG);
writel(val | TIMER_CTL_ENABLE, timer_base + TIMER_CTL_REG);
sunxi_clockevent.mult = div_sc(rate / TIMER_SCAL,
NSEC_PER_SEC,
sunxi_clockevent.shift);
sunxi_clockevent.max_delta_ns = clockevent_delta2ns(0xff,
&sunxi_clockevent);
sunxi_clockevent.min_delta_ns = clockevent_delta2ns(0x1,
&sunxi_clockevent);
sunxi_clockevent.cpumask = cpumask_of(0);
clockevents_register_device(&sunxi_clockevent);
clockevents_config_and_register(&sunxi_clockevent, rate / TIMER_SCAL,
0x1, 0xff);
}
struct sys_timer sunxi_timer = {

7
drivers/clocksource/tcb_clksrc.c
View File

@ -157,7 +157,6 @@ static struct tc_clkevt_device clkevt = {
.name = "tc_clkevt",
.features = CLOCK_EVT_FEAT_PERIODIC
| CLOCK_EVT_FEAT_ONESHOT,
.shift = 32,
/* Should be lower than at91rm9200's system timer */
.rating = 125,
.set_next_event = tc_next_event,
@ -196,13 +195,9 @@ static void __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
timer_clock = clk32k_divisor_idx;
clkevt.clkevt.mult = div_sc(32768, NSEC_PER_SEC, clkevt.clkevt.shift);
clkevt.clkevt.max_delta_ns
= clockevent_delta2ns(0xffff, &clkevt.clkevt);
clkevt.clkevt.min_delta_ns = clockevent_delta2ns(1, &clkevt.clkevt) + 1;
clkevt.clkevt.cpumask = cpumask_of(0);
clockevents_register_device(&clkevt.clkevt);
clockevents_config_and_register(&clkevt.clkevt, 32768, 1, 0xffff);
setup_irq(irq, &tc_irqaction);
}