[MTD] [NAND] Hardware ECC controller on at91sam9263 / at91sam9260
This is a patch to use the hardware ECC controller of the AT91SAM9260 and AT91SAM9263 for the AT91 nand. On AT91 NAND, there's now a choice between ECC soft, ECC hard or no ECC (for debug). It has been tested on AT91SAM9263 with 8 bits large and small page NAND. Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This commit is contained in:
parent
2c61cb250c
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77f5492c43
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@ -278,6 +278,47 @@ config MTD_NAND_AT91
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help
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Enables support for NAND Flash / Smart Media Card interface
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on Atmel AT91 processors.
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choice
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prompt "ECC management for NAND Flash / SmartMedia on AT91"
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depends on MTD_NAND_AT91
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config MTD_NAND_AT91_ECC_HW
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bool "Hardware ECC"
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depends on ARCH_AT91SAM9263 || ARCH_AT91SAM9260
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help
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Uses hardware ECC provided by the at91sam9260/at91sam9263 chip
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instead of software ECC.
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The hardware ECC controller is capable of single bit error
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correction and 2-bit random detection per page.
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NB : hardware and software ECC schemes are incompatible.
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If you switch from one to another, you'll have to erase your
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mtd partition.
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If unsure, say Y
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config MTD_NAND_AT91_ECC_SOFT
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bool "Software ECC"
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help
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Uses software ECC.
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NB : hardware and software ECC schemes are incompatible.
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If you switch from one to another, you'll have to erase your
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mtd partition.
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config MTD_NAND_AT91_ECC_NONE
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bool "No ECC (testing only, DANGEROUS)"
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depends on DEBUG_KERNEL
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help
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No ECC will be used.
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It's not a good idea and it should be reserved for testing
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purpose only.
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If unsure, say N
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endchoice
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endchoice
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config MTD_NAND_PXA3xx
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bool "Support for NAND flash devices on PXA3xx"
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@ -9,6 +9,15 @@
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* Derived from drivers/mtd/spia.c
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* Copyright (C) 2000 Steven J. Hill (sjhill@cotw.com)
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*
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*
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* Add Hardware ECC support for AT91SAM9260 / AT91SAM9263
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* Richard Genoud (richard.genoud@gmail.com), Adeneo Copyright (C) 2007
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*
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* Derived from Das U-Boot source code
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* (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
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* (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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@ -29,11 +38,59 @@
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#include <asm/arch/board.h>
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#include <asm/arch/gpio.h>
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#ifdef CONFIG_MTD_NAND_AT91_ECC_HW
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#define hard_ecc 1
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#else
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#define hard_ecc 0
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#endif
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#ifdef CONFIG_MTD_NAND_AT91_ECC_NONE
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#define no_ecc 1
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#else
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#define no_ecc 0
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#endif
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/* Register access macros */
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#define ecc_readl(add, reg) \
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__raw_readl(add + AT91_ECC_##reg)
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#define ecc_writel(add, reg, value) \
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__raw_writel((value), add + AT91_ECC_##reg)
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#include <asm/arch/at91_ecc.h> /* AT91SAM9260/3 ECC registers */
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/* oob layout for large page size
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* bad block info is on bytes 0 and 1
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* the bytes have to be consecutives to avoid
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* several NAND_CMD_RNDOUT during read
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*/
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static struct nand_ecclayout at91_oobinfo_large = {
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.eccbytes = 4,
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.eccpos = {60, 61, 62, 63},
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.oobfree = {
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{2, 58}
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},
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};
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/* oob layout for small page size
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* bad block info is on bytes 4 and 5
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* the bytes have to be consecutives to avoid
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* several NAND_CMD_RNDOUT during read
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*/
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static struct nand_ecclayout at91_oobinfo_small = {
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.eccbytes = 4,
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.eccpos = {0, 1, 2, 3},
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.oobfree = {
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{6, 10}
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},
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};
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struct at91_nand_host {
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struct nand_chip nand_chip;
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struct mtd_info mtd;
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void __iomem *io_base;
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struct at91_nand_data *board;
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struct device *dev;
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void __iomem *ecc;
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};
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/*
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@ -82,6 +139,215 @@ static void at91_nand_disable(struct at91_nand_host *host)
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at91_set_gpio_value(host->board->enable_pin, 1);
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}
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/*
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* write oob for small pages
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*/
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static int at91_nand_write_oob_512(struct mtd_info *mtd,
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struct nand_chip *chip, int page)
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{
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int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
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int eccsize = chip->ecc.size, length = mtd->oobsize;
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int len, pos, status = 0;
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const uint8_t *bufpoi = chip->oob_poi;
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pos = eccsize + chunk;
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chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
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len = min_t(int, length, chunk);
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chip->write_buf(mtd, bufpoi, len);
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bufpoi += len;
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length -= len;
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if (length > 0)
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chip->write_buf(mtd, bufpoi, length);
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chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
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status = chip->waitfunc(mtd, chip);
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return status & NAND_STATUS_FAIL ? -EIO : 0;
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}
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/*
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* read oob for small pages
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*/
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static int at91_nand_read_oob_512(struct mtd_info *mtd,
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struct nand_chip *chip, int page, int sndcmd)
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{
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if (sndcmd) {
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chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
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sndcmd = 0;
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}
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chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
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return sndcmd;
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}
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/*
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* Calculate HW ECC
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*
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* function called after a write
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*
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* mtd: MTD block structure
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* dat: raw data (unused)
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* ecc_code: buffer for ECC
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*/
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static int at91_nand_calculate(struct mtd_info *mtd,
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const u_char *dat, unsigned char *ecc_code)
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{
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struct nand_chip *nand_chip = mtd->priv;
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struct at91_nand_host *host = nand_chip->priv;
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uint32_t *eccpos = nand_chip->ecc.layout->eccpos;
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unsigned int ecc_value;
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/* get the first 2 ECC bytes */
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ecc_value = ecc_readl(host->ecc, PR) & AT91_ECC_PARITY;
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ecc_code[eccpos[0]] = ecc_value & 0xFF;
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ecc_code[eccpos[1]] = (ecc_value >> 8) & 0xFF;
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/* get the last 2 ECC bytes */
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ecc_value = ecc_readl(host->ecc, NPR) & AT91_ECC_NPARITY;
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ecc_code[eccpos[2]] = ecc_value & 0xFF;
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ecc_code[eccpos[3]] = (ecc_value >> 8) & 0xFF;
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return 0;
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}
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/*
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* HW ECC read page function
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*
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* mtd: mtd info structure
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* chip: nand chip info structure
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* buf: buffer to store read data
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*/
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static int at91_nand_read_page(struct mtd_info *mtd,
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struct nand_chip *chip, uint8_t *buf)
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{
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int eccsize = chip->ecc.size;
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int eccbytes = chip->ecc.bytes;
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uint32_t *eccpos = chip->ecc.layout->eccpos;
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uint8_t *p = buf;
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uint8_t *oob = chip->oob_poi;
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uint8_t *ecc_pos;
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int stat;
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/* read the page */
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chip->read_buf(mtd, p, eccsize);
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/* move to ECC position if needed */
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if (eccpos[0] != 0) {
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/* This only works on large pages
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* because the ECC controller waits for
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* NAND_CMD_RNDOUTSTART after the
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* NAND_CMD_RNDOUT.
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* anyway, for small pages, the eccpos[0] == 0
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*/
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chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
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mtd->writesize + eccpos[0], -1);
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}
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/* the ECC controller needs to read the ECC just after the data */
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ecc_pos = oob + eccpos[0];
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chip->read_buf(mtd, ecc_pos, eccbytes);
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/* check if there's an error */
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stat = chip->ecc.correct(mtd, p, oob, NULL);
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if (stat < 0)
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mtd->ecc_stats.failed++;
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else
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mtd->ecc_stats.corrected += stat;
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/* get back to oob start (end of page) */
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chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
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/* read the oob */
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chip->read_buf(mtd, oob, mtd->oobsize);
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return 0;
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}
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/*
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* HW ECC Correction
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*
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* function called after a read
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*
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* mtd: MTD block structure
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* dat: raw data read from the chip
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* read_ecc: ECC from the chip (unused)
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* isnull: unused
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*
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* Detect and correct a 1 bit error for a page
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*/
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static int at91_nand_correct(struct mtd_info *mtd, u_char *dat,
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u_char *read_ecc, u_char *isnull)
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{
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struct nand_chip *nand_chip = mtd->priv;
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struct at91_nand_host *host = nand_chip->priv;
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unsigned int ecc_status;
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unsigned int ecc_word, ecc_bit;
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/* get the status from the Status Register */
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ecc_status = ecc_readl(host->ecc, SR);
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/* if there's no error */
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if (likely(!(ecc_status & AT91_ECC_RECERR)))
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return 0;
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/* get error bit offset (4 bits) */
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ecc_bit = ecc_readl(host->ecc, PR) & AT91_ECC_BITADDR;
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/* get word address (12 bits) */
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ecc_word = ecc_readl(host->ecc, PR) & AT91_ECC_WORDADDR;
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ecc_word >>= 4;
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/* if there are multiple errors */
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if (ecc_status & AT91_ECC_MULERR) {
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/* check if it is a freshly erased block
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* (filled with 0xff) */
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if ((ecc_bit == AT91_ECC_BITADDR)
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&& (ecc_word == (AT91_ECC_WORDADDR >> 4))) {
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/* the block has just been erased, return OK */
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return 0;
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}
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/* it doesn't seems to be a freshly
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* erased block.
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* We can't correct so many errors */
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dev_dbg(host->dev, "at91_nand : multiple errors detected."
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" Unable to correct.\n");
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return -EIO;
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}
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/* if there's a single bit error : we can correct it */
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if (ecc_status & AT91_ECC_ECCERR) {
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/* there's nothing much to do here.
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* the bit error is on the ECC itself.
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*/
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dev_dbg(host->dev, "at91_nand : one bit error on ECC code."
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" Nothing to correct\n");
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return 0;
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}
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dev_dbg(host->dev, "at91_nand : one bit error on data."
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" (word offset in the page :"
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" 0x%x bit offset : 0x%x)\n",
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ecc_word, ecc_bit);
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/* correct the error */
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if (nand_chip->options & NAND_BUSWIDTH_16) {
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/* 16 bits words */
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((unsigned short *) dat)[ecc_word] ^= (1 << ecc_bit);
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} else {
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/* 8 bits words */
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dat[ecc_word] ^= (1 << ecc_bit);
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}
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dev_dbg(host->dev, "at91_nand : error corrected\n");
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return 1;
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}
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/*
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* Enable HW ECC : unsused
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*/
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static void at91_nand_hwctl(struct mtd_info *mtd, int mode) { ; }
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#ifdef CONFIG_MTD_PARTITIONS
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static const char *part_probes[] = { "cmdlinepart", NULL };
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#endif
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@ -94,6 +360,8 @@ static int __init at91_nand_probe(struct platform_device *pdev)
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struct at91_nand_host *host;
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struct mtd_info *mtd;
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struct nand_chip *nand_chip;
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struct resource *regs;
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struct resource *mem;
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int res;
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#ifdef CONFIG_MTD_PARTITIONS
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@ -108,8 +376,13 @@ static int __init at91_nand_probe(struct platform_device *pdev)
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return -ENOMEM;
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}
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host->io_base = ioremap(pdev->resource[0].start,
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pdev->resource[0].end - pdev->resource[0].start + 1);
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!mem) {
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printk(KERN_ERR "at91_nand: can't get I/O resource mem\n");
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return -ENXIO;
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}
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host->io_base = ioremap(mem->start, mem->end - mem->start + 1);
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if (host->io_base == NULL) {
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printk(KERN_ERR "at91_nand: ioremap failed\n");
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kfree(host);
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@ -119,6 +392,7 @@ static int __init at91_nand_probe(struct platform_device *pdev)
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mtd = &host->mtd;
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nand_chip = &host->nand_chip;
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host->board = pdev->dev.platform_data;
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host->dev = &pdev->dev;
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nand_chip->priv = host; /* link the private data structures */
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mtd->priv = nand_chip;
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@ -132,7 +406,32 @@ static int __init at91_nand_probe(struct platform_device *pdev)
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if (host->board->rdy_pin)
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nand_chip->dev_ready = at91_nand_device_ready;
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regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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if (!regs && hard_ecc) {
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printk(KERN_ERR "at91_nand: can't get I/O resource "
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"regs\nFalling back on software ECC\n");
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}
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nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */
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if (no_ecc)
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nand_chip->ecc.mode = NAND_ECC_NONE;
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if (hard_ecc && regs) {
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host->ecc = ioremap(regs->start, regs->end - regs->start + 1);
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if (host->ecc == NULL) {
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printk(KERN_ERR "at91_nand: ioremap failed\n");
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res = -EIO;
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goto err_ecc_ioremap;
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}
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nand_chip->ecc.mode = NAND_ECC_HW_SYNDROME;
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nand_chip->ecc.calculate = at91_nand_calculate;
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nand_chip->ecc.correct = at91_nand_correct;
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nand_chip->ecc.hwctl = at91_nand_hwctl;
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nand_chip->ecc.read_page = at91_nand_read_page;
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nand_chip->ecc.bytes = 4;
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nand_chip->ecc.prepad = 0;
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nand_chip->ecc.postpad = 0;
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}
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nand_chip->chip_delay = 20; /* 20us command delay time */
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if (host->board->bus_width_16) /* 16-bit bus width */
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@ -149,8 +448,53 @@ static int __init at91_nand_probe(struct platform_device *pdev)
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}
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}
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/* Scan to find existance of the device */
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if (nand_scan(mtd, 1)) {
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/* first scan to find the device and get the page size */
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if (nand_scan_ident(mtd, 1)) {
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res = -ENXIO;
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goto out;
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}
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if (nand_chip->ecc.mode == NAND_ECC_HW_SYNDROME) {
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/* ECC is calculated for the whole page (1 step) */
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nand_chip->ecc.size = mtd->writesize;
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/* set ECC page size and oob layout */
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switch (mtd->writesize) {
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case 512:
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nand_chip->ecc.layout = &at91_oobinfo_small;
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nand_chip->ecc.read_oob = at91_nand_read_oob_512;
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nand_chip->ecc.write_oob = at91_nand_write_oob_512;
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ecc_writel(host->ecc, MR, AT91_ECC_PAGESIZE_528);
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break;
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case 1024:
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nand_chip->ecc.layout = &at91_oobinfo_large;
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ecc_writel(host->ecc, MR, AT91_ECC_PAGESIZE_1056);
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break;
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case 2048:
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nand_chip->ecc.layout = &at91_oobinfo_large;
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ecc_writel(host->ecc, MR, AT91_ECC_PAGESIZE_2112);
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break;
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case 4096:
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nand_chip->ecc.layout = &at91_oobinfo_large;
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ecc_writel(host->ecc, MR, AT91_ECC_PAGESIZE_4224);
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break;
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default:
|
||||
/* page size not handled by HW ECC */
|
||||
/* switching back to soft ECC */
|
||||
nand_chip->ecc.mode = NAND_ECC_SOFT;
|
||||
nand_chip->ecc.calculate = NULL;
|
||||
nand_chip->ecc.correct = NULL;
|
||||
nand_chip->ecc.hwctl = NULL;
|
||||
nand_chip->ecc.read_page = NULL;
|
||||
nand_chip->ecc.postpad = 0;
|
||||
nand_chip->ecc.prepad = 0;
|
||||
nand_chip->ecc.bytes = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* second phase scan */
|
||||
if (nand_scan_tail(mtd)) {
|
||||
res = -ENXIO;
|
||||
goto out;
|
||||
}
|
||||
|
@ -179,9 +523,15 @@ static int __init at91_nand_probe(struct platform_device *pdev)
|
|||
if (!res)
|
||||
return res;
|
||||
|
||||
#ifdef CONFIG_MTD_PARTITIONS
|
||||
release:
|
||||
#endif
|
||||
nand_release(mtd);
|
||||
|
||||
out:
|
||||
iounmap(host->ecc);
|
||||
|
||||
err_ecc_ioremap:
|
||||
at91_nand_disable(host);
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
iounmap(host->io_base);
|
||||
|
@ -202,6 +552,7 @@ static int __devexit at91_nand_remove(struct platform_device *pdev)
|
|||
at91_nand_disable(host);
|
||||
|
||||
iounmap(host->io_base);
|
||||
iounmap(host->ecc);
|
||||
kfree(host);
|
||||
|
||||
return 0;
|
||||
|
@ -233,5 +584,5 @@ module_exit(at91_nand_exit);
|
|||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Rick Bronson");
|
||||
MODULE_DESCRIPTION("NAND/SmartMedia driver for AT91RM9200");
|
||||
MODULE_DESCRIPTION("NAND/SmartMedia driver for AT91RM9200 / AT91SAM9");
|
||||
MODULE_ALIAS("platform:at91_nand");
|
||||
|
|
Loading…
Reference in a new issue