drm/i915: set up PIPECONF explicitly on ilk-ivb
Dragging random garbage along from the BIOS isn't a good idea, since we really only support exactly what we've set up. In the specific case for the bug reporter the BIOS used the 10bit gamma table, but since we only support an 8bit table the dark colors ended up all wrong and the light ones all unadjusted. Note that this has a nice implication for fastboot, it essentially means that we have quite a bit more state to check and compare before we can decide whether fastboot is possible. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65593 Reported-and-Tested-by: Thomas Hebb <tommyhebb@gmail.com> Cc: stable@vger.kernel.org Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -5342,9 +5342,8 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc)
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int pipe = intel_crtc->pipe;
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uint32_t val;
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val = I915_READ(PIPECONF(pipe));
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val = 0;
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val &= ~PIPECONF_BPC_MASK;
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switch (intel_crtc->config.pipe_bpp) {
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case 18:
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val |= PIPECONF_6BPC;
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@ -5363,11 +5362,9 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc)
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BUG();
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}
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val &= ~(PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_MASK);
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if (intel_crtc->config.dither)
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val |= (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP);
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val &= ~PIPECONF_INTERLACE_MASK;
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if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
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val |= PIPECONF_INTERLACED_ILK;
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else
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@ -5375,8 +5372,6 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc)
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if (intel_crtc->config.limited_color_range)
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val |= PIPECONF_COLOR_RANGE_SELECT;
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else
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val &= ~PIPECONF_COLOR_RANGE_SELECT;
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I915_WRITE(PIPECONF(pipe), val);
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POSTING_READ(PIPECONF(pipe));
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