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Merge branch 'warning-fixes' into next/fixes-non-critical 

These are fixes for compiler warnings that for the most
part were introduced during the 3.8 cycle but are otherwise
harmless.

* warning-fixes:
  scripts/sortextable: silence script output
  ARM: s3c: i2c: add platform_device forward declaration
  ARM: mvebu: allow selecting mvebu without Armada XP
  ARM: pick Versatile by default for !MMU
  ARM: integrator: fix build with INTEGRATOR_AP off
  ARM: integrator/versatile: fix NOMMU warnings
  ARM: sa1100: don't warn about mach/ide.h
  ARM: shmobile: fix defconfig warning on CONFIG_USB
  ARM: w90x900: fix legacy assembly syntax
  ARM: samsung: fix assembly syntax for new gas
  ARM: disable virt_to_bus/virt_to_bus almost everywhere

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
hifive-unleashed-5.1
Arnd Bergmann 2013-02-14 15:05:40 +01:00
parent 0e55f0b003 8c0c774dd7
commit 7822eee1ac
22 changed files with 56 additions and 51 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
arch/arm/Kconfig
View File

@ -261,7 +261,8 @@ config MMU
#
choice
prompt "ARM system type"
default ARCH_MULTIPLATFORM
default ARCH_VERSATILE if !MMU
default ARCH_MULTIPLATFORM if MMU
config ARCH_MULTIPLATFORM
bool "Allow multiple platforms to be selected"
@ -1450,6 +1451,10 @@ config ISA_DMA
bool
select ISA_DMA_API
config ARCH_NO_VIRT_TO_BUS
def_bool y
depends on !ARCH_RPC && !ARCH_NETWINDER && !ARCH_SHARK
# Select ISA DMA interface
config ISA_DMA_API
bool

1
arch/arm/configs/marzen_defconfig
View File

@ -83,7 +83,6 @@ CONFIG_USB=y
CONFIG_USB_RCAR_PHY=y
CONFIG_MMC=y
CONFIG_MMC_SDHI=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y

1
arch/arm/configs/shark_defconfig
View File

@ -73,7 +73,6 @@ CONFIG_PARTITION_ADVANCED=y
CONFIG_NLS_CODEPAGE_437=m
CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_ISO8859_1=m
# CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_ENABLE_MUST_CHECK is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_SCHED_DEBUG is not set

2
arch/arm/include/asm/dma.h
View File

@ -105,7 +105,7 @@ extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg);
*/
extern void __set_dma_addr(unsigned int chan, void *addr);
#define set_dma_addr(chan, addr) \
__set_dma_addr(chan, bus_to_virt(addr))
__set_dma_addr(chan, (void *)__bus_to_virt(addr))
/* Set the DMA byte count for this channel
*

2
arch/arm/include/asm/memory.h
View File

@ -245,6 +245,7 @@ static inline void *phys_to_virt(phys_addr_t x)
#define __bus_to_pfn(x) __phys_to_pfn(x)
#endif
#ifdef CONFIG_VIRT_TO_BUS
static inline __deprecated unsigned long virt_to_bus(void *x)
{
return __virt_to_bus((unsigned long)x);
@ -254,6 +255,7 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
{
return (void *)__bus_to_virt(x);
}
#endif
/*
* Conversion between a struct page and a physical address.

5
arch/arm/mach-integrator/common.h
View File

@ -1,10 +1,5 @@
#include <linux/amba/serial.h>
#ifdef CONFIG_ARCH_INTEGRATOR_AP
extern struct amba_pl010_data ap_uart_data;
#else
/* Not used without Integrator/AP support anyway */
struct amba_pl010_data ap_uart_data {};
#endif
void integrator_init_early(void);
int integrator_init(bool is_cp);
void integrator_reserve(void);

2
arch/arm/mach-integrator/core.c
View File

@ -71,7 +71,7 @@ int __init integrator_init(bool is_cp)
* hard-code them. The Integator/CP and forward have proper cell IDs.
* Else we leave them undefined to the bus driver can autoprobe them.
*/
if (!is_cp) {
if (!is_cp && IS_ENABLED(CONFIG_ARCH_INTEGRATOR_AP)) {
rtc_device.periphid = 0x00041030;
uart0_device.periphid = 0x00041010;
uart1_device.periphid = 0x00041010;

2
arch/arm/mach-integrator/integrator_ap.c
View File

@ -94,7 +94,7 @@ void __iomem *ap_syscon_base;
* f1b00000 1b000000 GPIO
*/
static struct map_desc ap_io_desc[] __initdata = {
static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
{
.virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),

2
arch/arm/mach-integrator/integrator_cp.c
View File

@ -78,7 +78,7 @@ static void __iomem *intcp_con_base;
* fcb00000 cb000000 CP system control
*/
static struct map_desc intcp_io_desc[] __initdata = {
static struct map_desc intcp_io_desc[] __initdata __maybe_unused = {
{
.virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
.pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),

5
arch/arm/mach-mvebu/Makefile
View File

@ -3,7 +3,8 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
AFLAGS_coherency_ll.o := -Wa,-march=armv7-a
obj-y += system-controller.o
obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o addr-map.o coherency.o coherency_ll.o pmsu.o
obj-y += system-controller.o
obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o
obj-$(CONFIG_ARCH_MVEBU) += addr-map.o coherency.o coherency_ll.o pmsu.o irq-armada-370-xp.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o

12
arch/arm/mach-s3c24xx/include/mach/debug-macro.S
View File

@ -40,17 +40,17 @@
addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
bic \rd, \rd, #0xff000
ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
and \rd, \rd, #0x00ff0000
teq \rd, #0x00440000 @ is it 2440?
1004:
ldr \rd, [ \rx, # S3C2410_UFSTAT ]
ldr \rd, [\rx, # S3C2410_UFSTAT]
moveq \rd, \rd, lsr #SHIFT_2440TXF
tst \rd, #S3C2410_UFSTAT_TXFULL
.endm
.macro fifo_full_s3c2410 rd, rx
ldr \rd, [ \rx, # S3C2410_UFSTAT ]
ldr \rd, [\rx, # S3C2410_UFSTAT]
tst \rd, #S3C2410_UFSTAT_TXFULL
.endm
@ -68,18 +68,18 @@
addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
bic \rd, \rd, #0xff000
ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
and \rd, \rd, #0x00ff0000
teq \rd, #0x00440000 @ is it 2440?
10000:
ldr \rd, [ \rx, # S3C2410_UFSTAT ]
ldr \rd, [\rx, # S3C2410_UFSTAT]
andne \rd, \rd, #S3C2410_UFSTAT_TXMASK
andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK
.endm
.macro fifo_level_s3c2410 rd, rx
ldr \rd, [ \rx, # S3C2410_UFSTAT ]
ldr \rd, [\rx, # S3C2410_UFSTAT]
and \rd, \rd, #S3C2410_UFSTAT_TXMASK
.endm

4
arch/arm/mach-s3c24xx/include/mach/entry-macro.S
View File

@ -31,10 +31,10 @@
@@ try the interrupt offset register, since it is there
ldr \irqstat, [ \base, #INTPND ]
ldr \irqstat, [\base, #INTPND ]
teq \irqstat, #0
beq 1002f
ldr \irqnr, [ \base, #INTOFFSET ]
ldr \irqnr, [\base, #INTOFFSET ]
mov \tmp, #1
tst \irqstat, \tmp, lsl \irqnr
bne 1001f

2
arch/arm/mach-s3c24xx/pm-h1940.S
View File

@ -30,4 +30,4 @@
h1940_pm_return:
mov r0, #S3C2410_PA_GPIO
ldr pc, [ r0, #S3C2410_GSTATUS3 - S3C24XX_VA_GPIO ]
ldr pc, [r0, #S3C2410_GSTATUS3 - S3C24XX_VA_GPIO]

12
arch/arm/mach-s3c24xx/sleep-s3c2410.S
View File

@ -45,9 +45,9 @@ ENTRY(s3c2410_cpu_suspend)
ldr r4, =S3C2410_REFRESH
ldr r5, =S3C24XX_MISCCR
ldr r6, =S3C2410_CLKCON
ldr r7, [ r4 ] @ get REFRESH (and ensure in TLB)
ldr r8, [ r5 ] @ get MISCCR (and ensure in TLB)
ldr r9, [ r6 ] @ get CLKCON (and ensure in TLB)
ldr r7, [r4] @ get REFRESH (and ensure in TLB)
ldr r8, [r5] @ get MISCCR (and ensure in TLB)
ldr r9, [r6] @ get CLKCON (and ensure in TLB)
orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command
orr r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals
@ -61,8 +61,8 @@ ENTRY(s3c2410_cpu_suspend)
@@ align next bit of code to cache line
.align 5
s3c2410_do_sleep:
streq r7, [ r4 ] @ SDRAM sleep command
streq r8, [ r5 ] @ SDRAM power-down config
streq r9, [ r6 ] @ CPU sleep
streq r7, [r4] @ SDRAM sleep command
streq r8, [r5] @ SDRAM power-down config
streq r9, [r6] @ CPU sleep
1: beq 1b
mov pc, r14

12
arch/arm/mach-s3c24xx/sleep-s3c2412.S
View File

@ -57,12 +57,12 @@ s3c2412_sleep_enter1:
* retry, as simply returning causes the system to lock.
*/
ldrne r9, [ r1 ]
strne r9, [ r1 ]
ldrne r9, [ r2 ]
strne r9, [ r2 ]
ldrne r9, [ r3 ]
strne r9, [ r3 ]
ldrne r9, [r1]
strne r9, [r1]
ldrne r9, [r2]
strne r9, [r2]
ldrne r9, [r3]
strne r9, [r3]
bne s3c2412_sleep_enter1
mov pc, r14

3
arch/arm/mach-sa1100/lart.c
View File

@ -24,9 +24,6 @@
#include "generic.h"
#warning "include/asm/arch-sa1100/ide.h needs fixing for lart"
static struct mcp_plat_data lart_mcp_data = {
.mccr0 = MCCR0_ADM,
.sclk_rate = 11981000,

5
arch/arm/mach-versatile/Kconfig
View File

@ -25,4 +25,9 @@ config MACH_VERSATILE_DT
Include support for the ARM(R) Versatile/PB platform,
using the device tree for discovery
config MACH_VERSATILE_AUTO
def_bool y
depends on !ARCH_VERSATILE_PB && !MACH_VERSATILE_AB
select MACH_VERSATILE_DT
endmenu

2
arch/arm/mach-versatile/core.c
View File

@ -114,7 +114,7 @@ void __init versatile_init_irq(void)
writel(PIC_MASK, VA_SIC_BASE + SIC_INT_PIC_ENABLE);
}
static struct map_desc versatile_io_desc[] __initdata = {
static struct map_desc versatile_io_desc[] __initdata __maybe_unused = {
{
.virtual = IO_ADDRESS(VERSATILE_SYS_BASE),
.pfn = __phys_to_pfn(VERSATILE_SYS_BASE),

4
arch/arm/mach-w90x900/include/mach/entry-macro.S
View File

@ -19,8 +19,8 @@
mov \base, #AIC_BA
ldr \irqnr, [ \base, #AIC_IPER]
ldr \irqnr, [ \base, #AIC_ISNR]
ldr \irqnr, [\base, #AIC_IPER]
ldr \irqnr, [\base, #AIC_ISNR]
cmp \irqnr, #0
.endm

18
arch/arm/plat-samsung/include/plat/debug-macro.S
View File

@ -14,12 +14,12 @@
/* The S5PV210/S5PC110 implementations are as belows. */
.macro fifo_level_s5pv210 rd, rx
ldr \rd, [ \rx, # S3C2410_UFSTAT ]
ldr \rd, [\rx, # S3C2410_UFSTAT]
and \rd, \rd, #S5PV210_UFSTAT_TXMASK
.endm
.macro fifo_full_s5pv210 rd, rx
ldr \rd, [ \rx, # S3C2410_UFSTAT ]
ldr \rd, [\rx, # S3C2410_UFSTAT]
tst \rd, #S5PV210_UFSTAT_TXFULL
.endm
@ -27,7 +27,7 @@
* most widely re-used */
.macro fifo_level_s3c2440 rd, rx
ldr \rd, [ \rx, # S3C2410_UFSTAT ]
ldr \rd, [\rx, # S3C2410_UFSTAT]
and \rd, \rd, #S3C2440_UFSTAT_TXMASK
.endm
@ -36,7 +36,7 @@
#endif
.macro fifo_full_s3c2440 rd, rx
ldr \rd, [ \rx, # S3C2410_UFSTAT ]
ldr \rd, [\rx, # S3C2410_UFSTAT]
tst \rd, #S3C2440_UFSTAT_TXFULL
.endm
@ -45,11 +45,11 @@
#endif
.macro senduart,rd,rx
strb \rd, [\rx, # S3C2410_UTXH ]
strb \rd, [\rx, # S3C2410_UTXH]
.endm
.macro busyuart, rd, rx
ldr \rd, [ \rx, # S3C2410_UFCON ]
ldr \rd, [\rx, # S3C2410_UFCON]
tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
beq 1001f @
@ FIFO enabled...
@ -60,7 +60,7 @@
1001:
@ busy waiting for non fifo
ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
ldr \rd, [\rx, # S3C2410_UTRSTAT]
tst \rd, #S3C2410_UTRSTAT_TXFE
beq 1001b
@ -68,7 +68,7 @@
.endm
.macro waituart,rd,rx
ldr \rd, [ \rx, # S3C2410_UFCON ]
ldr \rd, [\rx, # S3C2410_UFCON]
tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
beq 1001f @
@ FIFO enabled...
@ -79,7 +79,7 @@
b 1002f
1001:
@ idle waiting for non fifo
ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
ldr \rd, [\rx, # S3C2410_UTRSTAT]
tst \rd, #S3C2410_UTRSTAT_TXFE
beq 1001b

2
include/linux/platform_data/i2c-s3c2410.h
View File

@ -15,6 +15,8 @@
#define S3C_IICFLG_FILTER (1<<0) /* enable s3c2440 filter */
struct platform_device;
/**
* struct s3c2410_platform_i2c - Platform data for s3c I2C.
* @bus_num: The bus number to use (if possible).

2
scripts/sortextable.h
View File

@ -182,7 +182,7 @@ do_func(Elf_Ehdr *ehdr, char const *const fname, table_sort_t custom_sort)
_r(&sort_needed_sym->st_value) -
_r(&sort_needed_sec->sh_addr);
#if 1
#if 0
printf("sort done marker at %lx\n",
(unsigned long)((char *)sort_done_location - (char *)ehdr));
#endif