drm: rcar-du: Add tri-planar memory formats support
Those formats are supported on Gen3 only. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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@ -90,13 +90,44 @@ static const struct rcar_du_format_info rcar_du_format_infos[] = {
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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/* In YUV 4:2:2, only NV16 is supported (NV61 isn't) */
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.fourcc = DRM_FORMAT_NV16,
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.bpp = 16,
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.planes = 2,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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},
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/* The following formats are not supported on Gen2 and thus have no
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* associated .pnmr or .edf settings.
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*/
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{
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.fourcc = DRM_FORMAT_NV61,
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.bpp = 16,
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.planes = 2,
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}, {
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.fourcc = DRM_FORMAT_YUV420,
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.bpp = 12,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YVU420,
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.bpp = 12,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YUV422,
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.bpp = 16,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YVU422,
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.bpp = 16,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YUV444,
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.bpp = 24,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YVU444,
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.bpp = 24,
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.planes = 3,
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},
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};
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const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
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@ -144,6 +175,7 @@ rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
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unsigned int max_pitch;
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unsigned int align;
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unsigned int bpp;
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unsigned int i;
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format = rcar_du_format_info(mode_cmd->pixel_format);
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if (format == NULL) {
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@ -156,7 +188,7 @@ rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
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* The pitch and alignment constraints are expressed in pixels on the
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* hardware side and in bytes in the DRM API.
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*/
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bpp = format->planes == 2 ? 1 : format->bpp / 8;
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bpp = format->planes == 1 ? format->bpp / 8 : 1;
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max_pitch = 4096 * bpp;
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if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
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@ -171,8 +203,8 @@ rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
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return ERR_PTR(-EINVAL);
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}
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if (format->planes == 2) {
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if (mode_cmd->pitches[1] != mode_cmd->pitches[0]) {
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for (i = 1; i < format->planes; ++i) {
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if (mode_cmd->pitches[i] != mode_cmd->pitches[0]) {
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dev_dbg(dev->dev,
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"luma and chroma pitches do not match\n");
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return ERR_PTR(-EINVAL);
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@ -106,6 +106,12 @@ static const u32 formats_kms[] = {
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DRM_FORMAT_NV21,
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DRM_FORMAT_NV16,
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DRM_FORMAT_NV61,
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DRM_FORMAT_YUV420,
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DRM_FORMAT_YVU420,
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DRM_FORMAT_YUV422,
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DRM_FORMAT_YVU422,
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DRM_FORMAT_YUV444,
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DRM_FORMAT_YVU444,
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};
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static const u32 formats_v4l2[] = {
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@ -129,6 +135,12 @@ static const u32 formats_v4l2[] = {
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V4L2_PIX_FMT_NV21M,
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V4L2_PIX_FMT_NV16M,
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V4L2_PIX_FMT_NV61M,
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V4L2_PIX_FMT_YUV420M,
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V4L2_PIX_FMT_YVU420M,
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V4L2_PIX_FMT_YUV422M,
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V4L2_PIX_FMT_YVU422M,
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V4L2_PIX_FMT_YUV444M,
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V4L2_PIX_FMT_YVU444M,
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};
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static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
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@ -136,7 +148,6 @@ static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
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struct rcar_du_vsp_plane_state *state =
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to_rcar_vsp_plane_state(plane->plane.state);
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struct drm_framebuffer *fb = plane->plane.state->fb;
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struct drm_gem_cma_object *gem;
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struct v4l2_rect src;
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struct v4l2_rect dst;
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dma_addr_t paddr[2] = { 0, };
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@ -153,12 +164,11 @@ static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
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dst.width = state->state.crtc_w;
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dst.height = state->state.crtc_h;
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gem = drm_fb_cma_get_gem_obj(fb, 0);
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paddr[0] = gem->paddr + fb->offsets[0];
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for (i = 0; i < state->format->planes; ++i) {
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struct drm_gem_cma_object *gem;
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if (state->format->planes == 2) {
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gem = drm_fb_cma_get_gem_obj(fb, 1);
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paddr[1] = gem->paddr + fb->offsets[1];
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gem = drm_fb_cma_get_gem_obj(fb, i);
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paddr[i] = gem->paddr + fb->offsets[i];
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}
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for (i = 0; i < ARRAY_SIZE(formats_kms); ++i) {
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