mfd: tps65912: Add driver for the TPS65912 PMIC
This patch adds support for TPS65912 PMIC MFD core. It provides communication through the I2C and SPI interfaces. It contains the following components: - Regulators - GPIO controller Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>hifive-unleashed-5.1
Andrew F. Davis
Lee Jones
parent
65b6555971
commit
796f5692da
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@ -1180,6 +1180,30 @@ config MFD_TPS65910
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if you say yes here you get support for the TPS65910 series of
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Power Management chips.
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config MFD_TPS65912
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tristate
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select MFD_CORE
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select REGMAP
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select REGMAP_IRQ
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config MFD_TPS65912_I2C
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tristate "TI TPS65912 Power Management chip with I2C"
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select MFD_TPS65912
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select REGMAP_I2C
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depends on I2C
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help
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If you say yes here you get support for the TPS65912 series of
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PM chips with I2C interface.
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config MFD_TPS65912_SPI
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tristate "TI TPS65912 Power Management chip with SPI"
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select MFD_TPS65912
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select REGMAP_SPI
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depends on SPI_MASTER
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help
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If you say yes here you get support for the TPS65912 series of
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PM chips with SPI interface.
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config MFD_TPS80031
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bool "TI TPS80031/TPS80032 Power Management chips"
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depends on I2C=y
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@ -73,6 +73,9 @@ obj-$(CONFIG_TPS6507X) += tps6507x.o
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obj-$(CONFIG_MFD_TPS65217) += tps65217.o
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obj-$(CONFIG_MFD_TPS65218) += tps65218.o
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obj-$(CONFIG_MFD_TPS65910) += tps65910.o
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obj-$(CONFIG_MFD_TPS65912) += tps65912-core.o
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obj-$(CONFIG_MFD_TPS65912_I2C) += tps65912-i2c.o
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obj-$(CONFIG_MFD_TPS65912_SPI) += tps65912-spi.o
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obj-$(CONFIG_MFD_TPS80031) += tps80031.o
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obj-$(CONFIG_MENELAUS) += menelaus.o
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@ -0,0 +1,111 @@
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/*
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* Core functions for TI TPS65912x PMICs
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*
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* Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
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* Andrew F. Davis <afd@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether expressed or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License version 2 for more details.
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*
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* Based on the TPS65218 driver and the previous TPS65912 driver by
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* Margarita Olaya Cabrera <magi@slimlogic.co.uk>
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*/
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#include <linux/interrupt.h>
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#include <linux/mfd/core.h>
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#include <linux/module.h>
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#include <linux/mfd/tps65912.h>
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static const struct mfd_cell tps65912_cells[] = {
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{ .name = "tps65912-regulator", },
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{ .name = "tps65912-gpio", },
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};
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static const struct regmap_irq tps65912_irqs[] = {
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/* INT_STS IRQs */
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REGMAP_IRQ_REG(TPS65912_IRQ_PWRHOLD_F, 0, TPS65912_INT_STS_PWRHOLD_F),
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REGMAP_IRQ_REG(TPS65912_IRQ_VMON, 0, TPS65912_INT_STS_VMON),
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REGMAP_IRQ_REG(TPS65912_IRQ_PWRON, 0, TPS65912_INT_STS_PWRON),
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REGMAP_IRQ_REG(TPS65912_IRQ_PWRON_LP, 0, TPS65912_INT_STS_PWRON_LP),
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REGMAP_IRQ_REG(TPS65912_IRQ_PWRHOLD_R, 0, TPS65912_INT_STS_PWRHOLD_R),
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REGMAP_IRQ_REG(TPS65912_IRQ_HOTDIE, 0, TPS65912_INT_STS_HOTDIE),
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REGMAP_IRQ_REG(TPS65912_IRQ_GPIO1_R, 0, TPS65912_INT_STS_GPIO1_R),
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REGMAP_IRQ_REG(TPS65912_IRQ_GPIO1_F, 0, TPS65912_INT_STS_GPIO1_F),
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/* INT_STS2 IRQs */
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REGMAP_IRQ_REG(TPS65912_IRQ_GPIO2_R, 1, TPS65912_INT_STS2_GPIO2_R),
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REGMAP_IRQ_REG(TPS65912_IRQ_GPIO2_F, 1, TPS65912_INT_STS2_GPIO2_F),
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REGMAP_IRQ_REG(TPS65912_IRQ_GPIO3_R, 1, TPS65912_INT_STS2_GPIO3_R),
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REGMAP_IRQ_REG(TPS65912_IRQ_GPIO3_F, 1, TPS65912_INT_STS2_GPIO3_F),
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REGMAP_IRQ_REG(TPS65912_IRQ_GPIO4_R, 1, TPS65912_INT_STS2_GPIO4_R),
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REGMAP_IRQ_REG(TPS65912_IRQ_GPIO4_F, 1, TPS65912_INT_STS2_GPIO4_F),
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REGMAP_IRQ_REG(TPS65912_IRQ_GPIO5_R, 1, TPS65912_INT_STS2_GPIO5_R),
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REGMAP_IRQ_REG(TPS65912_IRQ_GPIO5_F, 1, TPS65912_INT_STS2_GPIO5_F),
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/* INT_STS3 IRQs */
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC1, 2, TPS65912_INT_STS3_PGOOD_DCDC1),
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC2, 2, TPS65912_INT_STS3_PGOOD_DCDC2),
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC3, 2, TPS65912_INT_STS3_PGOOD_DCDC3),
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC4, 2, TPS65912_INT_STS3_PGOOD_DCDC4),
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO1, 2, TPS65912_INT_STS3_PGOOD_LDO1),
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO2, 2, TPS65912_INT_STS3_PGOOD_LDO2),
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO3, 2, TPS65912_INT_STS3_PGOOD_LDO3),
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO4, 2, TPS65912_INT_STS3_PGOOD_LDO4),
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/* INT_STS4 IRQs */
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO5, 3, TPS65912_INT_STS4_PGOOD_LDO5),
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO6, 3, TPS65912_INT_STS4_PGOOD_LDO6),
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO7, 3, TPS65912_INT_STS4_PGOOD_LDO7),
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO8, 3, TPS65912_INT_STS4_PGOOD_LDO8),
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO9, 3, TPS65912_INT_STS4_PGOOD_LDO9),
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REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO10, 3, TPS65912_INT_STS4_PGOOD_LDO10),
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};
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static struct regmap_irq_chip tps65912_irq_chip = {
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.name = "tps65912",
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.irqs = tps65912_irqs,
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.num_irqs = ARRAY_SIZE(tps65912_irqs),
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.num_regs = 4,
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.irq_reg_stride = 2,
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.mask_base = TPS65912_INT_MSK,
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.status_base = TPS65912_INT_STS,
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.ack_base = TPS65912_INT_STS,
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.init_ack_masked = true,
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};
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int tps65912_device_init(struct tps65912 *tps)
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{
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int ret;
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ret = regmap_add_irq_chip(tps->regmap, tps->irq, IRQF_ONESHOT, 0,
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&tps65912_irq_chip, &tps->irq_data);
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if (ret)
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return ret;
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ret = mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, tps65912_cells,
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ARRAY_SIZE(tps65912_cells), NULL, 0,
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regmap_irq_get_domain(tps->irq_data));
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if (ret) {
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regmap_del_irq_chip(tps->irq, tps->irq_data);
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return ret;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(tps65912_device_init);
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int tps65912_device_exit(struct tps65912 *tps)
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{
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regmap_del_irq_chip(tps->irq, tps->irq_data);
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return 0;
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}
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EXPORT_SYMBOL_GPL(tps65912_device_exit);
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MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
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MODULE_DESCRIPTION("TPS65912x MFD Driver");
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MODULE_LICENSE("GPL v2");
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@ -0,0 +1,79 @@
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/*
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* I2C access driver for TI TPS65912x PMICs
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*
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* Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
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* Andrew F. Davis <afd@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether expressed or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License version 2 for more details.
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*
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* Based on the TPS65218 driver and the previous TPS65912 driver by
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* Margarita Olaya Cabrera <magi@slimlogic.co.uk>
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*/
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/mfd/tps65912.h>
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static const struct of_device_id tps65912_i2c_of_match_table[] = {
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{ .compatible = "ti,tps65912", },
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{ /* sentinel */ }
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};
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static int tps65912_i2c_probe(struct i2c_client *client,
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const struct i2c_device_id *ids)
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{
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struct tps65912 *tps;
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tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);
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if (!tps)
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return -ENOMEM;
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i2c_set_clientdata(client, tps);
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tps->dev = &client->dev;
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tps->irq = client->irq;
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tps->regmap = devm_regmap_init_i2c(client, &tps65912_regmap_config);
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if (IS_ERR(tps->regmap)) {
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dev_err(tps->dev, "Failed to initialize register map\n");
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return PTR_ERR(tps->regmap);
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}
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return tps65912_device_init(tps);
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}
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static int tps65912_i2c_remove(struct i2c_client *client)
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{
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struct tps65912 *tps = i2c_get_clientdata(client);
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return tps65912_device_exit(tps);
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}
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static const struct i2c_device_id tps65912_i2c_id_table[] = {
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{ "tps65912", 0 },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(i2c, tps65912_i2c_id_table);
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static struct i2c_driver tps65912_i2c_driver = {
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.driver = {
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.name = "tps65912",
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.of_match_table = tps65912_i2c_of_match_table,
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},
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.probe = tps65912_i2c_probe,
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.remove = tps65912_i2c_remove,
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.id_table = tps65912_i2c_id_table,
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};
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module_i2c_driver(tps65912_i2c_driver);
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MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
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MODULE_DESCRIPTION("TPS65912x I2C Interface Driver");
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MODULE_LICENSE("GPL v2");
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@ -0,0 +1,78 @@
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/*
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* SPI access driver for TI TPS65912x PMICs
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*
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* Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
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* Andrew F. Davis <afd@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether expressed or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License version 2 for more details.
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*
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* Based on the TPS65218 driver and the previous TPS65912 driver by
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* Margarita Olaya Cabrera <magi@slimlogic.co.uk>
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*/
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/spi/spi.h>
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#include <linux/mfd/tps65912.h>
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static const struct of_device_id tps65912_spi_of_match_table[] = {
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{ .compatible = "ti,tps65912", },
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{ /* sentinel */ }
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};
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static int tps65912_spi_probe(struct spi_device *spi)
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{
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struct tps65912 *tps;
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tps = devm_kzalloc(&spi->dev, sizeof(*tps), GFP_KERNEL);
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if (!tps)
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return -ENOMEM;
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spi_set_drvdata(spi, tps);
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tps->dev = &spi->dev;
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tps->irq = spi->irq;
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tps->regmap = devm_regmap_init_spi(spi, &tps65912_regmap_config);
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if (IS_ERR(tps->regmap)) {
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dev_err(tps->dev, "Failed to initialize register map\n");
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return PTR_ERR(tps->regmap);
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}
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return tps65912_device_init(tps);
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}
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static int tps65912_spi_remove(struct spi_device *client)
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{
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struct tps65912 *tps = spi_get_drvdata(client);
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return tps65912_device_exit(tps);
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}
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static const struct spi_device_id tps65912_spi_id_table[] = {
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{ "tps65912", 0 },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(spi, tps65912_spi_id_table);
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static struct spi_driver tps65912_spi_driver = {
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.driver = {
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.name = "tps65912",
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.of_match_table = tps65912_spi_of_match_table,
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},
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.probe = tps65912_spi_probe,
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.remove = tps65912_spi_remove,
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.id_table = tps65912_spi_id_table,
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};
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module_spi_driver(tps65912_spi_driver);
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MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
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MODULE_DESCRIPTION("TPS65912x SPI Interface Driver");
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MODULE_LICENSE("GPL v2");
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@ -0,0 +1,341 @@
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/*
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* Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
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* Andrew F. Davis <afd@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether expressed or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License version 2 for more details.
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*
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* Based on the TPS65218 driver and the previous TPS65912 driver by
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* Margarita Olaya Cabrera <magi@slimlogic.co.uk>
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*/
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#ifndef __LINUX_MFD_TPS65912_H
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#define __LINUX_MFD_TPS65912_H
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#include <linux/device.h>
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#include <linux/regmap.h>
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/* List of registers for TPS65912 */
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#define TPS65912_DCDC1_CTRL 0x00
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#define TPS65912_DCDC2_CTRL 0x01
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#define TPS65912_DCDC3_CTRL 0x02
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#define TPS65912_DCDC4_CTRL 0x03
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#define TPS65912_DCDC1_OP 0x04
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#define TPS65912_DCDC1_AVS 0x05
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#define TPS65912_DCDC1_LIMIT 0x06
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#define TPS65912_DCDC2_OP 0x07
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#define TPS65912_DCDC2_AVS 0x08
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#define TPS65912_DCDC2_LIMIT 0x09
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#define TPS65912_DCDC3_OP 0x0A
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#define TPS65912_DCDC3_AVS 0x0B
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#define TPS65912_DCDC3_LIMIT 0x0C
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#define TPS65912_DCDC4_OP 0x0D
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#define TPS65912_DCDC4_AVS 0x0E
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#define TPS65912_DCDC4_LIMIT 0x0F
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#define TPS65912_LDO1_OP 0x10
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#define TPS65912_LDO1_AVS 0x11
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#define TPS65912_LDO1_LIMIT 0x12
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#define TPS65912_LDO2_OP 0x13
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#define TPS65912_LDO2_AVS 0x14
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#define TPS65912_LDO2_LIMIT 0x15
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#define TPS65912_LDO3_OP 0x16
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#define TPS65912_LDO3_AVS 0x17
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#define TPS65912_LDO3_LIMIT 0x18
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#define TPS65912_LDO4_OP 0x19
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#define TPS65912_LDO4_AVS 0x1A
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#define TPS65912_LDO4_LIMIT 0x1B
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#define TPS65912_LDO5 0x1C
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#define TPS65912_LDO6 0x1D
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#define TPS65912_LDO7 0x1E
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#define TPS65912_LDO8 0x1F
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#define TPS65912_LDO9 0x20
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#define TPS65912_LDO10 0x21
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#define TPS65912_THRM 0x22
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#define TPS65912_CLK32OUT 0x23
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#define TPS65912_DEVCTRL 0x24
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#define TPS65912_DEVCTRL2 0x25
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#define TPS65912_I2C_SPI_CFG 0x26
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#define TPS65912_KEEP_ON 0x27
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#define TPS65912_KEEP_ON2 0x28
|
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#define TPS65912_SET_OFF1 0x29
|
||||
#define TPS65912_SET_OFF2 0x2A
|
||||
#define TPS65912_DEF_VOLT 0x2B
|
||||
#define TPS65912_DEF_VOLT_MAPPING 0x2C
|
||||
#define TPS65912_DISCHARGE 0x2D
|
||||
#define TPS65912_DISCHARGE2 0x2E
|
||||
#define TPS65912_EN1_SET1 0x2F
|
||||
#define TPS65912_EN1_SET2 0x30
|
||||
#define TPS65912_EN2_SET1 0x31
|
||||
#define TPS65912_EN2_SET2 0x32
|
||||
#define TPS65912_EN3_SET1 0x33
|
||||
#define TPS65912_EN3_SET2 0x34
|
||||
#define TPS65912_EN4_SET1 0x35
|
||||
#define TPS65912_EN4_SET2 0x36
|
||||
#define TPS65912_PGOOD 0x37
|
||||
#define TPS65912_PGOOD2 0x38
|
||||
#define TPS65912_INT_STS 0x39
|
||||
#define TPS65912_INT_MSK 0x3A
|
||||
#define TPS65912_INT_STS2 0x3B
|
||||
#define TPS65912_INT_MSK2 0x3C
|
||||
#define TPS65912_INT_STS3 0x3D
|
||||
#define TPS65912_INT_MSK3 0x3E
|
||||
#define TPS65912_INT_STS4 0x3F
|
||||
#define TPS65912_INT_MSK4 0x40
|
||||
#define TPS65912_GPIO1 0x41
|
||||
#define TPS65912_GPIO2 0x42
|
||||
#define TPS65912_GPIO3 0x43
|
||||
#define TPS65912_GPIO4 0x44
|
||||
#define TPS65912_GPIO5 0x45
|
||||
#define TPS65912_VMON 0x46
|
||||
#define TPS65912_LEDA_CTRL1 0x47
|
||||
#define TPS65912_LEDA_CTRL2 0x48
|
||||
#define TPS65912_LEDA_CTRL3 0x49
|
||||
#define TPS65912_LEDA_CTRL4 0x4A
|
||||
#define TPS65912_LEDA_CTRL5 0x4B
|
||||
#define TPS65912_LEDA_CTRL6 0x4C
|
||||
#define TPS65912_LEDA_CTRL7 0x4D
|
||||
#define TPS65912_LEDA_CTRL8 0x4E
|
||||
#define TPS65912_LEDB_CTRL1 0x4F
|
||||
#define TPS65912_LEDB_CTRL2 0x50
|
||||
#define TPS65912_LEDB_CTRL3 0x51
|
||||
#define TPS65912_LEDB_CTRL4 0x52
|
||||
#define TPS65912_LEDB_CTRL5 0x53
|
||||
#define TPS65912_LEDB_CTRL6 0x54
|
||||
#define TPS65912_LEDB_CTRL7 0x55
|
||||
#define TPS65912_LEDB_CTRL8 0x56
|
||||
#define TPS65912_LEDC_CTRL1 0x57
|
||||
#define TPS65912_LEDC_CTRL2 0x58
|
||||
#define TPS65912_LEDC_CTRL3 0x59
|
||||
#define TPS65912_LEDC_CTRL4 0x5A
|
||||
#define TPS65912_LEDC_CTRL5 0x5B
|
||||
#define TPS65912_LEDC_CTRL6 0x5C
|
||||
#define TPS65912_LEDC_CTRL7 0x5D
|
||||
#define TPS65912_LEDC_CTRL8 0x5E
|
||||
#define TPS65912_LED_RAMP_UP_TIME 0x5F
|
||||
#define TPS65912_LED_RAMP_DOWN_TIME 0x60
|
||||
#define TPS65912_LED_SEQ_EN 0x61
|
||||
#define TPS65912_LOADSWITCH 0x62
|
||||
#define TPS65912_SPARE 0x63
|
||||
#define TPS65912_VERNUM 0x64
|
||||
#define TPS6591X_MAX_REGISTER 0x64
|
||||
|
||||
/* INT_STS Register field definitions */
|
||||
#define TPS65912_INT_STS_PWRHOLD_F BIT(0)
|
||||
#define TPS65912_INT_STS_VMON BIT(1)
|
||||
#define TPS65912_INT_STS_PWRON BIT(2)
|
||||
#define TPS65912_INT_STS_PWRON_LP BIT(3)
|
||||
#define TPS65912_INT_STS_PWRHOLD_R BIT(4)
|
||||
#define TPS65912_INT_STS_HOTDIE BIT(5)
|
||||
#define TPS65912_INT_STS_GPIO1_R BIT(6)
|
||||
#define TPS65912_INT_STS_GPIO1_F BIT(7)
|
||||
|
||||
/* INT_STS Register field definitions */
|
||||
#define TPS65912_INT_STS2_GPIO2_R BIT(0)
|
||||
#define TPS65912_INT_STS2_GPIO2_F BIT(1)
|
||||
#define TPS65912_INT_STS2_GPIO3_R BIT(2)
|
||||
#define TPS65912_INT_STS2_GPIO3_F BIT(3)
|
||||
#define TPS65912_INT_STS2_GPIO4_R BIT(4)
|
||||
#define TPS65912_INT_STS2_GPIO4_F BIT(5)
|
||||
#define TPS65912_INT_STS2_GPIO5_R BIT(6)
|
||||
#define TPS65912_INT_STS2_GPIO5_F BIT(7)
|
||||
|
||||
/* INT_STS Register field definitions */
|
||||
#define TPS65912_INT_STS3_PGOOD_DCDC1 BIT(0)
|
||||
#define TPS65912_INT_STS3_PGOOD_DCDC2 BIT(1)
|
||||
#define TPS65912_INT_STS3_PGOOD_DCDC3 BIT(2)
|
||||
#define TPS65912_INT_STS3_PGOOD_DCDC4 BIT(3)
|
||||
#define TPS65912_INT_STS3_PGOOD_LDO1 BIT(4)
|
||||
#define TPS65912_INT_STS3_PGOOD_LDO2 BIT(5)
|
||||
#define TPS65912_INT_STS3_PGOOD_LDO3 BIT(6)
|
||||
#define TPS65912_INT_STS3_PGOOD_LDO4 BIT(7)
|
||||
|
||||
/* INT_STS Register field definitions */
|
||||
#define TPS65912_INT_STS4_PGOOD_LDO5 BIT(0)
|
||||
#define TPS65912_INT_STS4_PGOOD_LDO6 BIT(1)
|
||||
#define TPS65912_INT_STS4_PGOOD_LDO7 BIT(2)
|
||||
#define TPS65912_INT_STS4_PGOOD_LDO8 BIT(3)
|
||||
#define TPS65912_INT_STS4_PGOOD_LDO9 BIT(4)
|
||||
#define TPS65912_INT_STS4_PGOOD_LDO10 BIT(5)
|
||||
|
||||
/* GPIO 1 and 2 Register field definitions */
|
||||
#define GPIO_SLEEP_MASK 0x80
|
||||
#define GPIO_SLEEP_SHIFT 7
|
||||
#define GPIO_DEB_MASK 0x10
|
||||
#define GPIO_DEB_SHIFT 4
|
||||
#define GPIO_CFG_MASK 0x04
|
||||
#define GPIO_CFG_SHIFT 2
|
||||
#define GPIO_STS_MASK 0x02
|
||||
#define GPIO_STS_SHIFT 1
|
||||
#define GPIO_SET_MASK 0x01
|
||||
#define GPIO_SET_SHIFT 0
|
||||
|
||||
/* GPIO 3 Register field definitions */
|
||||
#define GPIO3_SLEEP_MASK 0x80
|
||||
#define GPIO3_SLEEP_SHIFT 7
|
||||
#define GPIO3_SEL_MASK 0x40
|
||||
#define GPIO3_SEL_SHIFT 6
|
||||
#define GPIO3_ODEN_MASK 0x20
|
||||
#define GPIO3_ODEN_SHIFT 5
|
||||
#define GPIO3_DEB_MASK 0x10
|
||||
#define GPIO3_DEB_SHIFT 4
|
||||
#define GPIO3_PDEN_MASK 0x08
|
||||
#define GPIO3_PDEN_SHIFT 3
|
||||
#define GPIO3_CFG_MASK 0x04
|
||||
#define GPIO3_CFG_SHIFT 2
|
||||
#define GPIO3_STS_MASK 0x02
|
||||
#define GPIO3_STS_SHIFT 1
|
||||
#define GPIO3_SET_MASK 0x01
|
||||
#define GPIO3_SET_SHIFT 0
|
||||
|
||||
/* GPIO 4 Register field definitions */
|
||||
#define GPIO4_SLEEP_MASK 0x80
|
||||
#define GPIO4_SLEEP_SHIFT 7
|
||||
#define GPIO4_SEL_MASK 0x40
|
||||
#define GPIO4_SEL_SHIFT 6
|
||||
#define GPIO4_ODEN_MASK 0x20
|
||||
#define GPIO4_ODEN_SHIFT 5
|
||||
#define GPIO4_DEB_MASK 0x10
|
||||
#define GPIO4_DEB_SHIFT 4
|
||||
#define GPIO4_PDEN_MASK 0x08
|
||||
#define GPIO4_PDEN_SHIFT 3
|
||||
#define GPIO4_CFG_MASK 0x04
|
||||
#define GPIO4_CFG_SHIFT 2
|
||||
#define GPIO4_STS_MASK 0x02
|
||||
#define GPIO4_STS_SHIFT 1
|
||||
#define GPIO4_SET_MASK 0x01
|
||||
#define GPIO4_SET_SHIFT 0
|
||||
|
||||
/* Register THERM (0x80) register.RegisterDescription */
|
||||
#define THERM_THERM_HD_MASK 0x20
|
||||
#define THERM_THERM_HD_SHIFT 5
|
||||
#define THERM_THERM_TS_MASK 0x10
|
||||
#define THERM_THERM_TS_SHIFT 4
|
||||
#define THERM_THERM_HDSEL_MASK 0x0C
|
||||
#define THERM_THERM_HDSEL_SHIFT 2
|
||||
#define THERM_RSVD1_MASK 0x02
|
||||
#define THERM_RSVD1_SHIFT 1
|
||||
#define THERM_THERM_STATE_MASK 0x01
|
||||
#define THERM_THERM_STATE_SHIFT 0
|
||||
|
||||
/* Register DCDCCTRL1 register.RegisterDescription */
|
||||
#define DCDCCTRL_VCON_ENABLE_MASK 0x80
|
||||
#define DCDCCTRL_VCON_ENABLE_SHIFT 7
|
||||
#define DCDCCTRL_VCON_RANGE1_MASK 0x40
|
||||
#define DCDCCTRL_VCON_RANGE1_SHIFT 6
|
||||
#define DCDCCTRL_VCON_RANGE0_MASK 0x20
|
||||
#define DCDCCTRL_VCON_RANGE0_SHIFT 5
|
||||
#define DCDCCTRL_TSTEP2_MASK 0x10
|
||||
#define DCDCCTRL_TSTEP2_SHIFT 4
|
||||
#define DCDCCTRL_TSTEP1_MASK 0x08
|
||||
#define DCDCCTRL_TSTEP1_SHIFT 3
|
||||
#define DCDCCTRL_TSTEP0_MASK 0x04
|
||||
#define DCDCCTRL_TSTEP0_SHIFT 2
|
||||
#define DCDCCTRL_DCDC1_MODE_MASK 0x02
|
||||
#define DCDCCTRL_DCDC1_MODE_SHIFT 1
|
||||
|
||||
/* Register DCDCCTRL2 and DCDCCTRL3 register.RegisterDescription */
|
||||
#define DCDCCTRL_TSTEP2_MASK 0x10
|
||||
#define DCDCCTRL_TSTEP2_SHIFT 4
|
||||
#define DCDCCTRL_TSTEP1_MASK 0x08
|
||||
#define DCDCCTRL_TSTEP1_SHIFT 3
|
||||
#define DCDCCTRL_TSTEP0_MASK 0x04
|
||||
#define DCDCCTRL_TSTEP0_SHIFT 2
|
||||
#define DCDCCTRL_DCDC_MODE_MASK 0x02
|
||||
#define DCDCCTRL_DCDC_MODE_SHIFT 1
|
||||
#define DCDCCTRL_RSVD0_MASK 0x01
|
||||
#define DCDCCTRL_RSVD0_SHIFT 0
|
||||
|
||||
/* Register DCDCCTRL4 register.RegisterDescription */
|
||||
#define DCDCCTRL_RAMP_TIME_MASK 0x01
|
||||
#define DCDCCTRL_RAMP_TIME_SHIFT 0
|
||||
|
||||
/* Register DCDCx_AVS */
|
||||
#define DCDC_AVS_ENABLE_MASK 0x80
|
||||
#define DCDC_AVS_ENABLE_SHIFT 7
|
||||
#define DCDC_AVS_ECO_MASK 0x40
|
||||
#define DCDC_AVS_ECO_SHIFT 6
|
||||
|
||||
/* Register DCDCx_LIMIT */
|
||||
#define DCDC_LIMIT_RANGE_MASK 0xC0
|
||||
#define DCDC_LIMIT_RANGE_SHIFT 6
|
||||
#define DCDC_LIMIT_MAX_SEL_MASK 0x3F
|
||||
#define DCDC_LIMIT_MAX_SEL_SHIFT 0
|
||||
|
||||
/* Define the TPS65912 IRQ numbers */
|
||||
enum tps65912_irqs {
|
||||
/* INT_STS registers */
|
||||
TPS65912_IRQ_PWRHOLD_F,
|
||||
TPS65912_IRQ_VMON,
|
||||
TPS65912_IRQ_PWRON,
|
||||
TPS65912_IRQ_PWRON_LP,
|
||||
TPS65912_IRQ_PWRHOLD_R,
|
||||
TPS65912_IRQ_HOTDIE,
|
||||
TPS65912_IRQ_GPIO1_R,
|
||||
TPS65912_IRQ_GPIO1_F,
|
||||
/* INT_STS2 registers */
|
||||
TPS65912_IRQ_GPIO2_R,
|
||||
TPS65912_IRQ_GPIO2_F,
|
||||
TPS65912_IRQ_GPIO3_R,
|
||||
TPS65912_IRQ_GPIO3_F,
|
||||
TPS65912_IRQ_GPIO4_R,
|
||||
TPS65912_IRQ_GPIO4_F,
|
||||
TPS65912_IRQ_GPIO5_R,
|
||||
TPS65912_IRQ_GPIO5_F,
|
||||
/* INT_STS3 registers */
|
||||
TPS65912_IRQ_PGOOD_DCDC1,
|
||||
TPS65912_IRQ_PGOOD_DCDC2,
|
||||
TPS65912_IRQ_PGOOD_DCDC3,
|
||||
TPS65912_IRQ_PGOOD_DCDC4,
|
||||
TPS65912_IRQ_PGOOD_LDO1,
|
||||
TPS65912_IRQ_PGOOD_LDO2,
|
||||
TPS65912_IRQ_PGOOD_LDO3,
|
||||
TPS65912_IRQ_PGOOD_LDO4,
|
||||
/* INT_STS4 registers */
|
||||
TPS65912_IRQ_PGOOD_LDO5,
|
||||
TPS65912_IRQ_PGOOD_LDO6,
|
||||
TPS65912_IRQ_PGOOD_LDO7,
|
||||
TPS65912_IRQ_PGOOD_LDO8,
|
||||
TPS65912_IRQ_PGOOD_LDO9,
|
||||
TPS65912_IRQ_PGOOD_LDO10,
|
||||
};
|
||||
|
||||
/*
|
||||
* struct tps65912 - state holder for the tps65912 driver
|
||||
*
|
||||
* Device data may be used to access the TPS65912 chip
|
||||
*/
|
||||
struct tps65912 {
|
||||
struct device *dev;
|
||||
struct regmap *regmap;
|
||||
|
||||
/* IRQ Data */
|
||||
int irq;
|
||||
struct regmap_irq_chip_data *irq_data;
|
||||
};
|
||||
|
||||
static const struct regmap_range tps65912_yes_ranges[] = {
|
||||
regmap_reg_range(TPS65912_INT_STS, TPS65912_GPIO5),
|
||||
};
|
||||
|
||||
static const struct regmap_access_table tps65912_volatile_table = {
|
||||
.yes_ranges = tps65912_yes_ranges,
|
||||
.n_yes_ranges = ARRAY_SIZE(tps65912_yes_ranges),
|
||||
};
|
||||
|
||||
static const struct regmap_config tps65912_regmap_config = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
.cache_type = REGCACHE_RBTREE,
|
||||
.volatile_table = &tps65912_volatile_table,
|
||||
};
|
||||
|
||||
int tps65912_device_init(struct tps65912 *tps);
|
||||
int tps65912_device_exit(struct tps65912 *tps);
|
||||
|
||||
#endif /* __LINUX_MFD_TPS65912_H */
|
||||
Loading…
Reference in New Issue