tg3: Rename tg3 phy ID preprocessor definitions
The phylib presents the phy ID in a different format than the one tg3 has traditionally used. To highlight the distinction, this patch prepends the tg3 native phy ID format with TG3. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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79eb690436
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@ -1995,7 +1995,7 @@ out:
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}
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/* Set Extended packet length bit (bit 14) on all chips that */
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/* support jumbo frames */
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if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) {
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if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5401) {
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/* Cannot do read-modify-write on 5401 */
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tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x4c20);
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} else if (tp->tg3_flags & TG3_FLAG_JUMBO_CAPABLE) {
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@ -2147,7 +2147,7 @@ static int tg3_5700_link_polarity(struct tg3 *tp, u32 speed)
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{
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if (tp->led_ctrl == LED_CTRL_MODE_PHY_2)
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return 1;
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else if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5411) {
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else if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5411) {
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if (speed != SPEED_10)
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return 1;
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} else if (speed == SPEED_10)
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@ -3077,7 +3077,7 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
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if (force_reset)
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tg3_phy_reset(tp);
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if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) {
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if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5401) {
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tg3_readphy(tp, MII_BMSR, &bmsr);
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if (tg3_readphy(tp, MII_BMSR, &bmsr) ||
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!(tp->tg3_flags & TG3_FLAG_INIT_COMPLETE))
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@ -3098,7 +3098,8 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
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}
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}
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if ((tp->phy_id & PHY_ID_REV_MASK) == PHY_REV_BCM5401_B0 &&
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if ((tp->phy_id & TG3_PHY_ID_REV_MASK) ==
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TG3_PHY_REV_BCM5401_B0 &&
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!(bmsr & BMSR_LSTATUS) &&
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tp->link_config.active_speed == SPEED_1000) {
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err = tg3_phy_reset(tp);
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@ -3253,7 +3254,7 @@ relink:
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/* ??? Without this setting Netgear GA302T PHY does not
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* ??? send/receive packets...
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*/
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if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5411 &&
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if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5411 &&
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tp->pci_chip_rev_id == CHIPREV_ID_5700_ALTIMA) {
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tp->mi_mode |= MAC_MI_MODE_AUTO_POLL;
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tw32_f(MAC_MI_MODE, tp->mi_mode);
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@ -3968,7 +3969,7 @@ static int tg3_setup_fiber_phy(struct tg3 *tp, int force_reset)
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tw32_f(MAC_MODE, tp->mac_mode);
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udelay(40);
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if (tp->phy_id == PHY_ID_BCM8002)
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if (tp->phy_id == TG3_PHY_ID_BCM8002)
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tg3_init_bcm8002(tp);
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/* Enable link change event even when serdes polling. */
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@ -10854,9 +10855,10 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
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tw32_f(MAC_RX_MODE, tp->rx_mode);
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}
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) {
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if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401)
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u32 masked_phy_id = tp->phy_id & TG3_PHY_ID_MASK;
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if (masked_phy_id == TG3_PHY_ID_BCM5401)
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mac_mode &= ~MAC_MODE_LINK_POLARITY;
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else if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5411)
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else if (masked_phy_id == TG3_PHY_ID_BCM5411)
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mac_mode |= MAC_MODE_LINK_POLARITY;
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tg3_writephy(tp, MII_TG3_EXT_CTRL,
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MII_TG3_EXT_CTRL_LNK3_LED_MODE);
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@ -12115,61 +12117,61 @@ struct subsys_tbl_ent {
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static struct subsys_tbl_ent subsys_id_to_phy_id[] __devinitdata = {
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/* Broadcom boards. */
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{ TG3PCI_SUBVENDOR_ID_BROADCOM,
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TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6, PHY_ID_BCM5401 },
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TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6, TG3_PHY_ID_BCM5401 },
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{ TG3PCI_SUBVENDOR_ID_BROADCOM,
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TG3PCI_SUBDEVICE_ID_BROADCOM_95701A5, PHY_ID_BCM5701 },
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TG3PCI_SUBDEVICE_ID_BROADCOM_95701A5, TG3_PHY_ID_BCM5701 },
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{ TG3PCI_SUBVENDOR_ID_BROADCOM,
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TG3PCI_SUBDEVICE_ID_BROADCOM_95700T6, PHY_ID_BCM8002 },
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TG3PCI_SUBDEVICE_ID_BROADCOM_95700T6, TG3_PHY_ID_BCM8002 },
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{ TG3PCI_SUBVENDOR_ID_BROADCOM,
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TG3PCI_SUBDEVICE_ID_BROADCOM_95700A9, 0 },
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{ TG3PCI_SUBVENDOR_ID_BROADCOM,
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TG3PCI_SUBDEVICE_ID_BROADCOM_95701T1, PHY_ID_BCM5701 },
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TG3PCI_SUBDEVICE_ID_BROADCOM_95701T1, TG3_PHY_ID_BCM5701 },
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{ TG3PCI_SUBVENDOR_ID_BROADCOM,
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TG3PCI_SUBDEVICE_ID_BROADCOM_95701T8, PHY_ID_BCM5701 },
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TG3PCI_SUBDEVICE_ID_BROADCOM_95701T8, TG3_PHY_ID_BCM5701 },
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{ TG3PCI_SUBVENDOR_ID_BROADCOM,
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TG3PCI_SUBDEVICE_ID_BROADCOM_95701A7, 0 },
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{ TG3PCI_SUBVENDOR_ID_BROADCOM,
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TG3PCI_SUBDEVICE_ID_BROADCOM_95701A10, PHY_ID_BCM5701 },
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TG3PCI_SUBDEVICE_ID_BROADCOM_95701A10, TG3_PHY_ID_BCM5701 },
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{ TG3PCI_SUBVENDOR_ID_BROADCOM,
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TG3PCI_SUBDEVICE_ID_BROADCOM_95701A12, PHY_ID_BCM5701 },
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TG3PCI_SUBDEVICE_ID_BROADCOM_95701A12, TG3_PHY_ID_BCM5701 },
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{ TG3PCI_SUBVENDOR_ID_BROADCOM,
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TG3PCI_SUBDEVICE_ID_BROADCOM_95703AX1, PHY_ID_BCM5703 },
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TG3PCI_SUBDEVICE_ID_BROADCOM_95703AX1, TG3_PHY_ID_BCM5703 },
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{ TG3PCI_SUBVENDOR_ID_BROADCOM,
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TG3PCI_SUBDEVICE_ID_BROADCOM_95703AX2, PHY_ID_BCM5703 },
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TG3PCI_SUBDEVICE_ID_BROADCOM_95703AX2, TG3_PHY_ID_BCM5703 },
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/* 3com boards. */
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{ TG3PCI_SUBVENDOR_ID_3COM,
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TG3PCI_SUBDEVICE_ID_3COM_3C996T, PHY_ID_BCM5401 },
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TG3PCI_SUBDEVICE_ID_3COM_3C996T, TG3_PHY_ID_BCM5401 },
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{ TG3PCI_SUBVENDOR_ID_3COM,
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TG3PCI_SUBDEVICE_ID_3COM_3C996BT, PHY_ID_BCM5701 },
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TG3PCI_SUBDEVICE_ID_3COM_3C996BT, TG3_PHY_ID_BCM5701 },
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{ TG3PCI_SUBVENDOR_ID_3COM,
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TG3PCI_SUBDEVICE_ID_3COM_3C996SX, 0 },
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{ TG3PCI_SUBVENDOR_ID_3COM,
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TG3PCI_SUBDEVICE_ID_3COM_3C1000T, PHY_ID_BCM5701 },
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TG3PCI_SUBDEVICE_ID_3COM_3C1000T, TG3_PHY_ID_BCM5701 },
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{ TG3PCI_SUBVENDOR_ID_3COM,
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TG3PCI_SUBDEVICE_ID_3COM_3C940BR01, PHY_ID_BCM5701 },
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TG3PCI_SUBDEVICE_ID_3COM_3C940BR01, TG3_PHY_ID_BCM5701 },
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/* DELL boards. */
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{ TG3PCI_SUBVENDOR_ID_DELL,
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TG3PCI_SUBDEVICE_ID_DELL_VIPER, PHY_ID_BCM5401 },
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TG3PCI_SUBDEVICE_ID_DELL_VIPER, TG3_PHY_ID_BCM5401 },
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{ TG3PCI_SUBVENDOR_ID_DELL,
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TG3PCI_SUBDEVICE_ID_DELL_JAGUAR, PHY_ID_BCM5401 },
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TG3PCI_SUBDEVICE_ID_DELL_JAGUAR, TG3_PHY_ID_BCM5401 },
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{ TG3PCI_SUBVENDOR_ID_DELL,
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TG3PCI_SUBDEVICE_ID_DELL_MERLOT, PHY_ID_BCM5411 },
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TG3PCI_SUBDEVICE_ID_DELL_MERLOT, TG3_PHY_ID_BCM5411 },
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{ TG3PCI_SUBVENDOR_ID_DELL,
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TG3PCI_SUBDEVICE_ID_DELL_SLIM_MERLOT, PHY_ID_BCM5411 },
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TG3PCI_SUBDEVICE_ID_DELL_SLIM_MERLOT, TG3_PHY_ID_BCM5411 },
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/* Compaq boards. */
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{ TG3PCI_SUBVENDOR_ID_COMPAQ,
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TG3PCI_SUBDEVICE_ID_COMPAQ_BANSHEE, PHY_ID_BCM5701 },
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TG3PCI_SUBDEVICE_ID_COMPAQ_BANSHEE, TG3_PHY_ID_BCM5701 },
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{ TG3PCI_SUBVENDOR_ID_COMPAQ,
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TG3PCI_SUBDEVICE_ID_COMPAQ_BANSHEE_2, PHY_ID_BCM5701 },
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TG3PCI_SUBDEVICE_ID_COMPAQ_BANSHEE_2, TG3_PHY_ID_BCM5701 },
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{ TG3PCI_SUBVENDOR_ID_COMPAQ,
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TG3PCI_SUBDEVICE_ID_COMPAQ_CHANGELING, 0 },
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{ TG3PCI_SUBVENDOR_ID_COMPAQ,
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TG3PCI_SUBDEVICE_ID_COMPAQ_NC7780, PHY_ID_BCM5701 },
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TG3PCI_SUBDEVICE_ID_COMPAQ_NC7780, TG3_PHY_ID_BCM5701 },
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{ TG3PCI_SUBVENDOR_ID_COMPAQ,
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TG3PCI_SUBDEVICE_ID_COMPAQ_NC7780_2, PHY_ID_BCM5701 },
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TG3PCI_SUBDEVICE_ID_COMPAQ_NC7780_2, TG3_PHY_ID_BCM5701 },
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/* IBM boards. */
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{ TG3PCI_SUBVENDOR_ID_IBM,
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@ -12217,7 +12219,7 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
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val = tr32(MEMARB_MODE);
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tw32(MEMARB_MODE, val | MEMARB_MODE_ENABLE);
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tp->phy_id = PHY_ID_INVALID;
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tp->phy_id = TG3_PHY_ID_INVALID;
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tp->led_ctrl = LED_CTRL_MODE_PHY_1;
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/* Assume an onboard device and WOL capable by default. */
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@ -12468,7 +12470,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
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err = 0;
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if ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) ||
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(tp->tg3_flags3 & TG3_FLG3_ENABLE_APE)) {
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hw_phy_id = hw_phy_id_masked = PHY_ID_INVALID;
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hw_phy_id = hw_phy_id_masked = TG3_PHY_ID_INVALID;
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} else {
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/* Now read the physical PHY_ID from the chip and verify
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* that it is sane. If it doesn't look good, we fall back
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@ -12482,17 +12484,17 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
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hw_phy_id |= (hw_phy_id_2 & 0xfc00) << 16;
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hw_phy_id |= (hw_phy_id_2 & 0x03ff) << 0;
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hw_phy_id_masked = hw_phy_id & PHY_ID_MASK;
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hw_phy_id_masked = hw_phy_id & TG3_PHY_ID_MASK;
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}
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if (!err && KNOWN_PHY_ID(hw_phy_id_masked)) {
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if (!err && TG3_KNOWN_PHY_ID(hw_phy_id_masked)) {
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tp->phy_id = hw_phy_id;
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if (hw_phy_id_masked == PHY_ID_BCM8002)
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if (hw_phy_id_masked == TG3_PHY_ID_BCM8002)
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tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
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else
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tp->tg3_flags2 &= ~TG3_FLG2_PHY_SERDES;
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} else {
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if (tp->phy_id != PHY_ID_INVALID) {
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if (tp->phy_id != TG3_PHY_ID_INVALID) {
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/* Do nothing, phy ID already set up in
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* tg3_get_eeprom_hw_cfg().
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*/
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@ -12508,7 +12510,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
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tp->phy_id = p->phy_id;
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if (!tp->phy_id ||
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tp->phy_id == PHY_ID_BCM8002)
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tp->phy_id == TG3_PHY_ID_BCM8002)
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tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
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}
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}
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@ -12560,13 +12562,11 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
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}
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skip_phy_reset:
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if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) {
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if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5401) {
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err = tg3_init_5401phy_dsp(tp);
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if (err)
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return err;
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}
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if (!err && ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401)) {
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err = tg3_init_5401phy_dsp(tp);
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}
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@ -14317,28 +14317,28 @@ static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
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static char * __devinit tg3_phy_string(struct tg3 *tp)
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{
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switch (tp->phy_id & PHY_ID_MASK) {
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case PHY_ID_BCM5400: return "5400";
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case PHY_ID_BCM5401: return "5401";
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case PHY_ID_BCM5411: return "5411";
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case PHY_ID_BCM5701: return "5701";
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case PHY_ID_BCM5703: return "5703";
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case PHY_ID_BCM5704: return "5704";
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case PHY_ID_BCM5705: return "5705";
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case PHY_ID_BCM5750: return "5750";
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case PHY_ID_BCM5752: return "5752";
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case PHY_ID_BCM5714: return "5714";
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case PHY_ID_BCM5780: return "5780";
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case PHY_ID_BCM5755: return "5755";
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case PHY_ID_BCM5787: return "5787";
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case PHY_ID_BCM5784: return "5784";
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case PHY_ID_BCM5756: return "5722/5756";
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case PHY_ID_BCM5906: return "5906";
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case PHY_ID_BCM5761: return "5761";
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case PHY_ID_BCM5718C: return "5718C";
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case PHY_ID_BCM5718S: return "5718S";
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case PHY_ID_BCM57765: return "57765";
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case PHY_ID_BCM8002: return "8002/serdes";
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switch (tp->phy_id & TG3_PHY_ID_MASK) {
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case TG3_PHY_ID_BCM5400: return "5400";
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case TG3_PHY_ID_BCM5401: return "5401";
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case TG3_PHY_ID_BCM5411: return "5411";
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case TG3_PHY_ID_BCM5701: return "5701";
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case TG3_PHY_ID_BCM5703: return "5703";
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case TG3_PHY_ID_BCM5704: return "5704";
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case TG3_PHY_ID_BCM5705: return "5705";
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case TG3_PHY_ID_BCM5750: return "5750";
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case TG3_PHY_ID_BCM5752: return "5752";
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case TG3_PHY_ID_BCM5714: return "5714";
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case TG3_PHY_ID_BCM5780: return "5780";
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case TG3_PHY_ID_BCM5755: return "5755";
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case TG3_PHY_ID_BCM5787: return "5787";
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case TG3_PHY_ID_BCM5784: return "5784";
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case TG3_PHY_ID_BCM5756: return "5722/5756";
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case TG3_PHY_ID_BCM5906: return "5906";
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case TG3_PHY_ID_BCM5761: return "5761";
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case TG3_PHY_ID_BCM5718C: return "5718C";
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case TG3_PHY_ID_BCM5718S: return "5718S";
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case TG3_PHY_ID_BCM57765: return "57765";
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case TG3_PHY_ID_BCM8002: return "8002/serdes";
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case 0: return "serdes";
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default: return "unknown";
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}
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@ -2921,45 +2921,59 @@ struct tg3 {
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/* PHY info */
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u32 phy_id;
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#define PHY_ID_MASK 0xfffffff0
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#define PHY_ID_BCM5400 0x60008040
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#define PHY_ID_BCM5401 0x60008050
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#define PHY_ID_BCM5411 0x60008070
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#define PHY_ID_BCM5701 0x60008110
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#define PHY_ID_BCM5703 0x60008160
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#define PHY_ID_BCM5704 0x60008190
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#define PHY_ID_BCM5705 0x600081a0
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#define PHY_ID_BCM5750 0x60008180
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#define PHY_ID_BCM5752 0x60008100
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#define PHY_ID_BCM5714 0x60008340
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#define PHY_ID_BCM5780 0x60008350
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#define PHY_ID_BCM5755 0xbc050cc0
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#define PHY_ID_BCM5787 0xbc050ce0
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#define PHY_ID_BCM5756 0xbc050ed0
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#define PHY_ID_BCM5784 0xbc050fa0
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#define PHY_ID_BCM5761 0xbc050fd0
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#define PHY_ID_BCM5718C 0x5c0d8a00
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#define PHY_ID_BCM5718S 0xbc050ff0
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#define PHY_ID_BCM57765 0x5c0d8a40
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#define PHY_ID_BCM5906 0xdc00ac40
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#define PHY_ID_BCM8002 0x60010140
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#define PHY_ID_INVALID 0xffffffff
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#define PHY_ID_REV_MASK 0x0000000f
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#define PHY_REV_BCM5401_B0 0x1
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#define PHY_REV_BCM5401_B2 0x3
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#define PHY_REV_BCM5401_C0 0x6
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#define PHY_REV_BCM5411_X0 0x1 /* Found on Netgear GA302T */
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#define TG3_PHY_ID_BCM50610 0x143bd60
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#define TG3_PHY_ID_BCM50610M 0x143bd70
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#define TG3_PHY_ID_BCMAC131 0x143bc70
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#define TG3_PHY_ID_MASK 0xfffffff0
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#define TG3_PHY_ID_BCM5400 0x60008040
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#define TG3_PHY_ID_BCM5401 0x60008050
|
||||
#define TG3_PHY_ID_BCM5411 0x60008070
|
||||
#define TG3_PHY_ID_BCM5701 0x60008110
|
||||
#define TG3_PHY_ID_BCM5703 0x60008160
|
||||
#define TG3_PHY_ID_BCM5704 0x60008190
|
||||
#define TG3_PHY_ID_BCM5705 0x600081a0
|
||||
#define TG3_PHY_ID_BCM5750 0x60008180
|
||||
#define TG3_PHY_ID_BCM5752 0x60008100
|
||||
#define TG3_PHY_ID_BCM5714 0x60008340
|
||||
#define TG3_PHY_ID_BCM5780 0x60008350
|
||||
#define TG3_PHY_ID_BCM5755 0xbc050cc0
|
||||
#define TG3_PHY_ID_BCM5787 0xbc050ce0
|
||||
#define TG3_PHY_ID_BCM5756 0xbc050ed0
|
||||
#define TG3_PHY_ID_BCM5784 0xbc050fa0
|
||||
#define TG3_PHY_ID_BCM5761 0xbc050fd0
|
||||
#define TG3_PHY_ID_BCM5718C 0x5c0d8a00
|
||||
#define TG3_PHY_ID_BCM5718S 0xbc050ff0
|
||||
#define TG3_PHY_ID_BCM57765 0x5c0d8a40
|
||||
#define TG3_PHY_ID_BCM5906 0xdc00ac40
|
||||
#define TG3_PHY_ID_BCM8002 0x60010140
|
||||
#define TG3_PHY_ID_BCM50610 0x0143bd60
|
||||
#define TG3_PHY_ID_BCM50610M 0x0143bd70
|
||||
#define TG3_PHY_ID_BCMAC131 0x0143bc70
|
||||
#define TG3_PHY_ID_RTL8211C 0x001cc910
|
||||
#define TG3_PHY_ID_RTL8201E 0x00008200
|
||||
#define TG3_PHY_ID_BCM57780 0x03625d90
|
||||
#define TG3_PHY_ID_INVALID 0xffffffff
|
||||
|
||||
#define TG3_PHY_ID_REV_MASK 0x0000000f
|
||||
#define TG3_PHY_REV_BCM5401_B0 0x1
|
||||
|
||||
#define TG3_PHY_OUI_MASK 0xfffffc00
|
||||
#define TG3_PHY_OUI_1 0x00206000
|
||||
#define TG3_PHY_OUI_2 0x0143bc00
|
||||
#define TG3_PHY_OUI_3 0x03625c00
|
||||
|
||||
/* This macro assumes the passed PHY ID is
|
||||
* already masked with TG3_PHY_ID_MASK.
|
||||
*/
|
||||
#define TG3_KNOWN_PHY_ID(X) \
|
||||
((X) == TG3_PHY_ID_BCM5400 || (X) == TG3_PHY_ID_BCM5401 || \
|
||||
(X) == TG3_PHY_ID_BCM5411 || (X) == TG3_PHY_ID_BCM5701 || \
|
||||
(X) == TG3_PHY_ID_BCM5703 || (X) == TG3_PHY_ID_BCM5704 || \
|
||||
(X) == TG3_PHY_ID_BCM5705 || (X) == TG3_PHY_ID_BCM5750 || \
|
||||
(X) == TG3_PHY_ID_BCM5752 || (X) == TG3_PHY_ID_BCM5714 || \
|
||||
(X) == TG3_PHY_ID_BCM5780 || (X) == TG3_PHY_ID_BCM5787 || \
|
||||
(X) == TG3_PHY_ID_BCM5755 || (X) == TG3_PHY_ID_BCM5756 || \
|
||||
(X) == TG3_PHY_ID_BCM5906 || (X) == TG3_PHY_ID_BCM5761 || \
|
||||
(X) == TG3_PHY_ID_BCM5718C || (X) == TG3_PHY_ID_BCM5718S || \
|
||||
(X) == TG3_PHY_ID_BCM57765 || (X) == TG3_PHY_ID_BCM8002)
|
||||
|
||||
u32 led_ctrl;
|
||||
u32 phy_otp;
|
||||
|
||||
|
@ -2971,21 +2985,6 @@ struct tg3 {
|
|||
u32 pci_clock_ctrl;
|
||||
struct pci_dev *pdev_peer;
|
||||
|
||||
/* This macro assumes the passed PHY ID is already masked
|
||||
* with PHY_ID_MASK.
|
||||
*/
|
||||
#define KNOWN_PHY_ID(X) \
|
||||
((X) == PHY_ID_BCM5400 || (X) == PHY_ID_BCM5401 || \
|
||||
(X) == PHY_ID_BCM5411 || (X) == PHY_ID_BCM5701 || \
|
||||
(X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \
|
||||
(X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \
|
||||
(X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \
|
||||
(X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \
|
||||
(X) == PHY_ID_BCM5755 || (X) == PHY_ID_BCM5756 || \
|
||||
(X) == PHY_ID_BCM5906 || (X) == PHY_ID_BCM5761 || \
|
||||
(X) == PHY_ID_BCM5718C || (X) == PHY_ID_BCM5718S || \
|
||||
(X) == PHY_ID_BCM57765 || (X) == PHY_ID_BCM8002)
|
||||
|
||||
struct tg3_hw_stats *hw_stats;
|
||||
dma_addr_t stats_mapping;
|
||||
struct work_struct reset_task;
|
||||
|
|
Loading…
Reference in a new issue