i2c: s3c2410: do not special case HDMIPHY stuck bus detection
Commit "i2c-s3c2410: Add HDMIPHY quirk for S3C2440" added support for HDMIPHY with some special handling in s3c24xx_i2c_set_master: "due to unknown reason (probably HW bug in HDMIPHY and/or the controller) a transfer fails to finish. The controller hangs after sending the last byte, the workaround for this bug is resetting the controller after each transfer" The "unknown reason" was that the proper sequence for generating a STOP condition wasn't being followed as per the datasheet. Since this is fixed by "PATCH: i2c-s3c2410: do not generate STOP for QUIRK_HDMIPHY buses", remove the special handling. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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@ -532,13 +532,6 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
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unsigned long iicstat;
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int timeout = 400;
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/* the timeout for HDMIPHY is reduced to 10 ms because
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* the hangup is expected to happen, so waiting 400 ms
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* causes only unnecessary system hangup
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*/
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if (i2c->quirks & QUIRK_HDMIPHY)
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timeout = 10;
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while (timeout-- > 0) {
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iicstat = readl(i2c->regs + S3C2410_IICSTAT);
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@ -548,15 +541,6 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
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msleep(1);
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}
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/* hang-up of bus dedicated for HDMIPHY occurred, resetting */
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if (i2c->quirks & QUIRK_HDMIPHY) {
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writel(0, i2c->regs + S3C2410_IICCON);
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writel(0, i2c->regs + S3C2410_IICSTAT);
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writel(0, i2c->regs + S3C2410_IICDS);
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return 0;
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}
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return -ETIMEDOUT;
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}
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