microblaze: Prepare work for optimization in exception code
Any sync branch must follow mts instructions not mfs. Signed-off-by: Michal Simek <monstr@monstr.eu>
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@ -562,7 +562,6 @@ ex_handler_done:
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*/
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mfs r11, rpid
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nop
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bri 4
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mfs r3, rear /* Get faulting address */
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nop
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/* If we are faulting a kernel address, we have to use the
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@ -679,18 +678,17 @@ ex_handler_done:
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*/
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handle_data_tlb_miss_exception:
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/* Working registers already saved: R3, R4, R5, R6
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* R3 = ESR
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* R3 = EAR, R4 = ESR
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*/
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mfs r11, rpid
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nop
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bri 4
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mfs r3, rear /* Get faulting address */
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nop
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/* If we are faulting a kernel address, we have to use the
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* kernel page tables. */
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ori r4, r0, CONFIG_KERNEL_START
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cmpu r4, r3, r4
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ori r6, r0, CONFIG_KERNEL_START
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cmpu r4, r3, r6
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bgti r4, ex5
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ori r4, r0, swapper_pg_dir
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mts rpid, r0 /* TLB will have 0 TID */
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@ -756,7 +754,6 @@ ex_handler_done:
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*/
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mfs r11, rpid
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nop
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bri 4
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mfs r3, rear /* Get faulting address */
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nop
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