1
0
Fork 0

uli526x partially recognizing interface

Patch fixes:
    http://bugzilla.kernel.org/show_bug.cgi?id=5839

Init sequence needs to poll phy until phy reset is complete. This is the
same problem that I fixed in 2002 in tulip driver.

Thanks to manty@manty.net for testing this patch.
Thanks to Pozsar Balazs <pozsy@uhulinux.hu> for posting/testing
a similar patch before:
    http://lkml.org/lkml/2006/8/21/45

Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
hifive-unleashed-5.1
Grant Grundler 2008-02-17 11:30:23 -07:00 committed by Jeff Garzik
parent 740db6d7f5
commit 7a7d23dac2
1 changed files with 11 additions and 1 deletions

View File

@ -482,9 +482,11 @@ static void uli526x_init(struct net_device *dev)
struct uli526x_board_info *db = netdev_priv(dev);
unsigned long ioaddr = db->ioaddr;
u8 phy_tmp;
u8 timeout;
u16 phy_value;
u16 phy_reg_reset;
ULI526X_DBUG(0, "uli526x_init()", 0);
/* Reset M526x MAC controller */
@ -509,11 +511,19 @@ static void uli526x_init(struct net_device *dev)
/* Parser SROM and media mode */
db->media_mode = uli526x_media_mode;
/* Phyxcer capability setting */
/* phyxcer capability setting */
phy_reg_reset = phy_read(db->ioaddr, db->phy_addr, 0, db->chip_id);
phy_reg_reset = (phy_reg_reset | 0x8000);
phy_write(db->ioaddr, db->phy_addr, 0, phy_reg_reset, db->chip_id);
/* See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management
* functions") or phy data sheet for details on phy reset
*/
udelay(500);
timeout = 10;
while (timeout-- &&
phy_read(db->ioaddr, db->phy_addr, 0, db->chip_id) & 0x8000)
udelay(100);
/* Process Phyxcer Media Mode */
uli526x_set_phyxcer(db);