drm/radeon/kms/pm: add support for SetVoltage cmd table (V2)
- This enables voltage adjustment on r6xx+ and certain r5xx asics. - Voltage drop support is already available for most r1xx-r5xx asics. V2: endian fix for voltage table. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -475,6 +475,12 @@ void r600_pm_init_profile(struct radeon_device *rdev)
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void r600_pm_misc(struct radeon_device *rdev)
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{
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int requested_index = rdev->pm.requested_power_state_index;
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struct radeon_power_state *ps = &rdev->pm.power_state[requested_index];
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struct radeon_voltage *voltage = &ps->clock_info[0].voltage;
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if ((voltage->type == VOLTAGE_SW) && voltage->voltage)
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radeon_atom_set_voltage(rdev, voltage->voltage);
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}
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@ -176,6 +176,7 @@ void radeon_pm_suspend(struct radeon_device *rdev);
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void radeon_pm_resume(struct radeon_device *rdev);
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void radeon_combios_get_power_modes(struct radeon_device *rdev);
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void radeon_atombios_get_power_modes(struct radeon_device *rdev);
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void radeon_atom_set_voltage(struct radeon_device *rdev, u16 level);
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/*
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* Fences.
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@ -1998,6 +1998,42 @@ void radeon_atom_set_memory_clock(struct radeon_device *rdev,
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atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
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}
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union set_voltage {
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struct _SET_VOLTAGE_PS_ALLOCATION alloc;
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struct _SET_VOLTAGE_PARAMETERS v1;
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struct _SET_VOLTAGE_PARAMETERS_V2 v2;
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};
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void radeon_atom_set_voltage(struct radeon_device *rdev, u16 level)
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{
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union set_voltage args;
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int index = GetIndexIntoMasterTable(COMMAND, SetVoltage);
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u8 frev, crev, volt_index = level;
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if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
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return;
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switch (crev) {
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case 1:
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args.v1.ucVoltageType = SET_VOLTAGE_TYPE_ASIC_VDDC;
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args.v1.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_ALL_SOURCE;
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args.v1.ucVoltageIndex = volt_index;
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break;
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case 2:
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args.v2.ucVoltageType = SET_VOLTAGE_TYPE_ASIC_VDDC;
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args.v2.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_SET_VOLTAGE;
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args.v2.usVoltageLevel = cpu_to_le16(level);
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break;
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default:
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DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
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return;
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}
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atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
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}
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void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev)
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{
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struct radeon_device *rdev = dev->dev_private;
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@ -74,7 +74,8 @@ void rs600_pm_misc(struct radeon_device *rdev)
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if (voltage->delay)
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udelay(voltage->delay);
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}
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}
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} else if (voltage->type == VOLTAGE_VDDC)
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radeon_atom_set_voltage(rdev, voltage->vddc_id);
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dyn_pwrmgt_sclk_length = RREG32_PLL(DYN_PWRMGT_SCLK_LENGTH);
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dyn_pwrmgt_sclk_length &= ~REDUCED_POWER_SCLK_HILEN(0xf);
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