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MIPS: asm: cpu: Add cpu flag for Enhanced Virtual Addressing 

The MIPS *Aptiv family uses bit 28 in Config5 CP0 register to
indicate whether the core supports EVA or not.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
hifive-unleashed-5.1
Markos Chandras 2014-01-09 16:01:29 +00:00 committed by Ralf Baechle
parent 27b3db2031
commit 7ae6696656
2 changed files with 4 additions and 1 deletions
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4
arch/mips/include/asm/cpu-features.h
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@ -26,7 +26,9 @@
#ifndef cpu_has_segments
#define cpu_has_segments (cpu_data[0].options & MIPS_CPU_SEGMENTS)
#endif
#ifndef cpu_has_eva
#define cpu_has_eva (cpu_data[0].options & MIPS_CPU_EVA)
#endif
/*
* For the moment we don't consider R6000 and R8000 so we can assume that

1
arch/mips/include/asm/cpu.h
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@ -359,6 +359,7 @@ enum cpu_type_enum {
#define MIPS_CPU_MICROMIPS 0x01000000 /* CPU has microMIPS capability */
#define MIPS_CPU_TLBINV 0x02000000 /* CPU supports TLBINV/F */
#define MIPS_CPU_SEGMENTS 0x04000000 /* CPU supports Segmentation Control registers */
#define MIPS_CPU_EVA 0x80000000 /* CPU supports Enhanced Virtual Addressing */
/*
* CPU ASE encodings