ARM: dts: r8a7793: Add I2C master nodes to DT
Instantiate all the 9 I2C controllers in the disabled state. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>hifive-unleashed-5.1
Laurent Pinchart
Simon Horman
parent
c5af8a4248
commit
7aed17f445
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@ -19,6 +19,15 @@
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#size-cells = <2>;
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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i2c4 = &i2c4;
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i2c5 = &i2c5;
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i2c6 = &i2c6;
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i2c7 = &i2c7;
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i2c8 = &i2c8;
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spi0 = &qspi;
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};
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@ -230,6 +239,120 @@
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power-domains = <&cpg_clocks>;
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};
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/* The memory map in the User's Manual maps the cores to bus numbers */
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i2c0: i2c@e6508000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7793";
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reg = <0 0xe6508000 0 0x40>;
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interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7793_CLK_I2C0>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <6>;
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status = "disabled";
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};
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i2c1: i2c@e6518000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7793";
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reg = <0 0xe6518000 0 0x40>;
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interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7793_CLK_I2C1>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <6>;
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status = "disabled";
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};
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i2c2: i2c@e6530000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7793";
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reg = <0 0xe6530000 0 0x40>;
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interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7793_CLK_I2C2>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <6>;
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status = "disabled";
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};
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i2c3: i2c@e6540000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7793";
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reg = <0 0xe6540000 0 0x40>;
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interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7793_CLK_I2C3>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <6>;
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status = "disabled";
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};
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i2c4: i2c@e6520000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7793";
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reg = <0 0xe6520000 0 0x40>;
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interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7793_CLK_I2C4>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <6>;
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status = "disabled";
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};
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i2c5: i2c@e6528000 {
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/* doesn't need pinmux */
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7793";
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reg = <0 0xe6528000 0 0x40>;
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interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7793_CLK_I2C5>;
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power-domains = <&cpg_clocks>;
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i2c-scl-internal-delay-ns = <110>;
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status = "disabled";
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};
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i2c6: i2c@e60b0000 {
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/* doesn't need pinmux */
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic";
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reg = <0 0xe60b0000 0 0x425>;
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interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R8A7793_CLK_IICDVFS>;
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dmas = <&dmac0 0x77>, <&dmac0 0x78>;
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dma-names = "tx", "rx";
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power-domains = <&cpg_clocks>;
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status = "disabled";
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};
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i2c7: i2c@e6500000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic";
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reg = <0 0xe6500000 0 0x425>;
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interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7793_CLK_IIC0>;
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dmas = <&dmac0 0x61>, <&dmac0 0x62>;
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dma-names = "tx", "rx";
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power-domains = <&cpg_clocks>;
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status = "disabled";
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};
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i2c8: i2c@e6510000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,iic-r8a7793", "renesas,rmobile-iic";
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reg = <0 0xe6510000 0 0x425>;
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interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7793_CLK_IIC1>;
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dmas = <&dmac0 0x65>, <&dmac0 0x66>;
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dma-names = "tx", "rx";
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power-domains = <&cpg_clocks>;
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status = "disabled";
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};
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pfc: pfc@e6060000 {
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compatible = "renesas,pfc-r8a7793";
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reg = <0 0xe6060000 0 0x250>;
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@ -820,19 +943,25 @@
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reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
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clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
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<&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
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<&cpg_clocks R8A7793_CLK_QSPI>;
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<&cpg_clocks R8A7793_CLK_QSPI>, <&hp_clk>,
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<&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
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<&hp_clk>, <&hp_clk>;
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#clock-cells = <1>;
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clock-indices = <
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R8A7793_CLK_GPIO7 R8A7793_CLK_GPIO6
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R8A7793_CLK_GPIO5 R8A7793_CLK_GPIO4
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R8A7793_CLK_GPIO3 R8A7793_CLK_GPIO2
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R8A7793_CLK_GPIO1 R8A7793_CLK_GPIO0
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R8A7793_CLK_QSPI_MOD
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R8A7793_CLK_QSPI_MOD R8A7793_CLK_I2C5
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R8A7793_CLK_IICDVFS R8A7793_CLK_I2C4
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R8A7793_CLK_I2C3 R8A7793_CLK_I2C2
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R8A7793_CLK_I2C1 R8A7793_CLK_I2C0
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>;
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clock-output-names =
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"gpio7", "gpio6", "gpio5", "gpio4",
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"gpio3", "gpio2", "gpio1", "gpio0",
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"qspi_mod";
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"qspi_mod", "i2c5", "i2c6", "i2c4",
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"i2c3", "i2c2", "i2c1", "i2c0";
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};
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mstp11_clks: mstp11_clks@e615099c {
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compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
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