[ARM] 4507/1: pxa2xx clock_event_device
Reimplements arch/arm/mach-pxa/time.c using a clock_event_device based on OSMR0. Tested on PXA270, linux-2.6.22+arm:pxa patches. Signed-off-by: Bill Gatliff <bgat@billgatliff.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>hifive-unleashed-5.1
Bill Gatliff
Russell King
parent
3d50527bbf
commit
7bbb18c9f4
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@ -1,9 +1,11 @@
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/*
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* arch/arm/mach-pxa/time.c
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*
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* Author: Nicolas Pitre
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* Created: Jun 15, 2001
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* Copyright: MontaVista Software Inc.
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* PXA clocksource, clockevents, and OST interrupt handlers.
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* Copyright (c) 2007 by Bill Gatliff <bgat@billgatliff.com>.
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*
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* Derived from Nicolas Pitre's PXA timer handler Copyright (c) 2001
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* by MontaVista Software, Inc. (Nico, your code rocks!)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -12,164 +14,160 @@
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/signal.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <asm/system.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/leds.h>
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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#include <asm/arch/pxa-regs.h>
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static int pxa_set_rtc(void)
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{
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unsigned long current_time = xtime.tv_sec;
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if (RTSR & RTSR_ALE) {
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/* make sure not to forward the clock over an alarm */
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unsigned long alarm = RTAR;
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if (current_time >= alarm && alarm >= RCNR)
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return -ERESTARTSYS;
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}
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RCNR = current_time;
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return 0;
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}
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#ifdef CONFIG_NO_IDLE_HZ
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static unsigned long initial_match;
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static int match_posponed;
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#endif
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static irqreturn_t
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pxa_timer_interrupt(int irq, void *dev_id)
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pxa_ost0_interrupt(int irq, void *dev_id)
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{
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int next_match;
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struct clock_event_device *c = dev_id;
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write_seqlock(&xtime_lock);
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#ifdef CONFIG_NO_IDLE_HZ
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if (match_posponed) {
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match_posponed = 0;
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OSMR0 = initial_match;
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}
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#endif
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/* Loop until we get ahead of the free running timer.
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* This ensures an exact clock tick count and time accuracy.
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* Since IRQs are disabled at this point, coherence between
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* lost_ticks(updated in do_timer()) and the match reg value is
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* ensured, hence we can use do_gettimeofday() from interrupt
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* handlers.
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*
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* HACK ALERT: it seems that the PXA timer regs aren't updated right
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* away in all cases when a write occurs. We therefore compare with
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* 8 instead of 0 in the while() condition below to avoid missing a
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* match if OSCR has already reached the next OSMR value.
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* Experience has shown that up to 6 ticks are needed to work around
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* this problem, but let's use 8 to be conservative. Note that this
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* affect things only when the timer IRQ has been delayed by nearly
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* exactly one tick period which should be a pretty rare event.
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if (c->mode == CLOCK_EVT_MODE_ONESHOT) {
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/* Disarm the compare/match, signal the event. */
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OIER &= ~OIER_E0;
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c->event_handler(c);
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} else if (c->mode == CLOCK_EVT_MODE_PERIODIC) {
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/* Call the event handler as many times as necessary
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* to recover missed events, if any (if we update
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* OSMR0 and OSCR0 is still ahead of us, we've missed
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* the event). As we're dealing with that, re-arm the
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* compare/match for the next event.
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*
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* HACK ALERT:
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*
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* There's a latency between the instruction that
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* writes to OSMR0 and the actual commit to the
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* physical hardware, because the CPU doesn't (have
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* to) run at bus speed, there's a write buffer
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* between the CPU and the bus, etc. etc. So if the
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* target OSCR0 is "very close", to the OSMR0 load
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* value, the update to OSMR0 might not get to the
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* hardware in time and we'll miss that interrupt.
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*
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* To be safe, if the new OSMR0 is "very close" to the
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* target OSCR0 value, we call the event_handler as
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* though the event actually happened. According to
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* Nico's comment in the previous version of this
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* code, experience has shown that 6 OSCR ticks is
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* "very close" but he went with 8. We will use 16,
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* based on the results of testing on PXA270.
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*
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* To be doubly sure, we also tell clkevt via
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* clockevents_register_device() not to ask for
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* anything that might put us "very close".
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*/
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#define MIN_OSCR_DELTA 16
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do {
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timer_tick();
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OSSR = OSSR_M0; /* Clear match on timer 0 */
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OSSR = OSSR_M0;
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next_match = (OSMR0 += LATCH);
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} while( (signed long)(next_match - OSCR) <= 8 );
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write_sequnlock(&xtime_lock);
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c->event_handler(c);
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} while (((signed long)(next_match - OSCR) <= MIN_OSCR_DELTA)
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&& (c->mode == CLOCK_EVT_MODE_PERIODIC));
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}
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return IRQ_HANDLED;
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}
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static struct irqaction pxa_timer_irq = {
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.name = "PXA Timer Tick",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = pxa_timer_interrupt,
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static int
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pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
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{
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unsigned long irqflags;
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raw_local_irq_save(irqflags);
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OSMR0 = OSCR + delta;
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OSSR = OSSR_M0;
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OIER |= OIER_E0;
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raw_local_irq_restore(irqflags);
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return 0;
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}
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static void
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pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
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{
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unsigned long irqflags;
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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raw_local_irq_save(irqflags);
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OSMR0 = OSCR + LATCH;
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OSSR = OSSR_M0;
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OIER |= OIER_E0;
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raw_local_irq_restore(irqflags);
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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raw_local_irq_save(irqflags);
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OIER &= ~OIER_E0;
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raw_local_irq_restore(irqflags);
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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/* initializing, released, or preparing for suspend */
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raw_local_irq_save(irqflags);
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OIER &= ~OIER_E0;
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raw_local_irq_restore(irqflags);
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break;
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}
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}
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static struct clock_event_device ckevt_pxa_osmr0 = {
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.name = "osmr0",
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.shift = 32,
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.rating = 200,
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.cpumask = CPU_MASK_CPU0,
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.set_next_event = pxa_osmr0_set_next_event,
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.set_mode = pxa_osmr0_set_mode,
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};
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static cycle_t pxa_get_cycles(void)
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static cycle_t pxa_read_oscr(void)
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{
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return OSCR;
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}
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static struct clocksource clocksource_pxa = {
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.name = "pxa_timer",
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static struct clocksource cksrc_pxa_oscr0 = {
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.name = "oscr0",
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.rating = 200,
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.read = pxa_get_cycles,
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.read = pxa_read_oscr,
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.mask = CLOCKSOURCE_MASK(32),
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.shift = 20,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static struct irqaction pxa_ost0_irq = {
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.name = "ost0",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = pxa_ost0_interrupt,
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.dev_id = &ckevt_pxa_osmr0,
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};
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static void __init pxa_timer_init(void)
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{
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struct timespec tv;
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unsigned long flags;
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OIER = 0;
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OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
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set_rtc = pxa_set_rtc;
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ckevt_pxa_osmr0.mult =
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div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt_pxa_osmr0.shift);
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ckevt_pxa_osmr0.max_delta_ns =
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clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
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ckevt_pxa_osmr0.min_delta_ns =
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clockevent_delta2ns(MIN_OSCR_DELTA, &ckevt_pxa_osmr0) + 1;
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OIER = 0; /* disable any timer interrupts */
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OSSR = 0xf; /* clear status on all timers */
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setup_irq(IRQ_OST0, &pxa_timer_irq);
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local_irq_save(flags);
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OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */
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OSMR0 = OSCR + LATCH; /* set initial match */
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local_irq_restore(flags);
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cksrc_pxa_oscr0.mult =
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clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_pxa_oscr0.shift);
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/*
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* OSCR runs continuously on PXA and is not written to,
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* so we can use it as clock source directly.
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*/
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clocksource_pxa.mult =
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clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_pxa.shift);
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clocksource_register(&clocksource_pxa);
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setup_irq(IRQ_OST0, &pxa_ost0_irq);
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clocksource_register(&cksrc_pxa_oscr0);
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clockevents_register_device(&ckevt_pxa_osmr0);
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}
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#ifdef CONFIG_NO_IDLE_HZ
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static int pxa_dyn_tick_enable_disable(void)
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{
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/* nothing to do */
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return 0;
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}
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static void pxa_dyn_tick_reprogram(unsigned long ticks)
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{
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if (ticks > 1) {
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initial_match = OSMR0;
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OSMR0 = initial_match + ticks * LATCH;
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match_posponed = 1;
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}
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}
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static irqreturn_t
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pxa_dyn_tick_handler(int irq, void *dev_id)
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{
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if (match_posponed) {
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match_posponed = 0;
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OSMR0 = initial_match;
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if ( (signed long)(initial_match - OSCR) <= 8 )
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return pxa_timer_interrupt(irq, dev_id);
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}
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return IRQ_NONE;
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}
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static struct dyn_tick_timer pxa_dyn_tick = {
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.enable = pxa_dyn_tick_enable_disable,
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.disable = pxa_dyn_tick_enable_disable,
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.reprogram = pxa_dyn_tick_reprogram,
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.handler = pxa_dyn_tick_handler,
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};
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#endif
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#ifdef CONFIG_PM
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static unsigned long osmr[4], oier;
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@ -191,7 +189,10 @@ static void pxa_timer_resume(void)
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OIER = oier;
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/*
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* OSMR0 is the system timer: make sure OSCR is sufficiently behind
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* OSCR0 is the system timer, which has to increase
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* monotonically until it rolls over in hardware. The value
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* (OSMR0 - LATCH) is OSCR0 at the most recent system tick,
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* which is a handy value to restore to OSCR0.
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*/
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OSCR = OSMR0 - LATCH;
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}
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@ -204,7 +205,4 @@ struct sys_timer pxa_timer = {
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.init = pxa_timer_init,
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.suspend = pxa_timer_suspend,
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.resume = pxa_timer_resume,
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#ifdef CONFIG_NO_IDLE_HZ
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.dyn_tick = &pxa_dyn_tick,
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#endif
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};
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